diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/vsx.ll | 16 |
3 files changed, 13 insertions, 12 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 503f01f0827..173269c7395 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -548,7 +548,8 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Legal); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Legal); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Legal); - setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i64, Legal); + // FIXME: this is causing bootstrap failures, disable temporarily + //setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i64, Legal); } setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Legal); diff --git a/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll b/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll index 535ddf4f574..01edab0eb76 100644 --- a/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll +++ b/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll @@ -59,9 +59,9 @@ entry: %splat.splatinsert = insertelement <2 x i64> undef, i64 %0, i32 0 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer ret <2 x i64> %splat.splat -; CHECK: mtvsrd {{[0-9]+}}, 3 -; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3 -; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]] +; FIXME-CHECK: mtvsrd {{[0-9]+}}, 3 +; FIXME-CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3 +; FIXME-CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]] } ; Function Attrs: nounwind diff --git a/test/CodeGen/PowerPC/vsx.ll b/test/CodeGen/PowerPC/vsx.ll index b4b1d248d1a..3820e19c077 100644 --- a/test/CodeGen/PowerPC/vsx.ll +++ b/test/CodeGen/PowerPC/vsx.ll @@ -1226,14 +1226,14 @@ define <2 x i32> @test80(i32 %v) { ; CHECK-FISL: blr ; CHECK-LE-LABEL: @test80 -; CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3 -; CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI -; CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]] -; CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]] -; CHECK-LE-DAG: xxspltd 34, [[V1]] -; CHECK-LE-DAG: xxswapd 35, [[V2]] -; CHECK-LE: vaddudm 2, 2, 3 -; CHECK-LE: blr +; FIXME-CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3 +; FIXME-CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI +; FIXME-CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]] +; FIXME-CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]] +; FIXME-CHECK-LE-DAG: xxspltd 34, [[V1]] +; FIXME-CHECK-LE-DAG: xxswapd 35, [[V2]] +; FIXME-CHECK-LE: vaddudm 2, 2, 3 +; FIXME-CHECK-LE: blr } define <2 x double> @test81(<4 x float> %b) { |