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-rw-r--r--include/llvm/MC/MCMachObjectWriter.h21
-rw-r--r--lib/MC/MCMachObjectTargetWriter.cpp4
-rw-r--r--lib/MC/MachObjectWriter.cpp60
-rw-r--r--lib/Target/ARM/ARMAsmBackend.cpp13
-rw-r--r--lib/Target/PowerPC/PPCAsmBackend.cpp16
-rw-r--r--lib/Target/X86/X86AsmBackend.cpp24
6 files changed, 82 insertions, 56 deletions
diff --git a/include/llvm/MC/MCMachObjectWriter.h b/include/llvm/MC/MCMachObjectWriter.h
index 3c2eb2f4786..8c67d257a30 100644
--- a/include/llvm/MC/MCMachObjectWriter.h
+++ b/include/llvm/MC/MCMachObjectWriter.h
@@ -11,15 +11,30 @@
#define LLVM_MC_MCMACHOBJECTWRITER_H
#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/Support/DataTypes.h"
namespace llvm {
class MCMachObjectTargetWriter {
+ const unsigned Is64Bit : 1;
+ const uint32_t CPUType;
+ const uint32_t CPUSubtype;
+
protected:
- MCMachObjectTargetWriter();
+ MCMachObjectTargetWriter(bool Is64Bit_, uint32_t CPUType_,
+ uint32_t CPUSubtype_);
public:
virtual ~MCMachObjectTargetWriter();
+
+ /// @name Accessors
+ /// @{
+
+ bool is64Bit() const { return Is64Bit; }
+ uint32_t getCPUType() const { return CPUType; }
+ uint32_t getCPUSubtype() const { return CPUSubtype; }
+
+ /// @}
};
/// \brief Construct a new Mach-O writer instance.
@@ -30,9 +45,7 @@ public:
/// \param OS - The stream to write to.
/// \returns The constructed object writer.
MCObjectWriter *createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
- raw_ostream &OS, bool is64Bit,
- uint32_t CPUType, uint32_t CPUSubtype,
- bool IsLittleEndian);
+ raw_ostream &OS, bool IsLittleEndian);
} // End llvm namespace
diff --git a/lib/MC/MCMachObjectTargetWriter.cpp b/lib/MC/MCMachObjectTargetWriter.cpp
index 9c96f26e7c6..4dfc0a815f3 100644
--- a/lib/MC/MCMachObjectTargetWriter.cpp
+++ b/lib/MC/MCMachObjectTargetWriter.cpp
@@ -11,7 +11,9 @@
using namespace llvm;
-MCMachObjectTargetWriter::MCMachObjectTargetWriter() {
+MCMachObjectTargetWriter::MCMachObjectTargetWriter(
+ bool Is64Bit_, uint32_t CPUType_, uint32_t CPUSubtype_)
+ : Is64Bit(Is64Bit_), CPUType(CPUType_), CPUSubtype(CPUSubtype_) {
}
MCMachObjectTargetWriter::~MCMachObjectTargetWriter() {
diff --git a/lib/MC/MachObjectWriter.cpp b/lib/MC/MachObjectWriter.cpp
index fa132d8aebb..b2258027b1c 100644
--- a/lib/MC/MachObjectWriter.cpp
+++ b/lib/MC/MachObjectWriter.cpp
@@ -225,19 +225,19 @@ private:
return OffsetToAlignment(EndAddr, NextSD.getAlignment());
}
- unsigned Is64Bit : 1;
-
- uint32_t CPUType;
- uint32_t CPUSubtype;
-
public:
MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
- bool _Is64Bit, uint32_t _CPUType, uint32_t _CPUSubtype,
bool _IsLittleEndian)
- : MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW),
- Is64Bit(_Is64Bit), CPUType(_CPUType), CPUSubtype(_CPUSubtype) {
+ : MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW) {
}
+ /// @name Target Writer Proxy Accessors
+ /// @{
+
+ bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
+
+ /// @}
+
void WriteHeader(unsigned NumLoadCommands, unsigned LoadCommandsSize,
bool SubsectionsViaSymbols) {
uint32_t Flags = 0;
@@ -251,19 +251,19 @@ public:
uint64_t Start = OS.tell();
(void) Start;
- Write32(Is64Bit ? macho::HM_Object64 : macho::HM_Object32);
+ Write32(is64Bit() ? macho::HM_Object64 : macho::HM_Object32);
- Write32(CPUType);
- Write32(CPUSubtype);
+ Write32(TargetObjectWriter->getCPUType());
+ Write32(TargetObjectWriter->getCPUSubtype());
Write32(macho::HFT_Object);
Write32(NumLoadCommands);
Write32(LoadCommandsSize);
Write32(Flags);
- if (Is64Bit)
+ if (is64Bit())
Write32(0); // reserved
- assert(OS.tell() - Start == Is64Bit ?
+ assert(OS.tell() - Start == is64Bit() ?
macho::Header64Size : macho::Header32Size);
}
@@ -281,15 +281,16 @@ public:
uint64_t Start = OS.tell();
(void) Start;
- unsigned SegmentLoadCommandSize = Is64Bit ? macho::SegmentLoadCommand64Size:
+ unsigned SegmentLoadCommandSize =
+ is64Bit() ? macho::SegmentLoadCommand64Size:
macho::SegmentLoadCommand32Size;
- Write32(Is64Bit ? macho::LCT_Segment64 : macho::LCT_Segment);
+ Write32(is64Bit() ? macho::LCT_Segment64 : macho::LCT_Segment);
Write32(SegmentLoadCommandSize +
- NumSections * (Is64Bit ? macho::Section64Size :
+ NumSections * (is64Bit() ? macho::Section64Size :
macho::Section32Size));
WriteBytes("", 16);
- if (Is64Bit) {
+ if (is64Bit()) {
Write64(0); // vmaddr
Write64(VMSize); // vmsize
Write64(SectionDataStartOffset); // file offset
@@ -328,7 +329,7 @@ public:
const MCSectionMachO &Section = cast<MCSectionMachO>(SD.getSection());
WriteBytes(Section.getSectionName(), 16);
WriteBytes(Section.getSegmentName(), 16);
- if (Is64Bit) {
+ if (is64Bit()) {
Write64(getSectionAddress(&SD)); // address
Write64(SectionSize); // size
} else {
@@ -348,10 +349,10 @@ public:
Write32(Flags);
Write32(IndirectSymBase.lookup(&SD)); // reserved1
Write32(Section.getStubSize()); // reserved2
- if (Is64Bit)
+ if (is64Bit())
Write32(0); // reserved3
- assert(OS.tell() - Start == Is64Bit ? macho::Section64Size :
+ assert(OS.tell() - Start == is64Bit() ? macho::Section64Size :
macho::Section32Size);
}
@@ -469,7 +470,7 @@ public:
// The Mach-O streamer uses the lowest 16-bits of the flags for the 'desc'
// value.
Write16(Flags);
- if (Is64Bit)
+ if (is64Bit())
Write64(Address);
else
Write32(Address);
@@ -798,7 +799,7 @@ public:
const MCFixup &Fixup, MCValue Target,
uint64_t &FixedValue) {
assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
- !Is64Bit &&
+ !is64Bit() &&
"Should only be called with a 32-bit TLVP relocation!");
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
@@ -840,7 +841,7 @@ public:
void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
const MCFragment *Fragment, const MCFixup &Fixup,
MCValue Target, uint64_t &FixedValue) {
- if (Is64Bit) {
+ if (is64Bit()) {
RecordX86_64Relocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
return;
}
@@ -1164,7 +1165,7 @@ public:
// The section data starts after the header, the segment load command (and
// section headers) and the symbol table.
unsigned NumLoadCommands = 1;
- uint64_t LoadCommandsSize = Is64Bit ?
+ uint64_t LoadCommandsSize = is64Bit() ?
macho::SegmentLoadCommand64Size + NumSections * macho::Section64Size :
macho::SegmentLoadCommand32Size + NumSections * macho::Section32Size;
@@ -1179,7 +1180,7 @@ public:
// Compute the total size of the section data, as well as its file size and
// vm size.
- uint64_t SectionDataStart = (Is64Bit ? macho::Header64Size :
+ uint64_t SectionDataStart = (is64Bit() ? macho::Header64Size :
macho::Header32Size) + LoadCommandsSize;
uint64_t SectionDataSize = 0;
uint64_t SectionDataFileSize = 0;
@@ -1247,7 +1248,7 @@ public:
// The string table is written after symbol table.
uint64_t StringTableOffset =
- SymbolTableOffset + NumSymTabSymbols * (Is64Bit ? macho::Nlist64Size :
+ SymbolTableOffset + NumSymTabSymbols * (is64Bit() ? macho::Nlist64Size :
macho::Nlist32Size);
WriteSymtabLoadCommand(SymbolTableOffset, NumSymTabSymbols,
StringTableOffset, StringTable.size());
@@ -1327,10 +1328,7 @@ public:
}
MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
- raw_ostream &OS, bool is64Bit,
- uint32_t CPUType,
- uint32_t CPUSubtype,
+ raw_ostream &OS,
bool IsLittleEndian) {
- return new MachObjectWriter(MOTW, OS, is64Bit, CPUType, CPUSubtype,
- IsLittleEndian);
+ return new MachObjectWriter(MOTW, OS, IsLittleEndian);
}
diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp
index 9556a7d9e32..db7e20cfc01 100644
--- a/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/ARMAsmBackend.cpp
@@ -29,6 +29,10 @@ using namespace llvm;
namespace {
class ARMMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class ARMAsmBackend : public TargetAsmBackend {
@@ -385,10 +389,11 @@ public:
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
// FIXME: Subtarget info should be derived. Force v7 for now.
- return createMachObjectWriter(new ARMMachObjectWriter,
- OS, /*Is64Bit=*/false,
- object::mach::CTM_ARM,
- object::mach::CSARM_V7,
+ return createMachObjectWriter(new ARMMachObjectWriter(
+ /*Is64Bit=*/false,
+ object::mach::CTM_ARM,
+ object::mach::CSARM_V7),
+ OS,
/*IsLittleEndian=*/true);
}
diff --git a/lib/Target/PowerPC/PPCAsmBackend.cpp b/lib/Target/PowerPC/PPCAsmBackend.cpp
index d8ab689bfa7..bf437e3aded 100644
--- a/lib/Target/PowerPC/PPCAsmBackend.cpp
+++ b/lib/Target/PowerPC/PPCAsmBackend.cpp
@@ -20,6 +20,10 @@ using namespace llvm;
namespace {
class PPCMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class PPCAsmBackend : public TargetAsmBackend {
@@ -95,12 +99,12 @@ namespace {
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
bool is64 = getPointerSize() == 8;
- return createMachObjectWriter(new PPCMachObjectWriter,
- OS, /*Is64Bit=*/is64,
- (is64 ? object::mach::CTM_PowerPC64 :
- object::mach::CTM_PowerPC),
- object::mach::CSPPC_ALL,
- /*IsLittleEndian=*/false);
+ return createMachObjectWriter(new PPCMachObjectWriter(
+ /*Is64Bit=*/is64,
+ (is64 ? object::mach::CTM_PowerPC64 :
+ object::mach::CTM_PowerPC),
+ object::mach::CSPPC_ALL),
+ OS, /*IsLittleEndian=*/false);
}
virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
diff --git a/lib/Target/X86/X86AsmBackend.cpp b/lib/Target/X86/X86AsmBackend.cpp
index 3c1c4592dcb..d137875e2cf 100644
--- a/lib/Target/X86/X86AsmBackend.cpp
+++ b/lib/Target/X86/X86AsmBackend.cpp
@@ -47,6 +47,10 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
namespace {
class X86MachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class X86AsmBackend : public TargetAsmBackend {
@@ -365,11 +369,11 @@ public:
: DarwinX86AsmBackend(T) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMachObjectWriter(new X86MachObjectWriter,
- OS, /*Is64Bit=*/false,
- object::mach::CTM_i386,
- object::mach::CSX86_ALL,
- /*IsLittleEndian=*/true);
+ return createMachObjectWriter(new X86MachObjectWriter(
+ /*Is64Bit=*/false,
+ object::mach::CTM_i386,
+ object::mach::CSX86_ALL),
+ OS, /*IsLittleEndian=*/true);
}
};
@@ -381,11 +385,11 @@ public:
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMachObjectWriter(new X86MachObjectWriter,
- OS, /*Is64Bit=*/true,
- object::mach::CTM_x86_64,
- object::mach::CSX86_ALL,
- /*IsLittleEndian=*/true);
+ return createMachObjectWriter(new X86MachObjectWriter(
+ /*Is64Bit=*/true,
+ object::mach::CTM_x86_64,
+ object::mach::CSX86_ALL),
+ OS, /*IsLittleEndian=*/true);
}
virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-19 02:13:48 +0000