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-rw-r--r--lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp13
-rw-r--r--test/ExecutionEngine/MCJIT/lit.local.cfg3
-rw-r--r--test/ExecutionEngine/OrcMCJIT/lit.local.cfg3
-rw-r--r--test/ExecutionEngine/OrcMCJIT/pr32650.ll28
4 files changed, 37 insertions, 10 deletions
diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
index c4b9b961885..777db30dd53 100644
--- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
+++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
@@ -1324,12 +1324,12 @@ RuntimeDyldELF::processRelocationRef(
Obj.getPlatformFlags(AbiVariant);
AbiVariant &= ELF::EF_PPC64_ABI;
// A PPC branch relocation will need a stub function if the target is
- // an external symbol (Symbol::ST_Unknown) or if the target address
+ // an external symbol (Value.SymbolName set) or if the target address
// is not within the signed 24-bits branch address.
SectionEntry &Section = Sections[SectionID];
uint8_t *Target = Section.getAddressWithOffset(Offset);
bool RangeOverflow = false;
- if (SymType != SymbolRef::ST_Unknown) {
+ if (!Value.SymbolName) {
if (AbiVariant != 2) {
// In the ELFv1 ABI, a function call may point to the .opd entry,
// so the final symbol value is calculated based on the relocation
@@ -1348,15 +1348,12 @@ RuntimeDyldELF::processRelocationRef(
// If it is within 26-bits branch range, just set the branch target
if (SignExtend64<26>(delta) == delta) {
RelocationEntry RE(SectionID, Offset, RelType, Value.Addend);
- if (Value.SymbolName)
- addRelocationForSymbol(RE, Value.SymbolName);
- else
- addRelocationForSection(RE, Value.SectionID);
+ addRelocationForSection(RE, Value.SectionID);
} else {
RangeOverflow = true;
}
}
- if (SymType == SymbolRef::ST_Unknown || RangeOverflow) {
+ if (Value.SymbolName || RangeOverflow) {
// It is an external symbol (SymbolRef::ST_Unknown) or within a range
// larger than 24-bits.
StubMap::const_iterator i = Stubs.find(Value);
@@ -1412,7 +1409,7 @@ RuntimeDyldELF::processRelocationRef(
RelType, 0);
Section.advanceStubOffset(getMaxStubSize());
}
- if (SymType == SymbolRef::ST_Unknown) {
+ if (Value.SymbolName) {
// Restore the TOC for external calls
if (AbiVariant == 2)
writeInt32BE(Target + 4, 0xE8410018); // ld r2,28(r1)
diff --git a/test/ExecutionEngine/MCJIT/lit.local.cfg b/test/ExecutionEngine/MCJIT/lit.local.cfg
index f9814035773..e2535ef1dbf 100644
--- a/test/ExecutionEngine/MCJIT/lit.local.cfg
+++ b/test/ExecutionEngine/MCJIT/lit.local.cfg
@@ -9,7 +9,8 @@ else:
# FIXME: autoconf and cmake produce different arch names. We should normalize
# them before getting here.
if root.host_arch not in ['i386', 'x86', 'x86_64', 'AMD64',
- 'AArch64', 'ARM', 'Mips', 'PowerPC', 'ppc64', 'SystemZ']:
+ 'AArch64', 'ARM', 'Mips',
+ 'PowerPC', 'ppc64', 'ppc64le', 'SystemZ']:
config.unsupported = True
if 'armv7' in root.host_arch:
diff --git a/test/ExecutionEngine/OrcMCJIT/lit.local.cfg b/test/ExecutionEngine/OrcMCJIT/lit.local.cfg
index f9814035773..e2535ef1dbf 100644
--- a/test/ExecutionEngine/OrcMCJIT/lit.local.cfg
+++ b/test/ExecutionEngine/OrcMCJIT/lit.local.cfg
@@ -9,7 +9,8 @@ else:
# FIXME: autoconf and cmake produce different arch names. We should normalize
# them before getting here.
if root.host_arch not in ['i386', 'x86', 'x86_64', 'AMD64',
- 'AArch64', 'ARM', 'Mips', 'PowerPC', 'ppc64', 'SystemZ']:
+ 'AArch64', 'ARM', 'Mips',
+ 'PowerPC', 'ppc64', 'ppc64le', 'SystemZ']:
config.unsupported = True
if 'armv7' in root.host_arch:
diff --git a/test/ExecutionEngine/OrcMCJIT/pr32650.ll b/test/ExecutionEngine/OrcMCJIT/pr32650.ll
new file mode 100644
index 00000000000..bbf68aea512
--- /dev/null
+++ b/test/ExecutionEngine/OrcMCJIT/pr32650.ll
@@ -0,0 +1,28 @@
+; RUN: %lli -jit-kind=orc-mcjit %s
+
+; This test is intended to verify that a function weakly defined in
+; JITted code, and strongly defined in the main executable, can be
+; correctly resolved when called from elsewhere in JITted code.
+
+; This test makes the assumption that the lli executable in compiled
+; to export symbols (e.g. --export-dynamic), and that is actually does
+; contain the symbol LLVMInitializeCodeGen. (Note that this function
+; is not actually called by the test. The test simply verifes that
+; the reference can be resolved without relocation errors.)
+
+define linkonce_odr void @LLVMInitializeCodeGen() {
+entry:
+ ret void
+}
+
+define void @test() {
+entry:
+ call void @LLVMInitializeCodeGen()
+ ret void
+}
+
+define i32 @main() {
+entry:
+ ret i32 0
+}
+