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-rw-r--r--include/llvm/CodeGen/MIRParser/MIRParser.h6
-rw-r--r--include/llvm/ExecutionEngine/RuntimeDyld.h5
-rw-r--r--include/llvm/Support/raw_ostream.h4
-rw-r--r--include/llvm/TableGen/Record.h6
-rw-r--r--lib/CodeGen/MIRPrintingPass.cpp4
-rw-r--r--lib/ExecutionEngine/MCJIT/MCJIT.h15
-rw-r--r--lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp90
-rw-r--r--lib/Transforms/Instrumentation/SafeStack.cpp7
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp42
9 files changed, 89 insertions, 90 deletions
diff --git a/include/llvm/CodeGen/MIRParser/MIRParser.h b/include/llvm/CodeGen/MIRParser/MIRParser.h
index 67b756d5e88..a569d5ec1f5 100644
--- a/include/llvm/CodeGen/MIRParser/MIRParser.h
+++ b/include/llvm/CodeGen/MIRParser/MIRParser.h
@@ -1,4 +1,4 @@
-//===- MIRParser.h - MIR serialization format parser ----------------------===//
+//===- MIRParser.h - MIR serialization format parser ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -37,7 +37,7 @@ class MIRParser : public MachineFunctionInitializer {
public:
MIRParser(std::unique_ptr<MIRParserImpl> Impl);
MIRParser(const MIRParser &) = delete;
- ~MIRParser();
+ ~MIRParser() override;
/// Parse the optional LLVM IR module that's embedded in the MIR file.
///
@@ -78,4 +78,4 @@ createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context);
} // end namespace llvm
-#endif
+#endif // LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
diff --git a/include/llvm/ExecutionEngine/RuntimeDyld.h b/include/llvm/ExecutionEngine/RuntimeDyld.h
index 7aaee150566..385b8d0a30b 100644
--- a/include/llvm/ExecutionEngine/RuntimeDyld.h
+++ b/include/llvm/ExecutionEngine/RuntimeDyld.h
@@ -69,7 +69,8 @@ public:
virtual object::OwningBinary<object::ObjectFile>
getObjectForDebug(const object::ObjectFile &Obj) const = 0;
- uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const;
+ uint64_t
+ getSectionLoadAddress(const object::SectionRef &Sec) const override;
protected:
virtual void anchor();
@@ -252,4 +253,4 @@ private:
} // end namespace llvm
-#endif
+#endif // LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
diff --git a/include/llvm/Support/raw_ostream.h b/include/llvm/Support/raw_ostream.h
index d5374d4447a..e5cc40e7d6b 100644
--- a/include/llvm/Support/raw_ostream.h
+++ b/include/llvm/Support/raw_ostream.h
@@ -536,9 +536,9 @@ class buffer_ostream : public raw_svector_ostream {
public:
buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {}
- ~buffer_ostream() { OS << str(); }
+ ~buffer_ostream() override { OS << str(); }
};
} // end llvm namespace
-#endif
+#endif // LLVM_SUPPORT_RAW_OSTREAM_H
diff --git a/include/llvm/TableGen/Record.h b/include/llvm/TableGen/Record.h
index 2bbb1b90339..eb1c5c78b9c 100644
--- a/include/llvm/TableGen/Record.h
+++ b/include/llvm/TableGen/Record.h
@@ -366,7 +366,7 @@ class TypedInit : public Init {
protected:
explicit TypedInit(InitKind K, RecTy *T) : Init(K), Ty(T) {}
- ~TypedInit() {
+ ~TypedInit() override {
// If this is a DefInit we need to delete the RecordRecTy.
if (getKind() == IK_DefInit)
delete Ty;
@@ -1587,6 +1587,6 @@ Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
const std::string &Name, const std::string &Scoper);
-} // End llvm namespace
+} // end llvm namespace
-#endif
+#endif // LLVM_TABLEGEN_RECORD_H
diff --git a/lib/CodeGen/MIRPrintingPass.cpp b/lib/CodeGen/MIRPrintingPass.cpp
index 13d61e65d7e..8e7566a4e46 100644
--- a/lib/CodeGen/MIRPrintingPass.cpp
+++ b/lib/CodeGen/MIRPrintingPass.cpp
@@ -40,7 +40,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
MachineFunctionPass::getAnalysisUsage(AU);
}
- virtual bool runOnMachineFunction(MachineFunction &MF) override {
+ bool runOnMachineFunction(MachineFunction &MF) override {
std::string Str;
raw_string_ostream StrOS(Str);
printMIR(StrOS, MF);
@@ -48,7 +48,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
return false;
}
- virtual bool doFinalization(Module &M) override {
+ bool doFinalization(Module &M) override {
printMIR(OS, M);
OS << MachineFunctions;
return false;
diff --git a/lib/ExecutionEngine/MCJIT/MCJIT.h b/lib/ExecutionEngine/MCJIT/MCJIT.h
index a45173c2da8..f27aa39f2d5 100644
--- a/lib/ExecutionEngine/MCJIT/MCJIT.h
+++ b/lib/ExecutionEngine/MCJIT/MCJIT.h
@@ -223,12 +223,13 @@ public:
/// FindFunctionNamed - Search all of the active modules to find the function that
/// defines FnName. This is very slow operation and shouldn't be used for
/// general code.
- virtual Function *FindFunctionNamed(const char *FnName) override;
+ Function *FindFunctionNamed(const char *FnName) override;
- /// FindGlobalVariableNamed - Search all of the active modules to find the global variable
- /// that defines Name. This is very slow operation and shouldn't be used for
- /// general code.
- virtual GlobalVariable *FindGlobalVariableNamed(const char *Name, bool AllowInternal = false) override;
+ /// FindGlobalVariableNamed - Search all of the active modules to find the
+ /// global variable that defines Name. This is very slow operation and
+ /// shouldn't be used for general code.
+ GlobalVariable *FindGlobalVariableNamed(const char *Name,
+ bool AllowInternal = false) override;
/// Sets the object manager that MCJIT should use to avoid compilation.
void setObjectCache(ObjectCache *manager) override;
@@ -335,6 +336,6 @@ protected:
bool CheckFunctionsOnly);
};
-} // End llvm namespace
+} // end llvm namespace
-#endif
+#endif // LLVM_LIB_EXECUTIONENGINE_MCJIT_MCJIT_H
diff --git a/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp b/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
index 9eee4a0f3d8..2e353cbb9a2 100644
--- a/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
@@ -185,14 +185,14 @@ public:
X86AddressSanitizer(const MCSubtargetInfo &STI)
: X86AsmInstrumentation(STI), RepPrefix(false), OrigSPOffset(0) {}
- virtual ~X86AddressSanitizer() {}
+ ~X86AddressSanitizer() override {}
// X86AsmInstrumentation implementation:
- virtual void InstrumentAndEmitInstruction(const MCInst &Inst,
- OperandVector &Operands,
- MCContext &Ctx,
- const MCInstrInfo &MII,
- MCStreamer &Out) override {
+ void InstrumentAndEmitInstruction(const MCInst &Inst,
+ OperandVector &Operands,
+ MCContext &Ctx,
+ const MCInstrInfo &MII,
+ MCStreamer &Out) override {
InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
if (RepPrefix)
EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
@@ -506,7 +506,7 @@ public:
X86AddressSanitizer32(const MCSubtargetInfo &STI)
: X86AddressSanitizer(STI) {}
- virtual ~X86AddressSanitizer32() {}
+ ~X86AddressSanitizer32() override {}
unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
@@ -535,9 +535,9 @@ public:
OrigSPOffset += 4;
}
- virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override {
+ void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
assert(LocalFrameReg != X86::NoRegister);
@@ -565,9 +565,9 @@ public:
StoreFlags(Out);
}
- virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override {
+ void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
assert(LocalFrameReg != X86::NoRegister);
@@ -586,18 +586,18 @@ public:
}
}
- virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
- bool IsWrite,
- const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override;
- virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
- bool IsWrite,
- const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override;
- virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
- MCStreamer &Out) override;
+ void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
+ bool IsWrite,
+ const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override;
+ void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
+ bool IsWrite,
+ const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override;
+ void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+ MCStreamer &Out) override;
private:
void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
@@ -763,7 +763,7 @@ public:
X86AddressSanitizer64(const MCSubtargetInfo &STI)
: X86AddressSanitizer(STI) {}
- virtual ~X86AddressSanitizer64() {}
+ ~X86AddressSanitizer64() override {}
unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
@@ -792,9 +792,9 @@ public:
OrigSPOffset += 8;
}
- virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override {
+ void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
assert(LocalFrameReg != X86::NoRegister);
@@ -823,9 +823,9 @@ public:
StoreFlags(Out);
}
- virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override {
+ void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override {
unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
assert(LocalFrameReg != X86::NoRegister);
@@ -845,18 +845,18 @@ public:
}
}
- virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
- bool IsWrite,
- const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override;
- virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
- bool IsWrite,
- const RegisterContext &RegCtx,
- MCContext &Ctx,
- MCStreamer &Out) override;
- virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
- MCStreamer &Out) override;
+ void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
+ bool IsWrite,
+ const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override;
+ void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
+ bool IsWrite,
+ const RegisterContext &RegCtx,
+ MCContext &Ctx,
+ MCStreamer &Out) override;
+ void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+ MCStreamer &Out) override;
private:
void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
@@ -1080,4 +1080,4 @@ CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
return new X86AsmInstrumentation(STI);
}
-} // End llvm namespace
+} // end llvm namespace
diff --git a/lib/Transforms/Instrumentation/SafeStack.cpp b/lib/Transforms/Instrumentation/SafeStack.cpp
index 0ea61e439c5..cf68653afc6 100644
--- a/lib/Transforms/Instrumentation/SafeStack.cpp
+++ b/lib/Transforms/Instrumentation/SafeStack.cpp
@@ -220,11 +220,11 @@ public:
initializeSafeStackPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<AAResultsWrapperPass>();
}
- virtual bool doInitialization(Module &M) {
+ bool doInitialization(Module &M) override {
DL = &M.getDataLayout();
StackPtrTy = Type::getInt8PtrTy(M.getContext());
@@ -235,8 +235,7 @@ public:
return false;
}
- bool runOnFunction(Function &F);
-
+ bool runOnFunction(Function &F) override;
}; // class SafeStack
Constant *SafeStack::getOrCreateUnsafeStackPtr(Module &M) {
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index e242a965ff9..71800a5606c 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -1,4 +1,4 @@
-//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
+//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. --*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -12,7 +12,6 @@
//
//===----------------------------------------------------------------------===//
-
#include "CodeGenDAGPatterns.h"
#include "CodeGenSchedule.h"
#include "CodeGenTarget.h"
@@ -26,6 +25,7 @@
#include <cstdio>
#include <map>
#include <vector>
+
using namespace llvm;
namespace {
@@ -70,7 +70,7 @@ private:
void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
};
-} // End anonymous namespace
+} // end anonymous namespace
static void PrintDefList(const std::vector<Record*> &Uses,
unsigned Num, raw_ostream &OS) {
@@ -190,7 +190,6 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
}
}
-
/// Initialize data structures for generating operand name mappings.
///
/// \param Operands [out] A map used to generate the OpName enum with operand
@@ -257,9 +256,9 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
OS << "OPERAND_LAST";
OS << "\n};\n";
- OS << "} // End namespace OpName\n";
- OS << "} // End namespace " << Namespace << "\n";
- OS << "} // End namespace llvm\n";
+ OS << "} // end namespace OpName\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif //GET_INSTRINFO_OPERAND_ENUM\n";
OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n";
@@ -298,8 +297,8 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
OS << " return -1;\n";
}
OS << "}\n";
- OS << "} // End namespace " << Namespace << "\n";
- OS << "} // End namespace llvm\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif //GET_INSTRINFO_NAMED_OPS\n";
}
@@ -328,9 +327,9 @@ void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
}
OS << " OPERAND_TYPE_LIST_END" << "\n};\n";
- OS << "} // End namespace OpTypes\n";
- OS << "} // End namespace " << Namespace << "\n";
- OS << "} // End namespace llvm\n";
+ OS << "} // end namespace OpTypes\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
}
@@ -419,7 +418,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
<< NumberedInstructions.size() << ");\n}\n\n";
- OS << "} // End llvm namespace \n";
+ OS << "} // end llvm namespace \n";
OS << "#endif // GET_INSTRINFO_MC_DESC\n\n";
@@ -432,9 +431,9 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
OS << "struct " << ClassName << " : public TargetInstrInfo {\n"
<< " explicit " << ClassName
<< "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1);\n"
- << " virtual ~" << ClassName << "();\n"
+ << " ~" << ClassName << "() override {}\n"
<< "};\n";
- OS << "} // End llvm namespace \n";
+ OS << "} // end llvm namespace \n";
OS << "#endif // GET_INSTRINFO_HEADER\n\n";
@@ -450,9 +449,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< " : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode) {\n"
<< " InitMCInstrInfo(" << TargetName << "Insts, " << TargetName
<< "InstrNameIndices, " << TargetName << "InstrNameData, "
- << NumberedInstructions.size() << ");\n}\n"
- << ClassName << "::~" << ClassName << "() {}\n";
- OS << "} // End llvm namespace \n";
+ << NumberedInstructions.size() << ");\n}\n";
+ OS << "} // end llvm namespace \n";
OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
@@ -596,9 +594,9 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
OS << " " << Class.Name << "\t= " << Num++ << ",\n";
OS << " SCHED_LIST_END = " << SchedModels.numInstrSchedClasses() << "\n";
OS << " };\n";
- OS << "} // End Sched namespace\n";
- OS << "} // End " << Namespace << " namespace\n";
- OS << "} // End llvm namespace \n";
+ OS << "} // end Sched namespace\n";
+ OS << "} // end " << Namespace << " namespace\n";
+ OS << "} // end llvm namespace \n";
OS << "#endif // GET_INSTRINFO_ENUM\n\n";
}
@@ -610,4 +608,4 @@ void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
EmitMapTable(RK, OS);
}
-} // End llvm namespace
+} // end llvm namespace
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-29 09:40:16 +0000