diff options
| -rw-r--r-- | lib/Target/X86/X86.td | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/clwb.ll | 7 |
2 files changed, 14 insertions, 1 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index ba97982e333..cc4c8823c3d 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -740,7 +740,13 @@ class SkylakeServerProc<string Name> : ProcModel<Name, SkylakeServerModel, def : SkylakeServerProc<"skylake-avx512">; def : SkylakeServerProc<"skx">; // Legacy alias. -def CNLFeatures : ProcessorFeatures<SKXFeatures.Value, [ +def CNLFeatures : ProcessorFeatures<SKLFeatures.Value, [ + FeatureAVX512, + FeatureCDI, + FeatureDQI, + FeatureBWI, + FeatureVLX, + FeaturePKU, FeatureVBMI, FeatureIFMA, FeatureSHA diff --git a/test/CodeGen/X86/clwb.ll b/test/CodeGen/X86/clwb.ll index 0bbb14917f7..e5906c6ce68 100644 --- a/test/CodeGen/X86/clwb.ll +++ b/test/CodeGen/X86/clwb.ll @@ -1,5 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; NOTE: clwb is available in Skylake Server, not available in the newer +; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch. ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s +; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL +; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake | FileCheck %s + +; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb define void @clwb(i8* %p) nounwind { ; CHECK-LABEL: clwb: |