diff options
author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-30 18:48:35 +0000 |
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committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-30 18:48:35 +0000 |
commit | d993b016d170e441de08153dfc349dbaafe44826 (patch) | |
tree | 2626a61a4caaa0fe70f4c7dda6eccf2b69393fd6 /utils | |
parent | 47856b25a74f4676cbcd3a38b9db221dc5a182b3 (diff) |
[globalisel][tablegen] Add support for specific immediates in the match pattern
This enables a few rules such as ARM's uxtb instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319457 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/GlobalISelEmitter.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp index f82b2fd3e9b..d9048c231c2 100644 --- a/utils/TableGen/GlobalISelEmitter.cpp +++ b/utils/TableGen/GlobalISelEmitter.cpp @@ -2812,6 +2812,14 @@ Expected<action_iterator> GlobalISelEmitter::importExplicitUseRenderer( return failedImport("Dst pattern child isn't a leaf node or an MBB" + llvm::to_string(*DstChild)); } + // It could be a specific immediate in which case we should just check for + // that immediate. + if (const IntInit *ChildIntInit = + dyn_cast<IntInit>(DstChild->getLeafValue())) { + DstMIBuilder.addRenderer<ImmRenderer>(ChildIntInit->getValue()); + return InsertPt; + } + // Otherwise, we're looking for a bog-standard RegisterClass operand. if (auto *ChildDefInit = dyn_cast<DefInit>(DstChild->getLeafValue())) { auto *ChildRec = ChildDefInit->getDef(); |