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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-19 21:47:10 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-19 21:47:10 +0000
commit234b36e423440483bd70348d31942936dd0f9ef7 (patch)
tree631fd3054860776e79c70aab6364b536e559c211 /unittests
parent43c2ba74fca95ca61abf3717b10a8a3b7369f3b3 (diff)
[CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the interfaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321112 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'unittests')
-rw-r--r--unittests/CodeGen/MachineOperandTest.cpp17
1 files changed, 17 insertions, 0 deletions
diff --git a/unittests/CodeGen/MachineOperandTest.cpp b/unittests/CodeGen/MachineOperandTest.cpp
index cce85cafb2a..78a20b83648 100644
--- a/unittests/CodeGen/MachineOperandTest.cpp
+++ b/unittests/CodeGen/MachineOperandTest.cpp
@@ -10,6 +10,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/IR/Constants.h"
+#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
@@ -382,4 +383,20 @@ TEST(MachineOperandTest, PrintIntrinsicID) {
}
}
+TEST(MachineOperandTest, PrintPredicate) {
+ // Create a MachineOperand with a generic intrinsic ID.
+ MachineOperand MO = MachineOperand::CreatePredicate(CmpInst::ICMP_EQ);
+
+ // Checking some preconditions on the newly created
+ // MachineOperand.
+ ASSERT_TRUE(MO.isPredicate());
+ ASSERT_TRUE(MO.getPredicate() == CmpInst::ICMP_EQ);
+
+ std::string str;
+ // Print a MachineOperand containing a int predicate ICMP_EQ.
+ raw_string_ostream OS(str);
+ MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr);
+ ASSERT_TRUE(OS.str() == "intpred(eq)");
+}
+
} // end namespace