summaryrefslogtreecommitdiff
path: root/test
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-08-11 18:07:11 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-11 18:07:11 +0000
commitf6713916fb4504aab617f0e317689acd878cc37f (patch)
tree23fabdc94cf0a61748752232a0262af3e744931b /test
parent5c1ff1f2f27cb0701b9768c7ef0f944849616888 (diff)
ARM push of a single register encodes as pre-indexed STR.
Per the ARM ARM, a 'push' of a single register encodes as an STR, not an STM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/ARM/str_pre-2.ll2
-rw-r--r--test/MC/ARM/basic-arm-instructions.s3
2 files changed, 2 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/str_pre-2.ll b/test/CodeGen/ARM/str_pre-2.ll
index 8d0c7a5fe16..f4e3a44d56e 100644
--- a/test/CodeGen/ARM/str_pre-2.ll
+++ b/test/CodeGen/ARM/str_pre-2.ll
@@ -7,7 +7,7 @@
define i64 @t(i64 %a) nounwind readonly {
entry:
-; CHECK: str lr, [sp, #-4]!
+; CHECK: push {lr}
; CHECK: pop {lr}
%0 = load i64** @b, align 4
%1 = load i64* %0, align 4
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index adcecb5b382..2cec2849454 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1071,8 +1071,7 @@ Lforward:
push {r7}
push {r7, r8, r9, r10}
-@ FIXME: push of a single register should encode as "str r7, [sp, #-4]!"
-@ CHECK-FIXME: push {r7} @ encoding: [0x04,0x70,0x2d,0xe5]
+@ CHECK: push {r7} @ encoding: [0x04,0x70,0x2d,0xe5]
@ CHECK: push {r7, r8, r9, r10} @ encoding: [0x80,0x07,0x2d,0xe9]