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| author | Reid Kleckner <rnk@google.com> | 2018-02-14 00:19:26 +0000 |
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| committer | Reid Kleckner <rnk@google.com> | 2018-02-14 00:19:26 +0000 |
| commit | ca89cbee8817c489d7d9cbf6d2371b8d722016c4 (patch) | |
| tree | 5b75cf6d07c5185b2aaf26d5eb78c5f799874ef0 /test | |
| parent | 10dd7c84dce552f03f8e1c25e27eb8931fcf140a (diff) | |
Merging r324645:
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r324645 | dwmw2 | 2018-02-08 12:06:05 -0800 (Thu, 08 Feb 2018) | 5 lines
[X86] Support 'V' register operand modifier
This allows the register name to be printed without the leading '%'.
This can be used for emitting calls to the retpoline thunks from inline
asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@325083 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/inline-asm-modifier-V.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/X86/inline-asm-modifier-V.ll b/test/CodeGen/X86/inline-asm-modifier-V.ll new file mode 100644 index 00000000000..5a7f3fdd25f --- /dev/null +++ b/test/CodeGen/X86/inline-asm-modifier-V.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck -check-prefix=X86 %s +; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck -check-prefix=X64 %s + +; If the target does not have 64-bit integer registers, emit 32-bit register +; names. + +; X86: call __x86_indirect_thunk_e{{[abcd]}}x +; X64: call __x86_indirect_thunk_r + +define void @q_modifier(i32* %p) { +entry: + tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p) + ret void +} |