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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2015-08-19 19:04:47 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2015-08-19 19:04:47 +0000
commitb326c1268ce25ef0e1d9e780d2977b35e3f39bdf (patch)
tree8cc5d3214d0346a25fbdeffb64041479edb508a1 /test
parentbaf422e9ece686d0c1ad95b35e1e8d963802789f (diff)
Temporary fix for the self-host failures introduced by rL244921.
This revision has introduced an issue that only affects bootstrapped compiler when it is printing the ASM. I am working on resolving the issue, but in the meantime, I'm disabling the legalization of scalar_to_vector operation for v2i64 and the associated testing until I can get this fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245481 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll6
-rw-r--r--test/CodeGen/PowerPC/vsx.ll16
2 files changed, 11 insertions, 11 deletions
diff --git a/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll b/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
index 535ddf4f574..01edab0eb76 100644
--- a/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
+++ b/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
@@ -59,9 +59,9 @@ entry:
%splat.splatinsert = insertelement <2 x i64> undef, i64 %0, i32 0
%splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer
ret <2 x i64> %splat.splat
-; CHECK: mtvsrd {{[0-9]+}}, 3
-; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
-; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
+; FIXME-CHECK: mtvsrd {{[0-9]+}}, 3
+; FIXME-CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
+; FIXME-CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
}
; Function Attrs: nounwind
diff --git a/test/CodeGen/PowerPC/vsx.ll b/test/CodeGen/PowerPC/vsx.ll
index b4b1d248d1a..3820e19c077 100644
--- a/test/CodeGen/PowerPC/vsx.ll
+++ b/test/CodeGen/PowerPC/vsx.ll
@@ -1226,14 +1226,14 @@ define <2 x i32> @test80(i32 %v) {
; CHECK-FISL: blr
; CHECK-LE-LABEL: @test80
-; CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3
-; CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI
-; CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]]
-; CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]]
-; CHECK-LE-DAG: xxspltd 34, [[V1]]
-; CHECK-LE-DAG: xxswapd 35, [[V2]]
-; CHECK-LE: vaddudm 2, 2, 3
-; CHECK-LE: blr
+; FIXME-CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3
+; FIXME-CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI
+; FIXME-CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]]
+; FIXME-CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]]
+; FIXME-CHECK-LE-DAG: xxspltd 34, [[V1]]
+; FIXME-CHECK-LE-DAG: xxswapd 35, [[V2]]
+; FIXME-CHECK-LE: vaddudm 2, 2, 3
+; FIXME-CHECK-LE: blr
}
define <2 x double> @test81(<4 x float> %b) {