diff options
author | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-12-03 03:31:45 +0000 |
---|---|---|
committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2017-12-03 03:31:45 +0000 |
commit | 8b47f7bedd22f8afe3334c545f74faaddd2cc15c (patch) | |
tree | 1ed0b6c2a2828017a18ebb07c842b4bd3102afcf /test | |
parent | fec09ca00e80418c9445f2a6ce33004eb59221b3 (diff) |
CodeGen: Fix SelectionDAGISel::LowerArguments for sret addr space
SelectionDAGISel::LowerArguments assumes sret addr space is 0, which is
not true for amdgcn---amdgiz target.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D40255
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319630 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/AMDGPU/function-returns.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/AMDGPU/function-returns.ll b/test/CodeGen/AMDGPU/function-returns.ll index f5cd2c0cf1e..4a24f5e285b 100644 --- a/test/CodeGen/AMDGPU/function-returns.ll +++ b/test/CodeGen/AMDGPU/function-returns.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s -; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89 %s -; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9 %s +; RUN: llc -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s +; RUN: llc -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89 %s +; RUN: llc -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9 %s ; GCN-LABEL: {{^}}i1_func_void: ; GCN: buffer_load_ubyte v0, off @@ -376,13 +376,13 @@ define {i8, i32} @struct_i8_i32_func_void() #0 { ; GCN: buffer_load_dword [[VAL1:v[0-9]+]] ; GCN: buffer_store_byte [[VAL0]], v0, s[0:3], s4 offen{{$}} ; GCN: buffer_store_dword [[VAL1]], v0, s[0:3], s4 offen offset:4{{$}} -define void @void_func_sret_struct_i8_i32({ i8, i32 }* sret %arg0) #0 { +define void @void_func_sret_struct_i8_i32({ i8, i32 } addrspace(5)* sret %arg0) #0 { %val0 = load volatile i8, i8 addrspace(1)* undef %val1 = load volatile i32, i32 addrspace(1)* undef - %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0 - %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1 - store i8 %val0, i8* %gep0 - store i32 %val1, i32* %gep1 + %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0 + %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1 + store i8 %val0, i8 addrspace(5)* %gep0 + store i32 %val1, i32 addrspace(5)* %gep1 ret void } |