[ARC] Add instruction subset for the ARC backend.

Reviewers: petecoup, kparzysz

Reviewed By: petecoup

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D37983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319609 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 394 insertions, 0 deletions

diff --git a/test/MC/Disassembler/ARC/alu.txt b/test/MC/Disassembler/ARC/alu.txt
index b4461c73829..974168a4eea 100644
--- a/test/MC/Disassembler/ARC/alu.txt
+++ b/test/MC/Disassembler/ARC/alu.txt
@@ -72,4 +72,11 @@
 # CHECK: sub %r0, %r22, %r0
 0x02 0x26 0x00 0x20
 
+# CHECK: sub1 %r3, %fp, %r1
+0x17 0x23 0x43 0x30
 
+# CHECK: sub2 %r3, %fp, 17
+0x58 0x23 0x43 0x34
+
+# CHECK: sub3 %fp, %fp, -1
+0x99 0x23 0xff 0x3f
diff --git a/test/MC/Disassembler/ARC/compact.txt b/test/MC/Disassembler/ARC/compact.txt
new file mode 100644
index 00000000000..c3347cb6f4e
--- /dev/null
+++ b/test/MC/Disassembler/ARC/compact.txt
@@ -0,0 +1,379 @@
+# RUN: llvm-mc -triple=arc -disassemble %s | FileCheck %s
+
+# CHECK: abs_s %r0, %r1
+0x31 0x78
+
+# CHECK: add_s %r0, %r1, %r2
+0x58 0x61
+
+# CHECK: add_s %r0, %r0, %fp
+0x63 0x70
+
+# CHECK: add_s %fp, %fp, -1
+0x67 0x77
+
+# CHECK: add_s %fp, %fp, 6
+0x67 0x76
+
+# CHECK: add_s %r0, %r0, 287454020
+0xc3 0x70 0x22 0x11 0x44 0x33
+
+# CHECK: add_s 0, 287454020, 4
+0xc7 0x74 0x22 0x11 0x44 0x33
+
+# CHECK: add_s %r0, %sp, 64
+0x90 0xc0
+
+# CHECK: add_s %r0, %r0, 64
+0x40 0xe0
+
+# CHECK: add_s %r0, %r1, 7
+0x07 0x69
+
+# CHECK: add_s %sp, %sp, 64
+0xb0 0xc0
+
+# CHECK: add_s %r0, %gp, -4
+0xff 0xcf
+
+# CHECK: add_s %r0, %r1, 4
+0x0c 0x49
+
+# CHECK: add_s %r1, %r0, 4
+0x8c 0x48
+
+# CHECK: add1_s %r0, %r0, %r1
+0x34 0x78
+
+# CHECK: add2_s %r0, %r0, %r1
+0x35 0x78
+
+# CHECK: add3_s %r0, %r0, %r1
+0x36 0x78
+
+# CHECK: and_s %r0, %r0, %r1
+0x24 0x78
+
+# CHECK: asl_s %r0, %r1
+0x3b 0x78
+
+# CHECK: asl_s %r1, %r0, 4
+0x34 0x68
+
+# CHECK: asl_s %r0, %r0, %r1
+0x38 0x78
+
+# CHECK: asl_s %r0, %r0, 16
+0x10 0xb8
+
+# CHECK: asr_s %r0, %r1
+0x3c 0x78
+
+# CHECK: asr_s %r1, %r0, 4
+0x3c 0x68
+
+# CHECK: asr_s %r0, %r0, %r1
+0x3a 0x78
+
+# CHECK: asr_s %r0, %r0, 16
+0x50 0xb8
+
+# CHECK: b_s 256
+0x80 0xf0
+
+# CHECK: b_s -4
+0xfe 0xf1
+
+# CHECK: beq_s -4
+0xfe 0xf3
+
+# CHECK: bne_s -4
+0xfe 0xf5
+
+# CHECK: bgt_s -4
+0x3e 0xf6
+
+# CHECK: bge_s -4
+0x7e 0xf6
+
+# CHECK: blt_s -4
+0xbe 0xf6
+
+# CHECK: ble_s -4
+0xfe 0xf6
+
+# CHECK: bhi_s -4
+0x3e 0xf7
+
+# CHECK: bhs_s -4
+0x7e 0xf7
+
+# CHECK: blo_s -4
+0xbe 0xf7
+
+# CHECK: bls_s -4
+0xfe 0xf7
+
+# CHECK: bclr_s %r0, %r0, 24
+0xb8 0xb8
+
+# CHECK: bic_s %r0, %r0, %r1
+0x26 0x78
+
+# CHECK: bl_s -256
+0xc0 0xff
+
+# CHECK: bmsk_s %r0, %r0, 24
+0xd8 0xb8
+
+# CHECK: brne_s %r0, 0, -128
+0xc0 0xe8
+
+# CHECK: breq_s %r0, 0, -128
+0x40 0xe8
+
+# CHECK: brk_s
+0xff 0x7f
+
+# CHECK: bset_s %r0, %r0, 24
+0x98 0xb8
+
+# CHECK: btst_s %r0, 24
+0xf8 0xb8
+
+# CHECK: cmp_s %r0, %sp
+0x93 0x70
+
+# CHECK: cmp_s %sp, -1
+0x97 0x77
+
+# CHECK: cmp_s %r2, 64
+0xc0 0xe2
+
+# CHECK: ei_s 512
+0x00 0x5e
+
+# CHECK: enter_s 16
+0xe0 0xc1
+
+# CHECK: extb_s %r0, %r1
+0x2f 0x78
+
+# CHECK: exth_s %r0, %r1
+0x30 0x78
+
+# CHECK: j_s [%r0]
+0x00 0x78
+
+# CHECK: j_s [%blink]
+0xe0 0x7e
+
+# CHECK: j_s.d [%r0]
+0x20 0x78
+
+# CHECK: j_s.d [%blink]
+0xe0 0x7f
+
+# CHECK: jeq_s [%blink]
+0xe0 0x7c
+
+# CHECK: jne_s [%blink]
+0xe0 0x7d
+
+# CHECK: jl_s [%r0]
+0x40 0x78
+
+# CHECK: jl_s.d [%r0]
+0x60 0x78
+
+# CHECK: jli_s 512
+0x00 0x5a
+
+# CHECK: ld_s %r0, [%r1, %r2]
+0x40 0x61
+
+# CHECK: ld_s %r0, [%sp, 64]
+0x10 0xc0
+
+# CHECK: ld_s %r0, [%pcl, 512]
+0x80 0xd0
+
+# CHECK: ld_s %r1, [%r0, 64]
+0x30 0x80
+
+# CHECK: ld_s %r0, [%gp, -1024]
+0x00 0xc9
+
+# CHECK: ldb_s %r0, [%r1, %r2]
+0x48 0x61
+
+# CHECK: ldb_s %r0, [%sp, 64]
+0x30 0xc0
+
+# CHECK: ldb_s %r1, [%r0, 16]
+0x30 0x88
+
+# CHECK: ldb_s %r0, [%gp, -256]
+0x00 0xcb
+
+# CHECK: ldh_s %r0, [%r1, %r2]
+0x50 0x61
+
+# CHECK: ldh_s %r1, [%r0, 32]
+0x30 0x90
+
+# CHECK: ldh_s %r0, [%gp, -512]
+0x00 0xcd
+
+# CHECK: ldh_s.x %r1, [%r0, 32]
+0x30 0x98
+
+# CHECK: ld_s %r0, [%r17, 8]
+0x36 0x40
+
+# CHECK: ld_s %r1, [%r17, 8]
+0x36 0x41
+
+# CHECK: ld_s %r2, [%r17, 8]
+0x36 0x42
+
+# CHECK: ld_s %r3, [%r17, 8]
+0x36 0x43
+
+# CHECK: ld_s.as %r0, [%r1, %r2]
+0x40 0x49
+
+# CHECK: ld_s %r1, [%gp, -1024]
+0x00 0x54
+
+# CHECK: ldi_s %r0, [64]
+0x88 0x50
+
+# CHECK: leave_s 16
+0xc0 0xc1
+
+# CHECK: lsr_s %r0, %r1
+0x3d 0x78
+
+# CHECK: lsr_s %r0, %r0, %r1
+0x39 0x78
+
+# CHECK: lsr_s %r0, %r0, 16
+0x30 0xb8
+
+# CHECK: mov_s %r17, -1
+0x2e 0x77
+
+# CHECK: mov_s 0, 5
+0xcf 0x75
+
+# CHECK: mov_s.ne %r0, %r17
+0x3e 0x70
+
+# CHECK: mov_s.ne %r0, 1024
+0xdf 0x70 0x00 0x00 0x00 0x04
+
+# CHECK: mov_s %r0, 128
+0x80 0xd8
+
+# CHECK: mov_s %r16, %r17
+0x32 0x40
+
+# CHECK: mov_s %r16, 1024
+0xd3 0x40 0x00 0x00 0x00 0x04
+
+# CHECK: mov_s 0, %r17
+0x3a 0x46
+
+# CHECK: mov_s 0, 1024
+0xdb 0x46 0x00 0x00 0x00 0x04
+
+# CHECK: mpy_s %r0, %r0, %r1
+0x2c 0x78
+
+# CHECK: mpyuw_s %r0, %r0, %r1
+0x2a 0x78
+
+# CHECK: mpyw_s %r0, %r0, %r1
+0x29 0x78
+
+# CHECK: neg_s %r0, %r1
+0x33 0x78
+
+# CHECK: nop_s
+0xe0 0x78
+
+# CHECK: not_s %r0, %r1
+0x32 0x78
+
+# CHECK: or_s %r0, %r0, %r1
+0x25 0x78
+
+# CHECK: pop_s %r0
+0xe1 0xc0
+
+# CHECK: pop_s %blink
+0xd1 0xc0
+
+# CHECK: push_s %r0
+0xc1 0xc0
+
+# CHECK: push_s %blink
+0xf1 0xc0
+
+# CHECK: sexb_s %r0, %r1
+0x2d 0x78
+
+# CHECK: sexh_s %r0, %r1
+0x2e 0x78
+
+# CHECK: st_s %r0, [%sp, 64]
+0x50 0xc0
+
+# CHECK: st_s %r1, [%r0, 64]
+0x30 0xa0
+
+# CHECK: st_s %r0, [%gp, -1024]
+0x10 0x54
+
+# CHECK: stb_s %r0, [%sp, 64]
+0x70 0xc0
+
+# CHECK: stb_s %r1, [%r0, 16]
+0x30 0xa8
+
+# CHECK: sth_s %r1, [%r0, 32]
+0x30 0xb0
+
+# CHECK: sub_s %r1, %r0, 4
+0x2c 0x68
+
+# CHECK: sub_s.ne %r0, %r0, %r0
+0xc0 0x78
+
+# CHECK: sub_s %r0, %r0, %r1
+0x22 0x78
+
+# CHECK: sub_s %r0, %r0, 16
+0x70 0xb8
+
+# CHECK: sub_s %sp, %sp, 64
+0xb0 0xc1
+
+# CHECK: sub_s %r0, %r1, %r2
+0x50 0x49
+
+# CHECK: swi_s
+0xe0 0x7a
+
+# CHECK: trap_s 32
+0x1e 0x7c
+
+# CHECK: tst_s %r0, %r1
+0x2b 0x78
+
+# CHECK: unimp_s
+0xe0 0x79
+
+# CHECK: xor_s %r0, %r0, %r1
+0x27 0x78
diff --git a/test/MC/Disassembler/ARC/misc.txt b/test/MC/Disassembler/ARC/misc.txt
index e5ab6957421..c64e90f32b4 100644
--- a/test/MC/Disassembler/ARC/misc.txt
+++ b/test/MC/Disassembler/ARC/misc.txt
@@ -40,3 +40,11 @@
 # CHECK: j [%r3]
 0x20 0x20 0xc0 0x00
 
+# CHECK: seteq %r3, %fp, %r1
+0x38 0x23 0x43 0x30
+
+# CHECK: seteq %r3, %fp, 17
+0x78 0x23 0x43 0x34
+
+# CHECK: seteq %fp, %fp, -1
+0xb8 0x23 0xff 0x3f