diff options
author | Nirav Dave <niravd@google.com> | 2017-06-23 20:52:14 +0000 |
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committer | Nirav Dave <niravd@google.com> | 2017-06-23 20:52:14 +0000 |
commit | 309f49b92a1f8cd19a02dbd4a510db01c87d9ebe (patch) | |
tree | 14999ed3247839398fede77c0dc1253987ce18d5 /test | |
parent | 93ca10c6fc059f62410991917361a52fbe425913 (diff) |
Add bitcast store-merge test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306158 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/MergeConsecutiveStores.ll | 31 |
1 files changed, 29 insertions, 2 deletions
diff --git a/test/CodeGen/X86/MergeConsecutiveStores.ll b/test/CodeGen/X86/MergeConsecutiveStores.ll index f89f6e1de1a..55ff1498806 100644 --- a/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -583,8 +583,6 @@ define void @merge_vec_element_and_scalar_load([6 x i64]* %array) { ; CHECK-NEXT: retq } - - ; Don't let a non-consecutive store thwart merging of the last two. define void @almost_consecutive_stores(i8* %p) { store i8 0, i8* %p @@ -601,3 +599,32 @@ define void @almost_consecutive_stores(i8* %p) { ; CHECK-DAG: movw $770, 2(%rdi) ; CHECK: retq } + +; We should be able to merge these. +define void @merge_bitcast(<4 x i32> %v, float* %ptr) { + %fv = bitcast <4 x i32> %v to <4 x float> + + %vecext1 = extractelement <4 x i32> %v, i32 1 + %vecext2 = extractelement <4 x i32> %v, i32 2 + %vecext3 = extractelement <4 x i32> %v, i32 3 + %f0 = extractelement <4 x float> %fv, i32 0 + %f1 = bitcast i32 %vecext1 to float + %f2 = bitcast i32 %vecext2 to float + %f3 = bitcast i32 %vecext3 to float + %idx0 = getelementptr inbounds float, float* %ptr, i64 0 + %idx1 = getelementptr inbounds float, float* %ptr, i64 1 + %idx2 = getelementptr inbounds float, float* %ptr, i64 2 + %idx3 = getelementptr inbounds float, float* %ptr, i64 3 + store float %f0, float* %idx0, align 4 + store float %f1, float* %idx1, align 4 + store float %f2, float* %idx2, align 4 + store float %f3, float* %idx3, align 4 + ret void + +; CHECK-LABEL: merge_bitcast +; CHECK: vmovd %xmm0, (%rdi) +; CHECK-NEXT: vpextrd $1, %xmm0, 4(%rdi) +; CHECK-NEXT: vpextrd $2, %xmm0, 8(%rdi) +; CHECK-NEXT: vpextrd $3, %xmm0, 12(%rdi) +; CHECK-NEXT: retq +} |