diff options
| author | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
| commit | 05cc2c7d76c3ffa504a6096aeedf0a1996d3d4f1 (patch) | |
| tree | bd08f97a5490d1933d2d949eaef1709474bdbb2f /test | |
| parent | b5d9fa1867a288fca27563c4a07c900e7db6fac6 (diff) | |
[mips][micromips] Fix (dis)assembly of bc1(t|f)
Previously these instructions were marked codegen only and had
an under-specified instruction description that did not record the
fcc register.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D38847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315905 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/Disassembler/Mips/micromips32r3/valid-el.txt | 2 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/micromips32r3/valid.txt | 2 | ||||
| -rw-r--r-- | test/MC/Mips/micromips/valid.s | 10 |
3 files changed, 11 insertions, 3 deletions
diff --git a/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt b/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt index 84f498754cd..3a1799dc598 100644 --- a/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt +++ b/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt @@ -55,6 +55,8 @@ 0x26 0x11 0x67 0x45 # CHECK: addi $9, $6, 17767 0x26 0x31 0x67 0xc5 # CHECK: addiu $9, $6, -15001 0xe6 0x00 0x50 0x49 # CHECK: addu $9, $6, $7 +0x80 0x43 0xe6 0xff # CHECK: bc1f -48 +0xa0 0x43 0xe2 0xff # CHECK: bc1t -56 0xe6 0x00 0x90 0x49 # CHECK: sub $9, $6, $7 0xa3 0x00 0xd0 0x21 # CHECK: subu $4, $3, $5 0xe0 0x00 0x90 0x31 # CHECK: sub $6, $zero, $7 diff --git a/test/MC/Disassembler/Mips/micromips32r3/valid.txt b/test/MC/Disassembler/Mips/micromips32r3/valid.txt index 3be26bb5b66..675ef9e4e8b 100644 --- a/test/MC/Disassembler/Mips/micromips32r3/valid.txt +++ b/test/MC/Disassembler/Mips/micromips32r3/valid.txt @@ -55,6 +55,8 @@ 0x11 0x26 0x45 0x67 # CHECK: addi $9, $6, 17767 0x31 0x26 0xc5 0x67 # CHECK: addiu $9, $6, -15001 0x00 0xe6 0x49 0x50 # CHECK: addu $9, $6, $7 +0x43 0x80 0xff 0xe6 # CHECK: bc1f -48 +0x43 0xa0 0xff 0xe2 # CHECK: bc1t -56 0x00 0xe6 0x49 0x90 # CHECK: sub $9, $6, $7 0x00 0xa3 0x21 0xd0 # CHECK: subu $4, $3, $5 0x00 0xe0 0x31 0x90 # CHECK: sub $6, $zero, $7 diff --git a/test/MC/Mips/micromips/valid.s b/test/MC/Mips/micromips/valid.s index cf19a959683..94132dafe06 100644 --- a/test/MC/Mips/micromips/valid.s +++ b/test/MC/Mips/micromips/valid.s @@ -1,4 +1,4 @@ -# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mattr=micromips | FileCheck %s +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -show-inst -mattr=micromips | FileCheck %s .set noat addiusp -16 # CHECK: addiusp -16 # encoding: [0x4f,0xf9] @@ -243,9 +243,13 @@ c.ult.s $fcc7, $f24, $f10 # CHECK: c.ult.s $fcc7, $f24, $f10 # encoding: [0x5 c.un.d $fcc6, $f22, $f24 # CHECK: c.un.d $fcc6, $f22, $f24 # encoding: [0x57,0x16,0xc4,0x7c] c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x54,0x9e,0x20,0x7c] bc1t 8 # CHECK: bc1t 8 # encoding: [0x43,0xa0,0x00,0x04] + # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC1T_MM bc1f 16 # CHECK: bc1f 16 # encoding: [0x43,0x80,0x00,0x08] -bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x43,0xa0,0x00,0x02] -bc1f $fcc2, -20 # CHECK: bc1f $fcc2, -20 # encoding: [0x43,0x80,0xff,0xf6] + # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC1F_MM +bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x43,0xa4,0x00,0x02] + # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC1T_MM +bc1f $fcc2, -20 # CHECK: bc1f $fcc2, -20 # encoding: [0x43,0x88,0xff,0xf6] + # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC1F_MM sync # CHECK: sync # encoding: [0x00,0x00,0x6b,0x7c] sync 0 # CHECK: sync 0 # encoding: [0x00,0x00,0x6b,0x7c] sync 1 # CHECK: sync 1 # encoding: [0x00,0x01,0x6b,0x7c] |