diff options
author | Hans Wennborg <hans@hanshq.net> | 2018-02-02 16:24:08 +0000 |
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committer | Hans Wennborg <hans@hanshq.net> | 2018-02-02 16:24:08 +0000 |
commit | 4b07ed628fe33090d114553618d63f9144c51715 (patch) | |
tree | 54c46b32e9553ae4a8cb45e70d857184dd624f2e /test/Transforms | |
parent | 816adbd1b4a9e874953958d839951279dfbce5b7 (diff) |
Merging r323908:
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r323908 | mareko | 2018-01-31 21:18:04 +0100 (Wed, 31 Jan 2018) | 7 lines
AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D41663
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@324103 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms')
-rw-r--r-- | test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll index f82bf81fbbf..c8a05204bf5 100644 --- a/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll +++ b/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll @@ -723,6 +723,114 @@ define <2 x half> @constant_rtz_pkrtz() { } ; -------------------------------------------------------------------- +; llvm.amdgcn.cvt.pknorm.i16 +; -------------------------------------------------------------------- + +declare <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float, float) nounwind readnone + +; CHECK-LABEL: @undef_lhs_cvt_pknorm_i16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float undef, float %y) +define <2 x i16> @undef_lhs_cvt_pknorm_i16(float %y) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float undef, float %y) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_rhs_cvt_pknorm_i16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float %x, float undef) +define <2 x i16> @undef_rhs_cvt_pknorm_i16(float %x) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float %x, float undef) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_cvt_pknorm_i16( +; CHECK: ret <2 x i16> undef +define <2 x i16> @undef_cvt_pknorm_i16() { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.i16(float undef, float undef) + ret <2 x i16> %cvt +} + +; -------------------------------------------------------------------- +; llvm.amdgcn.cvt.pknorm.u16 +; -------------------------------------------------------------------- + +declare <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float, float) nounwind readnone + +; CHECK-LABEL: @undef_lhs_cvt_pknorm_u16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float undef, float %y) +define <2 x i16> @undef_lhs_cvt_pknorm_u16(float %y) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float undef, float %y) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_rhs_cvt_pknorm_u16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float %x, float undef) +define <2 x i16> @undef_rhs_cvt_pknorm_u16(float %x) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float %x, float undef) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_cvt_pknorm_u16( +; CHECK: ret <2 x i16> undef +define <2 x i16> @undef_cvt_pknorm_u16() { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pknorm.u16(float undef, float undef) + ret <2 x i16> %cvt +} + +; -------------------------------------------------------------------- +; llvm.amdgcn.cvt.pk.i16 +; -------------------------------------------------------------------- + +declare <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32, i32) nounwind readnone + +; CHECK-LABEL: @undef_lhs_cvt_pk_i16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 undef, i32 %y) +define <2 x i16> @undef_lhs_cvt_pk_i16(i32 %y) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 undef, i32 %y) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_rhs_cvt_pk_i16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %x, i32 undef) +define <2 x i16> @undef_rhs_cvt_pk_i16(i32 %x) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 %x, i32 undef) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_cvt_pk_i16( +; CHECK: ret <2 x i16> undef +define <2 x i16> @undef_cvt_pk_i16() { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.i16(i32 undef, i32 undef) + ret <2 x i16> %cvt +} + +; -------------------------------------------------------------------- +; llvm.amdgcn.cvt.pk.u16 +; -------------------------------------------------------------------- + +declare <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32, i32) nounwind readnone + +; CHECK-LABEL: @undef_lhs_cvt_pk_u16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32 undef, i32 %y) +define <2 x i16> @undef_lhs_cvt_pk_u16(i32 %y) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32 undef, i32 %y) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_rhs_cvt_pk_u16( +; CHECK: %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32 %x, i32 undef) +define <2 x i16> @undef_rhs_cvt_pk_u16(i32 %x) { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32 %x, i32 undef) + ret <2 x i16> %cvt +} + +; CHECK-LABEL: @undef_cvt_pk_u16( +; CHECK: ret <2 x i16> undef +define <2 x i16> @undef_cvt_pk_u16() { + %cvt = call <2 x i16> @llvm.amdgcn.cvt.pk.u16(i32 undef, i32 undef) + ret <2 x i16> %cvt +} + +; -------------------------------------------------------------------- ; llvm.amdgcn.ubfe ; -------------------------------------------------------------------- |