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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 21:43:08 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 21:43:08 +0000 |
commit | c8df92092df3e37f082e6288defac1e10634858f (patch) | |
tree | 64ff18d7639639a4f244ae990fc97ac6cf0e56ae /test/Transforms/LoopVectorize | |
parent | 6795f26af554ad58aaca056db03657653b2e4e60 (diff) |
LV: Don't insert runtime ptr checks on divergent targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309890 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/LoopVectorize')
-rw-r--r-- | test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll b/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll new file mode 100644 index 00000000000..91a916798c5 --- /dev/null +++ b/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll @@ -0,0 +1,29 @@ +; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -simplifycfg < %s | FileCheck -check-prefixes=GCN,GFX9 %s +; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -pass-remarks-analysis='loop-vectorize' < %s 2>&1 | FileCheck -check-prefixes=REMARK %s + +; GCN-LABEL: @runtime_check_divergent_target( +; GCN-NOT: load <2 x half> +; GCN-NOT: store <2 x half> + +; REMARK: remark: <unknown>:0:0: loop not vectorized: runtime pointer checks needed. Not enabled for divergent target +define amdgpu_kernel void @runtime_check_divergent_target(half addrspace(1)* nocapture %a, half addrspace(1)* nocapture %b) #0 { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] + %arrayidx = getelementptr inbounds half, half addrspace(1)* %b, i64 %indvars.iv + %load = load half, half addrspace(1)* %arrayidx, align 4 + %mul = fmul half %load, 3.0 + %arrayidx2 = getelementptr inbounds half, half addrspace(1)* %a, i64 %indvars.iv + store half %mul, half addrspace(1)* %arrayidx2, align 4 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +} + +attributes #0 = { nounwind } |