diff options
author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-12-11 18:57:54 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-12-11 18:57:54 +0000 |
commit | 50b5493cd61b1badae8a0c0afc9370a051d271e0 (patch) | |
tree | 118cbc9bea13f8f97bc5efa1ddc4e665bc3f13fa /test/MC | |
parent | fd2e2d7cc7684f8c3c17e6cd661e8d3ac2f8d182 (diff) |
[Hexagon] Add support for Hexagon V65
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320404 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r-- | test/MC/Hexagon/PacketRules/endloop_branches.s | 13 | ||||
-rw-r--r-- | test/MC/Hexagon/hvx-double-implies-hvx.s | 4 | ||||
-rw-r--r-- | test/MC/Hexagon/new-value-check.s | 29 | ||||
-rw-r--r-- | test/MC/Hexagon/v60-misc.s | 2 | ||||
-rw-r--r-- | test/MC/Hexagon/v65_all.s | 184 | ||||
-rw-r--r-- | test/MC/Hexagon/vpred_defs.s | 9 | ||||
-rw-r--r-- | test/MC/Hexagon/vscatter-slot.s | 25 | ||||
-rw-r--r-- | test/MC/Hexagon/vtmp_def.s | 5 |
8 files changed, 250 insertions, 21 deletions
diff --git a/test/MC/Hexagon/PacketRules/endloop_branches.s b/test/MC/Hexagon/PacketRules/endloop_branches.s index fbaa246c068..46d984189b5 100644 --- a/test/MC/Hexagon/PacketRules/endloop_branches.s +++ b/test/MC/Hexagon/PacketRules/endloop_branches.s @@ -1,12 +1,17 @@ # RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>&1 | FileCheck %s -# Check that a branch in an end-loop packet is caught. - { jump unknown }:endloop0 -# CHECK: 5:3: error: packet marked with `:endloop0' cannot contain instructions that modify register +# CHECK: 4:1: error: Branches cannot be in a packet with hardware loops { jump unknown }:endloop1 +# CHECK: 8:1: error: Branches cannot be in a packet with hardware loops + +{ call unknown +}:endloop0 +# CHECK: 12:1: error: Branches cannot be in a packet with hardware loops -# CHECK: 9:3: error: packet marked with `:endloop1' cannot contain instructions that modify register +{ dealloc_return +}:endloop0 +# CHECK: 16:1: error: Branches cannot be in a packet with hardware loops diff --git a/test/MC/Hexagon/hvx-double-implies-hvx.s b/test/MC/Hexagon/hvx-double-implies-hvx.s new file mode 100644 index 00000000000..8719281067d --- /dev/null +++ b/test/MC/Hexagon/hvx-double-implies-hvx.s @@ -0,0 +1,4 @@ +# RUN: llvm-mc -filetype=obj -arch=hexagon -mv65 -mattr=+hvxv65,+hvx-length128b %s | llvm-objdump -d -mhvx - | FileCheck %s + +# CHECK: vhist +vhist diff --git a/test/MC/Hexagon/new-value-check.s b/test/MC/Hexagon/new-value-check.s index 978d6f15148..4c0674d7e2f 100644 --- a/test/MC/Hexagon/new-value-check.s +++ b/test/MC/Hexagon/new-value-check.s @@ -3,36 +3,33 @@ # RUN: not llvm-mc -triple=hexagon -relax-nv-checks < %s 2>&1 | \ # RUN: FileCheck %s --check-prefix=CHECK-RELAXED -# CHECK-STRICT: :12:1: error: register `R0' used with `.new' but not validly modified in the same packet -# CHECK-RELAXED: :12:1: error: register `R0' used with `.new' but not validly modified in the same packet +# CHECK-STRICT: :10:3: note: Register producer has the opposite predicate sense as consumer +# CHECK-RELAXED: :10:3: note: Register producer has the opposite predicate sense as consumer { # invalid: r0 definition predicated on the opposite condition if (p3) r0 = add(r1, r2) if (!p3) memb(r20) = r0.new } -# CHECK-STRICT: :20:1: error: register `R0' used with `.new' but not validly modified in the same packet -# CHECK-RELAXED: :20:1: error: register `R0' used with `.new' but not validly modified in the same packet -{ - # invalid: new-value compare-and-jump cannot use floating point value +# CHECK-STRICT: :18:3: note: FPU instructions cannot be new-value producers for jumps +# CHECK-RELAXED: :18:3: note: FPU instructions cannot be new-value producers for jumps +# CHECK-RELAXED: :19:3: error: Instruction does not have a valid new register producer +{ # invalid: new-value compare-and-jump cannot use floating point value r0 = sfadd(r1, r2) if (cmp.eq(r0.new, #0)) jump:nt . } -# CHECK-STRICT: :29:1: error: register `R0' used with `.new' but not validly modified in the same packet -# CHECK-RELAXED: :29:1: error: register `R0' used with `.new' but not validly modified in the same packet +# No errors from this point on with the relaxed checks. +# CHECK-RELAXED-NOT: error + +# CHECK-STRICT: :28:3: note: Register producer is predicated and consumer is unconditional { - # invalid: definition of r0 should be unconditional (not explicitly docu- - # mented) + # valid in relaxed, p0 could always be true if (p0) r0 = r1 if (cmp.eq(r0.new, #0)) jump:nt . } - -# No errors from this point on with the relaxed checks. -# CHECK-RELAXED-NOT: error - -# CHECK-STRICT: :41:1: error: register `R0' used with `.new' but not validly modified in the same packet +# CHECK-STRICT: :36:3: note: Register producer does not use the same predicate register as the consumer { # valid (relaxed): p2 and p3 cannot be proven to violate the new-value # requirements @@ -40,7 +37,7 @@ if (p2) memb(r20) = r0.new } -# CHECK-STRICT: :48:1: error: register `R0' used with `.new' but not validly modified in the same packet +# CHECK-STRICT: :43:3: note: Register producer is predicated and consumer is unconditional { # valid (relaxed): p3 could be always true if (p3) r0 = add(r1, r2) diff --git a/test/MC/Hexagon/v60-misc.s b/test/MC/Hexagon/v60-misc.s index 53872d64dcf..a7ec36cfa95 100644 --- a/test/MC/Hexagon/v60-misc.s +++ b/test/MC/Hexagon/v60-misc.s @@ -1,4 +1,4 @@ -# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 -mattr=+hvx -filetype=obj %s | llvm-objdump -arch=hexagon -mcpu=hexagonv60 -mhvx -d - | FileCheck %s +# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv60 -mhvx -filetype=obj %s | llvm-objdump -arch=hexagon -mcpu=hexagonv60 -mhvx -d - | FileCheck %s .L0: diff --git a/test/MC/Hexagon/v65_all.s b/test/MC/Hexagon/v65_all.s new file mode 100644 index 00000000000..4f52a063a34 --- /dev/null +++ b/test/MC/Hexagon/v65_all.s @@ -0,0 +1,184 @@ +# RUN: llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s | llvm-objdump -mv65 -mhvx -d - | FileCheck %s + +// Warning: This file is auto generated by mktest.py. Do not edit! +// Created on: 2016-06-01 @ 17:33:01 +// Created using: +// /usr2/mlambert/Tags/iset.py.v65_20160513 + + +// V6_vmpyuhe_acc +// Vx32.uw+=vmpye(Vu32.uh,Rt32.uh) + V0.uw+=vmpye(V0.uh,R0.uh) +# CHECK: 1980e060 { v0.uw += vmpye(v0.uh,r0.uh) } + +// V6_vgathermwq +// if (Qs4) vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + if (Q0) vtmp.w=vgather(R0,M0,V0.w).w +# CHECK: 2f00c400 { if (q0) vtmp.w = vgather(r0,m0,v0.w).w } + +// V6_vscattermw +// vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + vscatter(R0,M0,V0.w).w=V0 +# CHECK: 2f20c000 { vscatter(r0,m0,v0.w).w = v0 } + +// V6_vscattermh +// vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + vscatter(R0,M0,V0.h).h=V0 +# CHECK: 2f20c020 { vscatter(r0,m0,v0.h).h = v0 } + +// V6_vlut4 +// Vd32.h=vlut4(Vu32.uh,Rtt32.h) + V0.h=vlut4(V0.uh,R1:0.h) +# CHECK: 1960c080 { v0.h = vlut4(v0.uh,r1:0.h) } + +// V6_vgathermhwq +// if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + if (Q0) vtmp.h=vgather(R0,M0,V1:0.w).h +# CHECK: 2f00c600 { if (q0) vtmp.h = vgather(r0,m0,v1:0.w).h } + +// V6_vS32b_srls_ai +// vmem(Rt32+#s4):scatter_release + vmem(R0+#0):scatter_release +# CHECK: 2820c028 { vmem(r0+#0):scatter_release } + +// V6_vgathermh +// vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + vtmp.h=vgather(R0,M0,V0.h).h +# CHECK: 2f00c100 { vtmp.h = vgather(r0,m0,v0.h).h } + +// V6_vscattermhw +// vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + vscatter(R0,M0,V1:0.w).h=V0 +# CHECK: 2f20c040 { vscatter(r0,m0,v1:0.w).h = v0 } + +// V6_vS32b_srls_ppu +// vmem(Rx32++Mu2):scatter_release + vmem(R0++M0):scatter_release +# CHECK: 2b20c028 { vmem(r0++m0):scatter_release } + +// V6_vscattermhw_add +// vscatter(Rt32,Mu2,Vvv32.w).h+=Vw32 + vscatter(R0,M0,V1:0.w).h+=V0 +# CHECK: 2f20c0c0 { vscatter(r0,m0,v1:0.w).h += v0 } + +// V6_vmpabuu +// Vdd32.h=vmpa(Vuu32.ub,Rt32.ub) + V1:0.h=vmpa(V1:0.ub,R0.ub) +# CHECK: 1960c060 { v1:0.h = vmpa(v1:0.ub,r0.ub) } + +// V6_vasruhubrndsat +// Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):rnd:sat + V0.ub=vasr(V0.uh,V0.uh,R0):rnd:sat +# CHECK: 1800c0e0 { v0.ub = vasr(v0.uh,v0.uh,r0):rnd:sat } + +// V6_vscattermh_add +// vscatter(Rt32,Mu2,Vv32.h).h+=Vw32 + vscatter(R0,M0,V0.h).h+=V0 +# CHECK: 2f20c0a0 { vscatter(r0,m0,v0.h).h += v0 } + +// V6_vgathermw +// vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + vtmp.w=vgather(R0,M0,V0.w).w +# CHECK: 2f00c000 { vtmp.w = vgather(r0,m0,v0.w).w } + +// V6_vasruhubsat +// Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):sat + V0.ub=vasr(V0.uh,V0.uh,R0):sat +# CHECK: 1800e0a0 { v0.ub = vasr(v0.uh,v0.uh,r0):sat } + +// V6_vscattermhwq +// if (Qs4) vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + if (Q0) vscatter(R0,M0,V1:0.w).h=V0 +# CHECK: 2fa0c000 { if (q0) vscatter(r0,m0,v1:0.w).h = v0 } + +// V6_vgathermhq +// if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + if (Q0) vtmp.h=vgather(R0,M0,V0.h).h +# CHECK: 2f00c500 { if (q0) vtmp.h = vgather(r0,m0,v0.h).h } + +// V6_vmpsuhuhsat +// Vx32.h=vmps(Vx32.h,Vu32.uh,Rtt32.uh):sat + V0.h=vmps(V0.h,V0.uh,R1:0.uh):sat +# CHECK: 1980e0c0 { v0.h = vmps(v0.h,v0.uh,r1:0.uh):sat } + +// V6_vS32b_srls_pi +// vmem(Rx32++#s3):scatter_release + vmem(R0++#0):scatter_release +# CHECK: 2920c028 { vmem(r0++#0):scatter_release } + +// V6_vgathermhw +// vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + vtmp.h=vgather(R0,M0,V1:0.w).h +# CHECK: 2f00c200 { vtmp.h = vgather(r0,m0,v1:0.w).h } + +// V6_vmpyuhe +// Vd32.uw=vmpye(Vu32.uh,Rt32.uh) + V0.uw=vmpye(V0.uh,R0.uh) +# CHECK: 1960c040 { v0.uw = vmpye(v0.uh,r0.uh) } + +// V6_vscattermwq +// if (Qs4) vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + if (Q0) vscatter(R0,M0,V0.w).w=V0 +# CHECK: 2f80c000 { if (q0) vscatter(r0,m0,v0.w).w = v0 } + +// V6_vasruwuhsat +// Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):sat + V0.uh=vasr(V0.uw,V0.uw,R0):sat +# CHECK: 1800e080 { v0.uh = vasr(v0.uw,v0.uw,r0):sat } + +// V6_vprefixqh +// Vd32.h=prefixsum(Qv4) + V0.h=prefixsum(Q0) +# CHECK: 1e03e140 { v0.h = prefixsum(q0) } + +// V6_vmpabuu_acc +// Vxx32.h+=vmpa(Vuu32.ub,Rt32.ub) + V1:0.h+=vmpa(V1:0.ub,R0.ub) +# CHECK: 19a0e080 { v1:0.h += vmpa(v1:0.ub,r0.ub) } + +// V6_vprefixqw +// Vd32.w=prefixsum(Qv4) + V0.w=prefixsum(Q0) +# CHECK: 1e03e240 { v0.w = prefixsum(q0) } + +// V6_vprefixqb +// Vd32.b=prefixsum(Qv4) + V0.b=prefixsum(Q0) +# CHECK: 1e03e040 { v0.b = prefixsum(q0) } + +// V6_vabsb +// Vd32.b=vabs(Vu32.b) + V0.b=vabs(V0.b) +# CHECK: 1e01c080 { v0.b = vabs(v0.b) } + +// V6_vscattermw_add +// vscatter(Rt32,Mu2,Vv32.w).w+=Vw32 + vscatter(R0,M0,V0.w).w+=V0 +# CHECK: 2f20c080 { vscatter(r0,m0,v0.w).w += v0 } + +// V6_vscattermhq +// if (Qs4) vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + if (Q0) vscatter(R0,M0,V0.h).h=V0 +# CHECK: 2f80c080 { if (q0) vscatter(r0,m0,v0.h).h = v0 } + +// V6_vmpauhuhsat +// Vx32.h=vmpa(Vx32.h,Vu32.uh,Rtt32.uh):sat + V0.h=vmpa(V0.h,V0.uh,R1:0.uh):sat +# CHECK: 1980e0a0 { v0.h = vmpa(v0.h,v0.uh,r1:0.uh):sat } + +// V6_vabsb_sat +// Vd32.b=vabs(Vu32.b):sat + V0.b=vabs(V0.b):sat +# CHECK: 1e01c0a0 { v0.b = vabs(v0.b):sat } + +v1:0.w+=vrmpy(v0.b, r1:0.ub) +# CHECK: 19a0e000 { v1:0.w += vrmpy(v0.b,r1:0.ub) } + +V1:0.uw+=vrmpy(v0.ub,r1:0.ub) +# CHECK: 19a0e0e0 { v1:0.uw += vrmpy(v0.ub,r1:0.ub) } + +v1:0.uw=vrmpy(v1.ub,r1:0.ub) +# CHECK: 19c0c180 { v1:0.uw = vrmpy(v1.ub,r1:0.ub) } + +v1:0.w=vrmpy(v1.b,r1:0.ub) +# CHECK: 19c0c1a0 { v1:0.w = vrmpy(v1.b,r1:0.ub) } diff --git a/test/MC/Hexagon/vpred_defs.s b/test/MC/Hexagon/vpred_defs.s new file mode 100644 index 00000000000..92c15a3e575 --- /dev/null +++ b/test/MC/Hexagon/vpred_defs.s @@ -0,0 +1,9 @@ +# RUN: llvm-mc -arch=hexagon -mv65 -filetype=asm -mhvx %s | FileCheck %s + +# CHECK-NOT: error: register `{{.+}}' modified more than once + +{ Q0 = VCMP.EQ(V0.h,V4.h) + Q1 = VCMP.EQ(V1.h,V6.h) + IF (Q3) VTMP.h = VGATHER(R0,M0,V3.h).h + VMEM(R4++#1) = VTMP.new +} diff --git a/test/MC/Hexagon/vscatter-slot.s b/test/MC/Hexagon/vscatter-slot.s new file mode 100644 index 00000000000..6c806de2f98 --- /dev/null +++ b/test/MC/Hexagon/vscatter-slot.s @@ -0,0 +1,25 @@ +# RUN: llvm-mc -arch=hexagon -mv65 -mhvx -filetype=asm < %s | FileCheck %s + +# Test that a slot error is not reported for a packet with a load and a +# vscatter. + +# CHECK: vscatter(r0,m0,v0.h).h = v1 +{ + v1=vmem(r1+#0) + vscatter(r0,m0,v0.h).h=v1 +} +# CHECK: vscatter(r2,m0,v1:0.w).h += v2 +{ + v1=vmem(r3+#0) + vscatter(r2,m0,v1:0.w).h+=v2 +} +# CHECK: vmem(r4+#0):scatter_release +{ + v1=vmem(r5+#0) + vmem(r4+#0):scatter_release +} +# CHECK: vmem(r4+#0):scatter_release +{ + v1=vmem(r5+#0) + vmem(r4+#0):scatter_release +} diff --git a/test/MC/Hexagon/vtmp_def.s b/test/MC/Hexagon/vtmp_def.s new file mode 100644 index 00000000000..26d257efadd --- /dev/null +++ b/test/MC/Hexagon/vtmp_def.s @@ -0,0 +1,5 @@ +# RUN: not llvm-mc -arch=hexagon -mv65 -mhvx -filetype=obj %s 2>&1 | FileCheck %s + +# CHECK: register `VTMP' modified more than once +{ vtmp.h=vgather(r0, m0, v1:0.w).h + vtmp.h=vgather(r0, m0, v1:0.w).h } |