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authorHans Wennborg <hans@hanshq.net>2018-01-30 15:29:20 +0000
committerHans Wennborg <hans@hanshq.net>2018-01-30 15:29:20 +0000
commit7d30102ce03bcf32928e3d0a35ae533638f5b905 (patch)
tree724a0cfe07463031948177ec9d2448e783ceda3a /test/CodeGen
parent0ab6eba6b84235523cbb11f4c2a0b98016d1df75 (diff)
Merging r323706:
------------------------------------------------------------------------ r323706 | mareko | 2018-01-30 00:19:10 +0100 (Tue, 30 Jan 2018) | 15 lines AMDGPU: Allow a SGPR for the conditional KILL operand Patch by: Bas Nieuwenhuizen Just use the _e64 variant if needed. This should be possible as per def : Pat < (int_amdgcn_kill (i1 (setcc f32:$src, InlineFPImm<f32>:$imm, cond:$cond))), (SI_KILL_F32_COND_IMM_PSEUDO $src, (bitcast_fpimm_to_i32 $imm), (cond_as_i32imm $cond)) > ; I don't think we can get an immediate for the other operand for which we need the second 32-bit word. https://reviews.llvm.org/D42302 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@323772 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll17
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll b/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
index d6b0628956a..fabed795c56 100644
--- a/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
+++ b/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
@@ -234,6 +234,23 @@ define amdgpu_ps void @wqm(float %a) {
ret void
}
+; This checks that we use the 64-bit encoding when the operand is a SGPR.
+; SI-LABEL: {{^}}test_sgpr:
+; SI: v_cmpx_ge_f32_e64
+define amdgpu_ps void @test_sgpr(float inreg %a) #0 {
+ %c = fcmp ole float %a, 1.000000e+00
+ call void @llvm.amdgcn.kill(i1 %c) #1
+ ret void
+}
+
+; SI-LABEL: {{^}}test_non_inline_imm_sgpr:
+; SI-NOT: v_cmpx_ge_f32_e64
+define amdgpu_ps void @test_non_inline_imm_sgpr(float inreg %a) #0 {
+ %c = fcmp ole float %a, 1.500000e+00
+ call void @llvm.amdgcn.kill(i1 %c) #1
+ ret void
+}
+
declare void @llvm.amdgcn.kill(i1) #0
declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
declare i1 @llvm.amdgcn.wqm.vote(i1)