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| author | James Molloy <james.molloy@arm.com> | 2016-09-12 14:30:48 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2016-09-12 14:30:48 +0000 |
| commit | 91db09d0e862832164c6c80c4d14f471d902429f (patch) | |
| tree | 49402c35ac264883da1f8d30b0e1ab67f4124ec2 /test/CodeGen/Thumb | |
| parent | c04a5a1fc46d588a90a50d48be0aaa94c526bd9a (diff) | |
[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently
For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)).
1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS.
2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS.
3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS).
4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask.
1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281215 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb')
| -rw-r--r-- | test/CodeGen/Thumb/thumb-shrink-wrapping.ll | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/test/CodeGen/Thumb/thumb-shrink-wrapping.ll b/test/CodeGen/Thumb/thumb-shrink-wrapping.ll index 0fa790cd69a..6114b72569e 100644 --- a/test/CodeGen/Thumb/thumb-shrink-wrapping.ll +++ b/test/CodeGen/Thumb/thumb-shrink-wrapping.ll @@ -650,11 +650,14 @@ define i1 @beq_to_bx(i32* %y, i32 %head) { ; CHECK: tst r3, r4 ; ENABLE-NEXT: pop {r4} -; ENABLE-NEXT: pop {r3} -; ENABLE-NEXT: mov lr, r3 +; ENABLE-NEXT: mov r12, r{{.*}} +; ENABLE-NEXT: pop {r0} +; ENABLE-NEXT: mov lr, r0 +; ENABLE-NEXT: mov r0, r12 ; CHECK-NEXT: beq [[EXIT_LABEL]] ; CHECK: str r1, [r2] +; CHECK: str r3, [r2] ; CHECK-NEXT: movs r0, #0 ; CHECK-NEXT: [[EXIT_LABEL]]: @ %cleanup ; ENABLE-NEXT: bx lr @@ -675,6 +678,7 @@ if.end: if.end4: store i32 %head, i32* %y, align 4 + store volatile i32 %z, i32* %y, align 4 br label %cleanup cleanup: |