[SystemZ] Add CodeGen support for integer vector types

This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility.  This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).

When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
  (except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.

The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.

However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.

These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level.  This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.

Based on a patch by Richard Sandiford.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236521 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 134 insertions, 0 deletions

diff --git a/test/CodeGen/SystemZ/vec-shift-06.ll b/test/CodeGen/SystemZ/vec-shift-06.ll
new file mode 100644
index 00000000000..8a5bb0a9a55
--- /dev/null
+++ b/test/CodeGen/SystemZ/vec-shift-06.ll
@@ -0,0 +1,134 @@
+; Test vector logical shift right with scalar shift amount.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
+
+; Test a v16i8 shift by a variable.
+define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val1, i32 %shift) {
+; CHECK-LABEL: f1:
+; CHECK: vesrlb %v24, %v26, 0(%r2)
+; CHECK: br %r14
+  %truncshift = trunc i32 %shift to i8
+  %shiftvec = insertelement <16 x i8> undef, i8 %truncshift, i32 0
+  %val2 = shufflevector <16 x i8> %shiftvec, <16 x i8> undef,
+                        <16 x i32> zeroinitializer
+  %ret = lshr <16 x i8> %val1, %val2
+  ret <16 x i8> %ret
+}
+
+; Test a v16i8 shift by the lowest useful constant.
+define <16 x i8> @f2(<16 x i8> %dummy, <16 x i8> %val) {
+; CHECK-LABEL: f2:
+; CHECK: vesrlb %v24, %v26, 1
+; CHECK: br %r14
+  %ret = lshr <16 x i8> %val, <i8 1, i8 1, i8 1, i8 1,
+                               i8 1, i8 1, i8 1, i8 1,
+                               i8 1, i8 1, i8 1, i8 1,
+                               i8 1, i8 1, i8 1, i8 1>
+  ret <16 x i8> %ret
+}
+
+; Test a v16i8 shift by the highest useful constant.
+define <16 x i8> @f3(<16 x i8> %dummy, <16 x i8> %val) {
+; CHECK-LABEL: f3:
+; CHECK: vesrlb %v24, %v26, 7
+; CHECK: br %r14
+  %ret = lshr <16 x i8> %val, <i8 7, i8 7, i8 7, i8 7,
+                               i8 7, i8 7, i8 7, i8 7,
+                               i8 7, i8 7, i8 7, i8 7,
+                               i8 7, i8 7, i8 7, i8 7>
+  ret <16 x i8> %ret
+}
+
+; Test a v8i16 shift by a variable.
+define <8 x i16> @f4(<8 x i16> %dummy, <8 x i16> %val1, i32 %shift) {
+; CHECK-LABEL: f4:
+; CHECK: vesrlh %v24, %v26, 0(%r2)
+; CHECK: br %r14
+  %truncshift = trunc i32 %shift to i16
+  %shiftvec = insertelement <8 x i16> undef, i16 %truncshift, i32 0
+  %val2 = shufflevector <8 x i16> %shiftvec, <8 x i16> undef,
+                        <8 x i32> zeroinitializer
+  %ret = lshr <8 x i16> %val1, %val2
+  ret <8 x i16> %ret
+}
+
+; Test a v8i16 shift by the lowest useful constant.
+define <8 x i16> @f5(<8 x i16> %dummy, <8 x i16> %val) {
+; CHECK-LABEL: f5:
+; CHECK: vesrlh %v24, %v26, 1
+; CHECK: br %r14
+  %ret = lshr <8 x i16> %val, <i16 1, i16 1, i16 1, i16 1,
+                               i16 1, i16 1, i16 1, i16 1>
+  ret <8 x i16> %ret
+}
+
+; Test a v8i16 shift by the highest useful constant.
+define <8 x i16> @f6(<8 x i16> %dummy, <8 x i16> %val) {
+; CHECK-LABEL: f6:
+; CHECK: vesrlh %v24, %v26, 15
+; CHECK: br %r14
+  %ret = lshr <8 x i16> %val, <i16 15, i16 15, i16 15, i16 15,
+                               i16 15, i16 15, i16 15, i16 15>
+  ret <8 x i16> %ret
+}
+
+; Test a v4i32 shift by a variable.
+define <4 x i32> @f7(<4 x i32> %dummy, <4 x i32> %val1, i32 %shift) {
+; CHECK-LABEL: f7:
+; CHECK: vesrlf %v24, %v26, 0(%r2)
+; CHECK: br %r14
+  %shiftvec = insertelement <4 x i32> undef, i32 %shift, i32 0
+  %val2 = shufflevector <4 x i32> %shiftvec, <4 x i32> undef,
+                        <4 x i32> zeroinitializer
+  %ret = lshr <4 x i32> %val1, %val2
+  ret <4 x i32> %ret
+}
+
+; Test a v4i32 shift by the lowest useful constant.
+define <4 x i32> @f8(<4 x i32> %dummy, <4 x i32> %val) {
+; CHECK-LABEL: f8:
+; CHECK: vesrlf %v24, %v26, 1
+; CHECK: br %r14
+  %ret = lshr <4 x i32> %val, <i32 1, i32 1, i32 1, i32 1>
+  ret <4 x i32> %ret
+}
+
+; Test a v4i32 shift by the highest useful constant.
+define <4 x i32> @f9(<4 x i32> %dummy, <4 x i32> %val) {
+; CHECK-LABEL: f9:
+; CHECK: vesrlf %v24, %v26, 31
+; CHECK: br %r14
+  %ret = lshr <4 x i32> %val, <i32 31, i32 31, i32 31, i32 31>
+  ret <4 x i32> %ret
+}
+
+; Test a v2i64 shift by a variable.
+define <2 x i64> @f10(<2 x i64> %dummy, <2 x i64> %val1, i32 %shift) {
+; CHECK-LABEL: f10:
+; CHECK: vesrlg %v24, %v26, 0(%r2)
+; CHECK: br %r14
+  %extshift = sext i32 %shift to i64
+  %shiftvec = insertelement <2 x i64> undef, i64 %extshift, i32 0
+  %val2 = shufflevector <2 x i64> %shiftvec, <2 x i64> undef,
+                        <2 x i32> zeroinitializer
+  %ret = lshr <2 x i64> %val1, %val2
+  ret <2 x i64> %ret
+}
+
+; Test a v2i64 shift by the lowest useful constant.
+define <2 x i64> @f11(<2 x i64> %dummy, <2 x i64> %val) {
+; CHECK-LABEL: f11:
+; CHECK: vesrlg %v24, %v26, 1
+; CHECK: br %r14
+  %ret = lshr <2 x i64> %val, <i64 1, i64 1>
+  ret <2 x i64> %ret
+}
+
+; Test a v2i64 shift by the highest useful constant.
+define <2 x i64> @f12(<2 x i64> %dummy, <2 x i64> %val) {
+; CHECK-LABEL: f12:
+; CHECK: vesrlg %v24, %v26, 63
+; CHECK: br %r14
+  %ret = lshr <2 x i64> %val, <i64 63, i64 63>
+  ret <2 x i64> %ret
+}