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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2015-10-29 16:13:55 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2015-10-29 16:13:55 +0000 |
| commit | ea81d62d3775ccd81c3957c26ae9ff20f9601cbc (patch) | |
| tree | 52e1cbb019ebfa112bc9b4c863400a0dedd34d6e /test/CodeGen/SystemZ/memchr-01.ll | |
| parent | 40e7b16d547cc006096814d22a37cf9bb43fcf1f (diff) | |
[SystemZ] Make the CCRegs regclass non-allocatable.
This was discovered to be necessary while running memchr-01.ll with
-verify-machinstrs, because it is not allowed to have a phys reg live
accross block boundaries while on SSA form, if the register is
allocatable (expect in entry block and landing pads).
In this test case, stringRRE pseudos are expanded after isel by adding
a loop block which produces a live out CC register. To make the test
pass, it was also necessary to not say that StringRRELoop pseudo uses
R0L, this is only true for the StringRRE opcode.
-verify-machineinstrs added to memchr-01.ll test.
New test case int-cmp-51.ll to test that MachineCSE can eliminate
an identical compare (which it couldn't do before).
Reviewed by Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251634 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/memchr-01.ll')
| -rw-r--r-- | test/CodeGen/SystemZ/memchr-01.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/SystemZ/memchr-01.ll b/test/CodeGen/SystemZ/memchr-01.ll index c51690b9848..f7509c4f256 100644 --- a/test/CodeGen/SystemZ/memchr-01.ll +++ b/test/CodeGen/SystemZ/memchr-01.ll @@ -1,6 +1,6 @@ ; Test memchr using SRST, with a weird but usable prototype. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s declare i8 *@memchr(i8 *%src, i16 %char, i32 %len) |