diff options
author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-03 10:10:02 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-03 10:10:02 +0000 |
commit | fa487e83a83c260d6a50f3df00a0eb012553a912 (patch) | |
tree | f6ddd72df044eaa9cabbce37fd4b04f64b978139 /test/CodeGen/SystemZ/int-conv-10.ll | |
parent | b81b477cd4392a51112c3af0659ea9fc176e74f1 (diff) |
[SystemZ] Fold more spills
Add a mapping from register-based <INSN>R instructions to the corresponding
memory-based <INSN>. Use it to cut down on the number of spill loads.
Some instructions extend their operands from smaller fields, so this
required a new TSFlags field to say how big the unextended operand is.
This optimisation doesn't trigger for C(G)R and CL(G)R because in practice
we always combine those instructions with a branch. Adding a test for every
other case probably seems excessive, but it did catch a missed optimisation
for DSGF (fixed in r185435).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185529 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/int-conv-10.ll')
-rw-r--r-- | test/CodeGen/SystemZ/int-conv-10.ll | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/int-conv-10.ll b/test/CodeGen/SystemZ/int-conv-10.ll index 2b2a290af6b..4b078f95455 100644 --- a/test/CodeGen/SystemZ/int-conv-10.ll +++ b/test/CodeGen/SystemZ/int-conv-10.ll @@ -111,3 +111,80 @@ define i64 @f10(i64 %src, i64 %index) { %ext = zext i32 %word to i64 ret i64 %ext } + +; Test a case where we spill the source of at least one LLGFR. We want +; to use LLGF if possible. +define void @f11(i64 *%ptr1, i32 *%ptr2) { +; CHECK: f11: +; CHECK: llgf {{%r[0-9]+}}, 16{{[04]}}(%r15) +; CHECK: br %r14 + %val0 = load volatile i32 *%ptr2 + %val1 = load volatile i32 *%ptr2 + %val2 = load volatile i32 *%ptr2 + %val3 = load volatile i32 *%ptr2 + %val4 = load volatile i32 *%ptr2 + %val5 = load volatile i32 *%ptr2 + %val6 = load volatile i32 *%ptr2 + %val7 = load volatile i32 *%ptr2 + %val8 = load volatile i32 *%ptr2 + %val9 = load volatile i32 *%ptr2 + %val10 = load volatile i32 *%ptr2 + %val11 = load volatile i32 *%ptr2 + %val12 = load volatile i32 *%ptr2 + %val13 = load volatile i32 *%ptr2 + %val14 = load volatile i32 *%ptr2 + %val15 = load volatile i32 *%ptr2 + + %ext0 = zext i32 %val0 to i64 + %ext1 = zext i32 %val1 to i64 + %ext2 = zext i32 %val2 to i64 + %ext3 = zext i32 %val3 to i64 + %ext4 = zext i32 %val4 to i64 + %ext5 = zext i32 %val5 to i64 + %ext6 = zext i32 %val6 to i64 + %ext7 = zext i32 %val7 to i64 + %ext8 = zext i32 %val8 to i64 + %ext9 = zext i32 %val9 to i64 + %ext10 = zext i32 %val10 to i64 + %ext11 = zext i32 %val11 to i64 + %ext12 = zext i32 %val12 to i64 + %ext13 = zext i32 %val13 to i64 + %ext14 = zext i32 %val14 to i64 + %ext15 = zext i32 %val15 to i64 + + store volatile i32 %val0, i32 *%ptr2 + store volatile i32 %val1, i32 *%ptr2 + store volatile i32 %val2, i32 *%ptr2 + store volatile i32 %val3, i32 *%ptr2 + store volatile i32 %val4, i32 *%ptr2 + store volatile i32 %val5, i32 *%ptr2 + store volatile i32 %val6, i32 *%ptr2 + store volatile i32 %val7, i32 *%ptr2 + store volatile i32 %val8, i32 *%ptr2 + store volatile i32 %val9, i32 *%ptr2 + store volatile i32 %val10, i32 *%ptr2 + store volatile i32 %val11, i32 *%ptr2 + store volatile i32 %val12, i32 *%ptr2 + store volatile i32 %val13, i32 *%ptr2 + store volatile i32 %val14, i32 *%ptr2 + store volatile i32 %val15, i32 *%ptr2 + + store volatile i64 %ext0, i64 *%ptr1 + store volatile i64 %ext1, i64 *%ptr1 + store volatile i64 %ext2, i64 *%ptr1 + store volatile i64 %ext3, i64 *%ptr1 + store volatile i64 %ext4, i64 *%ptr1 + store volatile i64 %ext5, i64 *%ptr1 + store volatile i64 %ext6, i64 *%ptr1 + store volatile i64 %ext7, i64 *%ptr1 + store volatile i64 %ext8, i64 *%ptr1 + store volatile i64 %ext9, i64 *%ptr1 + store volatile i64 %ext10, i64 *%ptr1 + store volatile i64 %ext11, i64 *%ptr1 + store volatile i64 %ext12, i64 *%ptr1 + store volatile i64 %ext13, i64 *%ptr1 + store volatile i64 %ext14, i64 *%ptr1 + store volatile i64 %ext15, i64 *%ptr1 + + ret void +} |