diff options
| author | Matthias Braun <matze@braunis.de> | 2016-07-20 00:21:32 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2016-07-20 00:21:32 +0000 |
| commit | e3d8cd87b2e0848c9285fef12a6e2b3b90307d4a (patch) | |
| tree | 441ff7b6aabe37f430a4c23c400fb4ec5a68e748 /test/CodeGen/SystemZ/frame-16.ll | |
| parent | 3d7281b8c92eef251d4a99b80eec4600ac643b2c (diff) | |
Revert "RegScavenging: Add scavengeRegisterBackwards()"
Reverting this commit for now as it seems to be causing failures on
test-suite tests on the clang-ppc64le-linux-lnt bot.
This reverts commit r276044.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276068 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/frame-16.ll')
| -rw-r--r-- | test/CodeGen/SystemZ/frame-16.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/SystemZ/frame-16.ll b/test/CodeGen/SystemZ/frame-16.ll index 8429c87cb7a..75da04447b3 100644 --- a/test/CodeGen/SystemZ/frame-16.ll +++ b/test/CodeGen/SystemZ/frame-16.ll @@ -223,15 +223,15 @@ define void @f10(i32 *%vptr, i8 %byte) { ; CHECK-NOFP-LABEL: f10: ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) ; CHECK-NOFP: llilh [[REGISTER]], 8 -; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) +; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: br %r14 ; ; CHECK-FP-LABEL: f10: ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) ; CHECK-FP: llilh [[REGISTER]], 8 -; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: stc %r3, 0([[REGISTER]],%r11) +; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: br %r14 %i0 = load volatile i32 , i32 *%vptr %i1 = load volatile i32 , i32 *%vptr @@ -259,8 +259,8 @@ define void @f11(i32 *%vptr, i8 %byte) { ; CHECK-NOFP: stmg %r6, %r15, ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) ; CHECK-NOFP: llilh [[REGISTER]], 8 -; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) +; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: lmg %r6, %r15, ; CHECK-NOFP: br %r14 ; @@ -268,8 +268,8 @@ define void @f11(i32 *%vptr, i8 %byte) { ; CHECK-FP: stmg %r6, %r15, ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) ; CHECK-FP: llilh [[REGISTER]], 8 -; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: stc %r3, 8([[REGISTER]],%r11) +; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: lmg %r6, %r15, ; CHECK-FP: br %r14 %i0 = load volatile i32 , i32 *%vptr |