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authorJonas Paulsson <paulsson@linux.vnet.ibm.com>2017-10-06 13:59:28 +0000
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>2017-10-06 13:59:28 +0000
commitda3da48a1c89bfb232bc1786185c700a740e81da (patch)
tree196a49ce121836ac256efd19e0a616d228a4d38b /test/CodeGen/SystemZ/atomicrmw-or-02.ll
parent94302cb16c0a0a8ebb1d31a4d0f65f274012f402 (diff)
[SystemZ] Enable machine scheduler.
The machine scheduler (before register allocation) is enabled by default for SystemZ. The SelectionDAG scheduling preference now becomes source order scheduling (was regpressure). Review: Ulrich Weigand https://reviews.llvm.org/D37977 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315063 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/atomicrmw-or-02.ll')
-rw-r--r--test/CodeGen/SystemZ/atomicrmw-or-02.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/SystemZ/atomicrmw-or-02.ll b/test/CodeGen/SystemZ/atomicrmw-or-02.ll
index 5029e7925bb..21fe7b24726 100644
--- a/test/CodeGen/SystemZ/atomicrmw-or-02.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-or-02.ll
@@ -15,8 +15,8 @@
define i16 @f1(i16 *%src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
-; CHECK: sll %r2, 3
-; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
+; CHECK-DAG: sll %r2, 3
+; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
; CHECK: or [[ROT]], %r3
@@ -49,8 +49,8 @@ define i16 @f1(i16 *%src, i16 %b) {
define i16 @f2(i16 *%src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
-; CHECK: sll %r2, 3
-; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
+; CHECK-DAG: sll %r2, 3
+; CHECK-DAG: l [[OLD:%r[0-9]+]], 0([[RISBG]])
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
; CHECK: oilh [[ROT]], 32768