diff options
author | Reid Spencer <rspencer@reidspencer.com> | 2006-12-31 06:02:00 +0000 |
---|---|---|
committer | Reid Spencer <rspencer@reidspencer.com> | 2006-12-31 06:02:00 +0000 |
commit | eacb7020ec7b0a6a0078f1be7bfd77bf6fe1ff06 (patch) | |
tree | ac1b0bfa8c340bb02ac25f991a1ee28b216de458 /test/CodeGen/PowerPC | |
parent | 47857812e29324a9d1560796a05b53d3a9217fd9 (diff) |
For PR950:
Update the test suite to accommodate the change from signed integer types
to signless integer types. The changes were of only a few kinds:
1. Make sure llvm-upgrade is run on the source which does the bulk of the
changes automatically.
2. Change things like "grep 'int'" to "grep 'i32'"
3. In several tests bitcasting caused the same name to be reused in the
same type plane. These had to be manually fixed. The fix was (generally)
to leave the bitcast and provide the instruction with a new name. This
should not affect the semantics of the test. In a few cases, the
bitcasts were known to be superfluous and irrelevant to the test case
so they were removed.
4. One test case uses a bytecode file which needed to be updated to the
latest bytecode format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32789 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
-rw-r--r-- | test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll | 14 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/and-elim.ll | 3 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/branch-opt.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/rotl.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/small-arguments.ll | 10 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/vec_spat.ll | 8 |
6 files changed, 33 insertions, 39 deletions
diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll index 8edb96284ec..77004593283 100644 --- a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll +++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll @@ -1,16 +1,16 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc void %iterative_hash_host_wide_int() { - %zero = alloca int ; <int*> [#uses=2] - %b = alloca uint ; <uint*> [#uses=1] + %zero = alloca int ; <int*> [#uses=2] + %b = alloca uint ; <uint*> [#uses=1] store int 0, int* %zero - %tmp = load int* %zero ; <int> [#uses=1] + %tmp = load int* %zero ; <int> [#uses=1] %tmp5 = cast int %tmp to uint ; <uint> [#uses=1] - %tmp6 = add uint %tmp5, 32 ; <uint> [#uses=1] - %tmp6 = cast uint %tmp6 to int ; <int> [#uses=1] - %tmp7 = load long* null ; <long> [#uses=1] + %tmp6.u = add uint %tmp5, 32 ; <uint> [#uses=1] + %tmp6 = cast uint %tmp6.u to int ; <int> [#uses=1] + %tmp7 = load long* null ; <long> [#uses=1] %tmp6 = cast int %tmp6 to ubyte ; <ubyte> [#uses=1] - %tmp8 = shr long %tmp7, ubyte %tmp6 ; <long> [#uses=1] + %tmp8 = shr long %tmp7, ubyte %tmp6 ; <long> [#uses=1] %tmp8 = cast long %tmp8 to uint ; <uint> [#uses=1] store uint %tmp8, uint* %b unreachable diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll index ae1f57d07d2..c866d6e0979 100644 --- a/test/CodeGen/PowerPC/and-elim.ll +++ b/test/CodeGen/PowerPC/and-elim.ll @@ -10,7 +10,8 @@ void %test(ubyte* %P) { ret void } -ushort %test2(ushort %crc) { ; No and's should be needed for the ushorts here. +ushort @zext %test2(ushort @zext %crc) { + ; No and's should be needed for the ushorts here. %tmp.1 = shr ushort %crc, ubyte 1 %tmp.7 = xor ushort %tmp.1, 40961 ret ushort %tmp.7 diff --git a/test/CodeGen/PowerPC/branch-opt.ll b/test/CodeGen/PowerPC/branch-opt.ll index 7f40a2d8668..1f94169cb91 100644 --- a/test/CodeGen/PowerPC/branch-opt.ll +++ b/test/CodeGen/PowerPC/branch-opt.ll @@ -9,10 +9,10 @@ implementation ; Functions: void %foo(int %W, int %X, int %Y, int %Z) { entry: - %X = cast int %X to uint ; <uint> [#uses=1] - %Y = cast int %Y to uint ; <uint> [#uses=1] - %Z = cast int %Z to uint ; <uint> [#uses=1] - %W = cast int %W to uint ; <uint> [#uses=1] + %X.u = cast int %X to uint ; <uint> [#uses=1] + %Y.u = cast int %Y to uint ; <uint> [#uses=1] + %Z.u = cast int %Z to uint ; <uint> [#uses=1] + %W.u = cast int %W to uint ; <uint> [#uses=1] %tmp1 = and int %W, 1 ; <int> [#uses=1] %tmp1 = seteq int %tmp1, 0 ; <bool> [#uses=1] br bool %tmp1, label %cond_false, label %bb5 @@ -21,7 +21,7 @@ bb: ; preds = %bb5, %bb %indvar77 = phi uint [ %indvar.next78, %bb ], [ 0, %bb5 ] ; <uint> [#uses=1] %tmp2 = tail call int (...)* %bar( ) ; <int> [#uses=0] %indvar.next78 = add uint %indvar77, 1 ; <uint> [#uses=2] - %exitcond79 = seteq uint %indvar.next78, %X ; <bool> [#uses=1] + %exitcond79 = seteq uint %indvar.next78, %X.u ; <bool> [#uses=1] br bool %exitcond79, label %cond_next48, label %bb bb5: ; preds = %entry @@ -37,7 +37,7 @@ bb12: ; preds = %bb16, %bb12 %indvar72 = phi uint [ %indvar.next73, %bb12 ], [ 0, %bb16 ] ; <uint> [#uses=1] %tmp13 = tail call int (...)* %bar( ) ; <int> [#uses=0] %indvar.next73 = add uint %indvar72, 1 ; <uint> [#uses=2] - %exitcond74 = seteq uint %indvar.next73, %Y ; <bool> [#uses=1] + %exitcond74 = seteq uint %indvar.next73, %Y.u ; <bool> [#uses=1] br bool %exitcond74, label %cond_next48, label %bb12 bb16: ; preds = %cond_false @@ -53,7 +53,7 @@ bb25: ; preds = %bb29, %bb25 %indvar67 = phi uint [ %indvar.next68, %bb25 ], [ 0, %bb29 ] ; <uint> [#uses=1] %tmp26 = tail call int (...)* %bar( ) ; <int> [#uses=0] %indvar.next68 = add uint %indvar67, 1 ; <uint> [#uses=2] - %exitcond69 = seteq uint %indvar.next68, %Z ; <bool> [#uses=1] + %exitcond69 = seteq uint %indvar.next68, %Z.u ; <bool> [#uses=1] br bool %exitcond69, label %cond_next48, label %bb25 bb29: ; preds = %cond_false20 @@ -72,9 +72,8 @@ bb38: ; preds = %bb42 bb42: ; preds = %cond_false33, %bb38 %indvar = phi uint [ %indvar.next, %bb38 ], [ 0, %cond_false33 ] ; <uint> [#uses=3] - %indvar = cast uint %indvar to int ; <int> [#uses=1] %W_addr.0 = sub int %W, %indvar ; <int> [#uses=1] - %exitcond = seteq uint %indvar, %W ; <bool> [#uses=1] + %exitcond = seteq uint %indvar, %W.u ; <bool> [#uses=1] br bool %exitcond, label %cond_next48, label %bb38 cond_next48: ; preds = %bb, %bb12, %bb25, %bb42, %cond_false33, %bb29, %bb16, %bb5 diff --git a/test/CodeGen/PowerPC/rotl.ll b/test/CodeGen/PowerPC/rotl.ll index fc3a6bc6ac4..e2045feb920 100644 --- a/test/CodeGen/PowerPC/rotl.ll +++ b/test/CodeGen/PowerPC/rotl.ll @@ -7,12 +7,11 @@ implementation ; Functions: int %rotlw(uint %x, int %sh) { entry: %tmp.3 = cast int %sh to ubyte ; <ubyte> [#uses=1] - %x = cast uint %x to int ; <int> [#uses=1] + %x.s = cast uint %x to int ; <int> [#uses=1] %tmp.7 = sub int 32, %sh ; <int> [#uses=1] %tmp.9 = cast int %tmp.7 to ubyte ; <ubyte> [#uses=1] %tmp.10 = shr uint %x, ubyte %tmp.9 ; <uint> [#uses=1] - %tmp.4 = shl int %x, ubyte %tmp.3 ; <int> [#uses=1] - %tmp.10 = cast uint %tmp.10 to int ; <int> [#uses=1] + %tmp.4 = shl int %x.s, ubyte %tmp.3 ; <int> [#uses=1] %tmp.12 = or int %tmp.10, %tmp.4 ; <int> [#uses=1] ret int %tmp.12 } @@ -23,19 +22,17 @@ entry: %tmp.4 = shr uint %x, ubyte %tmp.3 ; <uint> [#uses=1] %tmp.7 = sub int 32, %sh ; <int> [#uses=1] %tmp.9 = cast int %tmp.7 to ubyte ; <ubyte> [#uses=1] - %x = cast uint %x to int ; <int> [#uses=1] - %tmp.4 = cast uint %tmp.4 to int ; <int> [#uses=1] - %tmp.10 = shl int %x, ubyte %tmp.9 ; <int> [#uses=1] + %x.s = cast uint %x to int ; <int> [#uses=1] + %tmp.10 = shl int %x.s, ubyte %tmp.9 ; <int> [#uses=1] %tmp.12 = or int %tmp.4, %tmp.10 ; <int> [#uses=1] ret int %tmp.12 } int %rotlwi(uint %x) { entry: - %x = cast uint %x to int ; <int> [#uses=1] + %x.s = cast uint %x to int ; <int> [#uses=1] %tmp.7 = shr uint %x, ubyte 27 ; <uint> [#uses=1] - %tmp.3 = shl int %x, ubyte 5 ; <int> [#uses=1] - %tmp.7 = cast uint %tmp.7 to int ; <int> [#uses=1] + %tmp.3 = shl int %x.s, ubyte 5 ; <int> [#uses=1] %tmp.9 = or int %tmp.3, %tmp.7 ; <int> [#uses=1] ret int %tmp.9 } @@ -43,9 +40,8 @@ entry: int %rotrwi(uint %x) { entry: %tmp.3 = shr uint %x, ubyte 5 ; <uint> [#uses=1] - %x = cast uint %x to int ; <int> [#uses=1] - %tmp.3 = cast uint %tmp.3 to int ; <int> [#uses=1] - %tmp.7 = shl int %x, ubyte 27 ; <int> [#uses=1] + %x.s = cast uint %x to int ; <int> [#uses=1] + %tmp.7 = shl int %x.s, ubyte 27 ; <int> [#uses=1] %tmp.9 = or int %tmp.3, %tmp.7 ; <int> [#uses=1] ret int %tmp.9 } diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll index 40217f65569..aa0d5b6d1b7 100644 --- a/test/CodeGen/PowerPC/small-arguments.ll +++ b/test/CodeGen/PowerPC/small-arguments.ll @@ -1,15 +1,14 @@ - ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep 'extsh\|rlwinm' -declare short %foo() +declare short @sext %foo() -int %test1(short %X) { +int %test1(short @sext %X) { %Y = cast short %X to int ;; dead ret int %Y } -int %test2(ushort %X) { +int %test2(ushort @zext %X) { %Y = cast ushort %X to int %Z = and int %Y, 65535 ;; dead ret int %Z @@ -48,8 +47,7 @@ uint %test6(uint* %P) { ret uint %tmp.2 } -ushort %test7(float %a) { +ushort @zext %test7(float %a) { %tmp.1 = cast float %a to ushort ret ushort %tmp.1 } - diff --git a/test/CodeGen/PowerPC/vec_spat.ll b/test/CodeGen/PowerPC/vec_spat.ll index fb25402b176..6691995357b 100644 --- a/test/CodeGen/PowerPC/vec_spat.ll +++ b/test/CodeGen/PowerPC/vec_spat.ll @@ -62,10 +62,10 @@ void %splat_h(short %tmp, <16 x ubyte>* %dst) { void %spltish(<16 x ubyte>* %A, <16 x ubyte>* %B) { ; Gets converted to 16 x ubyte %tmp = load <16 x ubyte>* %B - %tmp = cast <16 x ubyte> %tmp to <16 x sbyte> - %tmp4 = sub <16 x sbyte> %tmp, cast (<8 x short> < short 15, short 15, short 15, short 15, short 15, short 15, short 15, short 15 > to <16 x sbyte>) - %tmp4 = cast <16 x sbyte> %tmp4 to <16 x ubyte> - store <16 x ubyte> %tmp4, <16 x ubyte>* %A + %tmp.s = cast <16 x ubyte> %tmp to <16 x sbyte> + %tmp4 = sub <16 x sbyte> %tmp.s, cast (<8 x short> < short 15, short 15, short 15, short 15, short 15, short 15, short 15, short 15 > to <16 x sbyte>) + %tmp4.u = cast <16 x sbyte> %tmp4 to <16 x ubyte> + store <16 x ubyte> %tmp4.u, <16 x ubyte>* %A ret void } |