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| author | Zaara Syeda <syzaara@ca.ibm.com> | 2017-11-27 17:11:03 +0000 |
|---|---|---|
| committer | Zaara Syeda <syzaara@ca.ibm.com> | 2017-11-27 17:11:03 +0000 |
| commit | d89f47709abed2600d9f5433255a7d77c37b8d4b (patch) | |
| tree | 940be26cc6980396d7c80609106757b98901de5b /test/CodeGen/PowerPC | |
| parent | c66b9564b9348a365f0a98867c275915cec26528 (diff) | |
[Power9] Improvements to vector extract with variable index exploitation
This patch extends on to rL307174 to not use the power9 vector extract with
variable index instructions when extracting word element 1. For such cases,
the existing selection of MFVSRWZ provides a better sequence.
Differential Revision: https://reviews.llvm.org/D38287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319049 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
| -rw-r--r-- | test/CodeGen/PowerPC/vec_extract_p9.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/PowerPC/vec_extract_p9.ll b/test/CodeGen/PowerPC/vec_extract_p9.ll index 241209a0e6b..b07c905ceec 100644 --- a/test/CodeGen/PowerPC/vec_extract_p9.ll +++ b/test/CodeGen/PowerPC/vec_extract_p9.ll @@ -152,16 +152,16 @@ entry: define zeroext i32 @test9(<4 x i32> %a) { ; CHECK-LE-LABEL: test9: ; CHECK-LE: # BB#0: # %entry -; CHECK-LE-NEXT: li 3, 4 +; CHECK-LE-NEXT: li 3, 12 ; CHECK-LE-NEXT: vextuwrx 3, 3, 2 ; CHECK-LE-NEXT: blr ; CHECK-BE-LABEL: test9: ; CHECK-BE: # BB#0: # %entry -; CHECK-BE-NEXT: li 3, 4 +; CHECK-BE-NEXT: li 3, 12 ; CHECK-BE-NEXT: vextuwlx 3, 3, 2 ; CHECK-BE-NEXT: blr entry: - %vecext = extractelement <4 x i32> %a, i32 1 + %vecext = extractelement <4 x i32> %a, i32 3 ret i32 %vecext } |