diff options
| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
| tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/PowerPC | |
| parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
224 files changed, 1331 insertions, 1331 deletions
diff --git a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll index 047a12bedd8..0f56ac990bb 100644 --- a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll +++ b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll @@ -7,7 +7,7 @@ define void @bar(i32 %G, i32 %E, i32 %F, i32 %A, i32 %B, i32 %C, i32 %D, i8* %fm %ap = alloca i8* ; <i8**> [#uses=2] %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] call void @llvm.va_start( i8* %va.upgrd.1 ) - %tmp.1 = load i8** %ap ; <i8*> [#uses=1] + %tmp.1 = load i8*, i8** %ap ; <i8*> [#uses=1] %tmp.0 = call double @foo( i8* %tmp.1 ) ; <double> [#uses=0] ret void } diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll index fbf254082ee..fde330321aa 100644 --- a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll +++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll @@ -4,11 +4,11 @@ define void @iterative_hash_host_wide_int() { %zero = alloca i32 ; <i32*> [#uses=2] %b = alloca i32 ; <i32*> [#uses=1] store i32 0, i32* %zero - %tmp = load i32* %zero ; <i32> [#uses=1] + %tmp = load i32, i32* %zero ; <i32> [#uses=1] %tmp5 = bitcast i32 %tmp to i32 ; <i32> [#uses=1] %tmp6.u = add i32 %tmp5, 32 ; <i32> [#uses=1] %tmp6 = bitcast i32 %tmp6.u to i32 ; <i32> [#uses=1] - %tmp7 = load i64* null ; <i64> [#uses=1] + %tmp7 = load i64, i64* null ; <i64> [#uses=1] %tmp6.upgrd.1 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1] %shift.upgrd.2 = zext i8 %tmp6.upgrd.1 to i64 ; <i64> [#uses=1] %tmp8 = ashr i64 %tmp7, %shift.upgrd.2 ; <i64> [#uses=1] diff --git a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll index 7e845382a8e..80827dc1505 100644 --- a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll +++ b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll @@ -2,7 +2,7 @@ ; RUN: grep "vspltish v.*, 10" define void @test(<8 x i16>* %P) { - %tmp = load <8 x i16>* %P ; <<8 x i16>> [#uses=1] + %tmp = load <8 x i16>, <8 x i16>* %P ; <<8 x i16>> [#uses=1] %tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 > ; <<8 x i16>> [#uses=1] store <8 x i16> %tmp1, <8 x i16>* %P ret void diff --git a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll index 48d1faaa415..50d64f46569 100644 --- a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll +++ b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll @@ -21,31 +21,31 @@ cond_true68: ; preds = %bb30 ret void cond_next92: ; preds = %bb30 %tmp173 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2] - %tmp174 = load i32* %tmp173 ; <i32> [#uses=1] + %tmp174 = load i32, i32* %tmp173 ; <i32> [#uses=1] %tmp177 = and i32 %tmp174, -9 ; <i32> [#uses=1] store i32 %tmp177, i32* %tmp173 %tmp180 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp181 = load i32* %tmp180 ; <i32> [#uses=1] + %tmp181 = load i32, i32* %tmp180 ; <i32> [#uses=1] %tmp185 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2] - %tmp186 = load i32* %tmp185 ; <i32> [#uses=1] + %tmp186 = load i32, i32* %tmp185 ; <i32> [#uses=1] %tmp183187 = shl i32 %tmp181, 1 ; <i32> [#uses=1] %tmp188 = and i32 %tmp183187, 16 ; <i32> [#uses=1] %tmp190 = and i32 %tmp186, -17 ; <i32> [#uses=1] %tmp191 = or i32 %tmp190, %tmp188 ; <i32> [#uses=1] store i32 %tmp191, i32* %tmp185 %tmp193 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp194 = load i32* %tmp193 ; <i32> [#uses=1] + %tmp194 = load i32, i32* %tmp193 ; <i32> [#uses=1] %tmp198 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2] - %tmp199 = load i32* %tmp198 ; <i32> [#uses=1] + %tmp199 = load i32, i32* %tmp198 ; <i32> [#uses=1] %tmp196200 = shl i32 %tmp194, 2 ; <i32> [#uses=1] %tmp201 = and i32 %tmp196200, 64 ; <i32> [#uses=1] %tmp203 = and i32 %tmp199, -65 ; <i32> [#uses=1] %tmp204 = or i32 %tmp203, %tmp201 ; <i32> [#uses=1] store i32 %tmp204, i32* %tmp198 %tmp206 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1] - %tmp207 = load i32* %tmp206 ; <i32> [#uses=1] + %tmp207 = load i32, i32* %tmp206 ; <i32> [#uses=1] %tmp211 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2] - %tmp212 = load i32* %tmp211 ; <i32> [#uses=1] + %tmp212 = load i32, i32* %tmp211 ; <i32> [#uses=1] %tmp209213 = shl i32 %tmp207, 1 ; <i32> [#uses=1] %tmp214 = and i32 %tmp209213, 128 ; <i32> [#uses=1] %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll index 913c31d957c..792c271d0c0 100644 --- a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll +++ b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll @@ -4,14 +4,14 @@ @vals = external global i32* ; <i32**> [#uses=1] define i32 @test(i32 %i) { - %tmp = load i8** @lens ; <i8*> [#uses=1] + %tmp = load i8*, i8** @lens ; <i8*> [#uses=1] %tmp1 = getelementptr i8, i8* %tmp, i32 %i ; <i8*> [#uses=1] - %tmp.upgrd.1 = load i8* %tmp1 ; <i8> [#uses=1] + %tmp.upgrd.1 = load i8, i8* %tmp1 ; <i8> [#uses=1] %tmp2 = zext i8 %tmp.upgrd.1 to i32 ; <i32> [#uses=1] - %tmp3 = load i32** @vals ; <i32*> [#uses=1] + %tmp3 = load i32*, i32** @vals ; <i32*> [#uses=1] %tmp5 = sub i32 1, %tmp2 ; <i32> [#uses=1] %tmp6 = getelementptr i32, i32* %tmp3, i32 %tmp5 ; <i32*> [#uses=1] - %tmp7 = load i32* %tmp6 ; <i32> [#uses=1] + %tmp7 = load i32, i32* %tmp6 ; <i32> [#uses=1] ret i32 %tmp7 } diff --git a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll index 65dd568b1ee..4b287641d55 100644 --- a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll +++ b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) nounwind { - %tmp93 = load i16* null ; <i16> [#uses=1] + %tmp93 = load i16, i16* null ; <i16> [#uses=1] %tmp99 = call i16 @llvm.bswap.i16( i16 %tmp93 ) ; <i16> [#uses=1] store i16 %tmp99, i16* %ui16 ret void diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll index cb76b5c70cf..c63fd9ae170 100644 --- a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll +++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll @@ -5,7 +5,7 @@ define fastcc void @immed_double_const(i32 %i0, i32 %i1) { entry: - %tmp1 = load i32* null ; <i32> [#uses=1] + %tmp1 = load i32, i32* null ; <i32> [#uses=1] switch i32 %tmp1, label %bb103 [ i32 1, label %bb i32 3, label %bb diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll index 6d9a3fa7b10..9660d450cb4 100644 --- a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll +++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll @@ -10,7 +10,7 @@ entry: cond_true: ; preds = %entry ret void cond_next71: ; preds = %entry - %tmp73.b = load i1* @qsz.b ; <i1> [#uses=1] + %tmp73.b = load i1, i1* @qsz.b ; <i1> [#uses=1] %ii.4.ph = select i1 %tmp73.b, i64 4, i64 0 ; <i64> [#uses=1] br label %bb139 bb82: ; preds = %bb139 diff --git a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll index c7792884bb8..57c3531c3da 100644 --- a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll +++ b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll @@ -8,19 +8,19 @@ entry: %ctz_x = alloca i32, align 4 ; <i32*> [#uses=3] %ctz_c = alloca i32, align 4 ; <i32*> [#uses=2] store i32 61440, i32* %ctz_x - %tmp = load i32* %ctz_x ; <i32> [#uses=1] + %tmp = load i32, i32* %ctz_x ; <i32> [#uses=1] %tmp1 = sub i32 0, %tmp ; <i32> [#uses=1] - %tmp2 = load i32* %ctz_x ; <i32> [#uses=1] + %tmp2 = load i32, i32* %ctz_x ; <i32> [#uses=1] %tmp3 = and i32 %tmp1, %tmp2 ; <i32> [#uses=1] %tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 ) ; <i32> [#uses=1] store i32 %tmp4, i32* %ctz_c - %tmp5 = load i32* %ctz_c ; <i32> [#uses=1] + %tmp5 = load i32, i32* %ctz_c ; <i32> [#uses=1] store i32 %tmp5, i32* %temp - %tmp6 = load i32* %temp ; <i32> [#uses=1] + %tmp6 = load i32, i32* %temp ; <i32> [#uses=1] store i32 %tmp6, i32* %retval br label %return return: ; preds = %entry - %retval2 = load i32* %retval ; <i32> [#uses=1] + %retval2 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval2 } diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll index 3624b510930..2db87fcb1c8 100644 --- a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll +++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll @@ -3,7 +3,7 @@ target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind { - %tmp19 = load i64* %t + %tmp19 = load i64, i64* %t %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19, i1 true ) ; <i64> [#uses=1] %tmp23 = trunc i64 %tmp22 to i32 %tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll index 90fbac73ea5..de445f4c034 100644 --- a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll +++ b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll @@ -552,10 +552,10 @@ xOperationInitMasks.exit: getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 1 ; <<4 x float>*>:548 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 2 ; <<4 x float>*>:549 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 3 ; <<4 x float>*>:550 [#uses=0] - load <4 x float>* null ; <<4 x float>>:551 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:551 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:552 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:553 [#uses=1] - load <4 x float>* %553 ; <<4 x float>>:554 [#uses=1] + load <4 x float>, <4 x float>* %553 ; <<4 x float>>:554 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 3 ; <<4 x float>*>:555 [#uses=0] shufflevector <4 x float> %554, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:556 [#uses=1] call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> zeroinitializer, <4 x float> %556 ) ; <<4 x i32>>:557 [#uses=0] @@ -566,7 +566,7 @@ xOperationInitMasks.exit: getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:561 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:562 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:563 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:564 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:564 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:565 [#uses=1] store <4 x float> %565, <4 x float>* null icmp eq i32 0, 0 ; <i1>:566 [#uses=1] @@ -584,23 +584,23 @@ xOperationInitMasks.exit: xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:571 [#uses=0] - load <4 x float>* null ; <<4 x float>>:572 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:572 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:573 [#uses=0] icmp eq i32 0, 0 ; <i1>:574 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:575 [#uses=0] - load <4 x float>* %0 ; <<4 x float>>:576 [#uses=0] + load <4 x float>, <4 x float>* %0 ; <<4 x float>>:576 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:577 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 0 ; <<4 x float>*>:578 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:579 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:580 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:581 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:582 [#uses=0] - load <4 x float>* null ; <<4 x float>>:583 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:583 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:584 [#uses=1] - load <4 x float>* %584 ; <<4 x float>>:585 [#uses=1] - load <4 x float>* null ; <<4 x float>>:586 [#uses=0] + load <4 x float>, <4 x float>* %584 ; <<4 x float>>:585 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:586 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:587 [#uses=1] - load <4 x float>* %587 ; <<4 x float>>:588 [#uses=1] + load <4 x float>, <4 x float>* %587 ; <<4 x float>>:588 [#uses=1] shufflevector <4 x float> %583, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:589 [#uses=1] shufflevector <4 x float> %585, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:590 [#uses=1] shufflevector <4 x float> %588, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:591 [#uses=1] @@ -609,31 +609,31 @@ xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:594 [#uses=1] fmul <4 x float> zeroinitializer, %591 ; <<4 x float>>:595 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:596 [#uses=2] - load <4 x float>* %596 ; <<4 x float>>:597 [#uses=0] + load <4 x float>, <4 x float>* %596 ; <<4 x float>>:597 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %596 - load <4 x float>* null ; <<4 x float>>:598 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:598 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:599 [#uses=0] shufflevector <4 x float> %594, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:600 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:601 [#uses=2] - load <4 x float>* %601 ; <<4 x float>>:602 [#uses=0] + load <4 x float>, <4 x float>* %601 ; <<4 x float>>:602 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %601 - load <4 x float>* null ; <<4 x float>>:603 [#uses=0] - load <4 x float>* null ; <<4 x float>>:604 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:603 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:604 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:605 [#uses=1] - load <4 x float>* %605 ; <<4 x float>>:606 [#uses=1] + load <4 x float>, <4 x float>* %605 ; <<4 x float>>:606 [#uses=1] fsub <4 x float> zeroinitializer, %604 ; <<4 x float>>:607 [#uses=2] fsub <4 x float> zeroinitializer, %606 ; <<4 x float>>:608 [#uses=2] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:609 [#uses=0] br i1 false, label %617, label %610 ; <label>:610 ; preds = %xPIF.exit - load <4 x float>* null ; <<4 x float>>:611 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:611 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:612 [#uses=2] - load <4 x float>* %612 ; <<4 x float>>:613 [#uses=1] + load <4 x float>, <4 x float>* %612 ; <<4 x float>>:613 [#uses=1] shufflevector <4 x float> %607, <4 x float> %613, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:614 [#uses=1] store <4 x float> %614, <4 x float>* %612 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:615 [#uses=2] - load <4 x float>* %615 ; <<4 x float>>:616 [#uses=0] + load <4 x float>, <4 x float>* %615 ; <<4 x float>>:616 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %615 br label %xST.exit400 @@ -650,17 +650,17 @@ xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit br label %625 ; <label>:625 ; preds = %622, %617 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:626 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:626 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:627 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:628 [#uses=1] - load <4 x float>* %628 ; <<4 x float>>:629 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:630 [#uses=0] + load <4 x float>, <4 x float>* %628 ; <<4 x float>>:629 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:630 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:631 [#uses=1] icmp eq i32 %631, 0 ; <i1>:632 [#uses=1] br i1 %632, label %xST.exit400, label %633 ; <label>:633 ; preds = %625 - load <4 x float>* null ; <<4 x float>>:634 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:634 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %634, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:635 [#uses=1] store <4 x float> %635, <4 x float>* null br label %xST.exit400 @@ -668,10 +668,10 @@ xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit xST.exit400: ; preds = %633, %625, %610 %.17218 = phi <4 x float> [ zeroinitializer, %610 ], [ %608, %633 ], [ %608, %625 ] ; <<4 x float>> [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:636 [#uses=1] - load <4 x float>* %636 ; <<4 x float>>:637 [#uses=0] - load <4 x float>* null ; <<4 x float>>:638 [#uses=2] + load <4 x float>, <4 x float>* %636 ; <<4 x float>>:637 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:638 [#uses=2] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:639 [#uses=0] - load <4 x float>* null ; <<4 x float>>:640 [#uses=2] + load <4 x float>, <4 x float>* null ; <<4 x float>>:640 [#uses=2] fmul <4 x float> %638, %638 ; <<4 x float>>:641 [#uses=1] fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:642 [#uses=0] fmul <4 x float> %640, %640 ; <<4 x float>>:643 [#uses=2] @@ -694,7 +694,7 @@ xST.exit400: ; preds = %633, %625, %610 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:658 [#uses=0] shufflevector <4 x float> %653, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:659 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:660 [#uses=1] - load <4 x float>* %660 ; <<4 x float>>:661 [#uses=0] + load <4 x float>, <4 x float>* %660 ; <<4 x float>>:661 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:662 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:663 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:664 [#uses=0] @@ -705,7 +705,7 @@ xST.exit400: ; preds = %633, %625, %610 br i1 false, label %669, label %667 ; <label>:667 ; preds = %665 - load <4 x float>* null ; <<4 x float>>:668 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:668 [#uses=0] br label %669 ; <label>:669 ; preds = %667, %665 @@ -714,11 +714,11 @@ xST.exit400: ; preds = %633, %625, %610 xST.exit402: ; preds = %669, %657 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:671 [#uses=0] - load <4 x float>* null ; <<4 x float>>:672 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:672 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:673 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:674 [#uses=1] - load <4 x float>* %674 ; <<4 x float>>:675 [#uses=1] - load <4 x float>* null ; <<4 x float>>:676 [#uses=0] + load <4 x float>, <4 x float>* %674 ; <<4 x float>>:675 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:676 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:677 [#uses=1] shufflevector <4 x float> %675, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:678 [#uses=1] fmul <4 x float> zeroinitializer, %677 ; <<4 x float>>:679 [#uses=0] @@ -729,7 +729,7 @@ xST.exit402: ; preds = %669, %657 ; <label>:683 ; preds = %xST.exit402 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:684 [#uses=1] - load <4 x float>* %684 ; <<4 x float>>:685 [#uses=0] + load <4 x float>, <4 x float>* %684 ; <<4 x float>>:685 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:686 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:687 [#uses=0] shufflevector <4 x float> %681, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:688 [#uses=0] @@ -737,7 +737,7 @@ xST.exit402: ; preds = %669, %657 ; <label>:689 ; preds = %xST.exit402 shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:690 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:691 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:691 [#uses=1] shufflevector <4 x i32> %691, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:692 [#uses=1] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %692, <4 x i32> zeroinitializer ) ; <i32>:693 [#uses=1] icmp eq i32 %693, 0 ; <i1>:694 [#uses=0] @@ -747,48 +747,48 @@ xST.exit405: ; preds = %689, %683 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:695 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:696 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:697 [#uses=0] - load <4 x float>* null ; <<4 x float>>:698 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:698 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:699 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:700 [#uses=1] fadd <4 x float> zeroinitializer, %700 ; <<4 x float>>:701 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:702 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:702 [#uses=1] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %702, <4 x i32> zeroinitializer ) ; <i32>:703 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:704 [#uses=2] - load <4 x float>* %704 ; <<4 x float>>:705 [#uses=0] + load <4 x float>, <4 x float>* %704 ; <<4 x float>>:705 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %704 - load <4 x float>* null ; <<4 x float>>:706 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:706 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* null getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:707 [#uses=2] - load <4 x float>* %707 ; <<4 x float>>:708 [#uses=0] + load <4 x float>, <4 x float>* %707 ; <<4 x float>>:708 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %707 - load <4 x float>* null ; <<4 x float>>:709 [#uses=0] - load <4 x float>* null ; <<4 x float>>:710 [#uses=0] - load <4 x float>* null ; <<4 x float>>:711 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:709 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:710 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:711 [#uses=1] shufflevector <4 x float> %711, <4 x float> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>>:712 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:713 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:714 [#uses=1] - load <4 x float>* %714 ; <<4 x float>>:715 [#uses=0] + load <4 x float>, <4 x float>* %714 ; <<4 x float>>:715 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:716 [#uses=0] fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:717 [#uses=1] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:718 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:718 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 0 ; <<4 x float>*>:719 [#uses=1] store <4 x float> zeroinitializer, <4 x float>* %719 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:720 [#uses=1] shufflevector <4 x float> %717, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:721 [#uses=1] store <4 x float> %721, <4 x float>* %720 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:722 [#uses=1] - load <4 x float>* %722 ; <<4 x float>>:723 [#uses=1] + load <4 x float>, <4 x float>* %722 ; <<4 x float>>:723 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %723, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:724 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:725 [#uses=1] store <4 x float> zeroinitializer, <4 x float>* %725 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:726 [#uses=1] - load <4 x float>* %726 ; <<4 x float>>:727 [#uses=0] + load <4 x float>, <4 x float>* %726 ; <<4 x float>>:727 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:728 [#uses=1] - load <4 x float>* %728 ; <<4 x float>>:729 [#uses=0] + load <4 x float>, <4 x float>* %728 ; <<4 x float>>:729 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:730 [#uses=1] - load <4 x float>* %730 ; <<4 x float>>:731 [#uses=0] + load <4 x float>, <4 x float>* %730 ; <<4 x float>>:731 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:732 [#uses=1] - load <4 x float>* %732 ; <<4 x float>>:733 [#uses=0] + load <4 x float>, <4 x float>* %732 ; <<4 x float>>:733 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:734 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:735 [#uses=1] fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:736 [#uses=1] @@ -798,26 +798,26 @@ xST.exit405: ; preds = %689, %683 call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:740 [#uses=1] icmp eq i32 %740, 0 ; <i1>:741 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:742 [#uses=2] - load <4 x float>* %742 ; <<4 x float>>:743 [#uses=1] + load <4 x float>, <4 x float>* %742 ; <<4 x float>>:743 [#uses=1] shufflevector <4 x float> %736, <4 x float> %743, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:744 [#uses=1] store <4 x float> %744, <4 x float>* %742 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:745 [#uses=1] - load <4 x float>* %745 ; <<4 x float>>:746 [#uses=1] + load <4 x float>, <4 x float>* %745 ; <<4 x float>>:746 [#uses=1] shufflevector <4 x float> %737, <4 x float> %746, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:747 [#uses=0] shufflevector <4 x float> %738, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:748 [#uses=1] store <4 x float> %748, <4 x float>* null getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:749 [#uses=1] - load <4 x float>* %749 ; <<4 x float>>:750 [#uses=1] + load <4 x float>, <4 x float>* %749 ; <<4 x float>>:750 [#uses=1] shufflevector <4 x float> %739, <4 x float> %750, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:751 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:752 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:753 [#uses=1] - load <4 x float>* %753 ; <<4 x float>>:754 [#uses=0] + load <4 x float>, <4 x float>* %753 ; <<4 x float>>:754 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:755 [#uses=0] - load <4 x float>* null ; <<4 x float>>:756 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:756 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:757 [#uses=1] shufflevector <4 x float> %756, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:758 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:759 [#uses=1] - load <4 x float>* %759 ; <<4 x float>>:760 [#uses=0] + load <4 x float>, <4 x float>* %759 ; <<4 x float>>:760 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:761 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:762 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:763 [#uses=1] @@ -828,11 +828,11 @@ xST.exit405: ; preds = %689, %683 ; <label>:767 ; preds = %xST.exit405 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:768 [#uses=0] - load <4 x float>* null ; <<4 x float>>:769 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:769 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %769, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:770 [#uses=1] store <4 x float> %770, <4 x float>* null getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:771 [#uses=1] - load <4 x float>* %771 ; <<4 x float>>:772 [#uses=0] + load <4 x float>, <4 x float>* %771 ; <<4 x float>>:772 [#uses=0] br label %xST.exit422 ; <label>:773 ; preds = %xST.exit405 @@ -851,19 +851,19 @@ xST.exit422: ; preds = %773, %767 br label %xST.exit431 ; <label>:780 ; preds = %xST.exit422 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:781 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:781 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:782 [#uses=2] - load <4 x float>* %782 ; <<4 x float>>:783 [#uses=0] + load <4 x float>, <4 x float>* %782 ; <<4 x float>>:783 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %782 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:784 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:784 [#uses=1] shufflevector <4 x i32> %784, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:785 [#uses=0] icmp eq i32 0, 0 ; <i1>:786 [#uses=0] br label %xST.exit431 xST.exit431: ; preds = %780, %777 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:787 [#uses=0] - load <4 x float>* null ; <<4 x float>>:788 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:789 [#uses=2] + load <4 x float>, <4 x float>* null ; <<4 x float>>:788 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:789 [#uses=2] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %789, <4 x i32> zeroinitializer ) ; <i32>:790 [#uses=1] icmp eq i32 %790, 0 ; <i1>:791 [#uses=0] shufflevector <4 x i32> %789, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:792 [#uses=1] @@ -872,7 +872,7 @@ xST.exit431: ; preds = %780, %777 br i1 %794, label %797, label %795 ; <label>:795 ; preds = %xST.exit431 - load <4 x float>* null ; <<4 x float>>:796 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:796 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* null br label %797 @@ -882,26 +882,26 @@ xST.exit431: ; preds = %780, %777 br i1 false, label %xST.exit434, label %799 ; <label>:799 ; preds = %797 - load <4 x float>* null ; <<4 x float>>:800 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:800 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* null br label %xST.exit434 xST.exit434: ; preds = %799, %797 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:801 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:801 [#uses=1] shufflevector <4 x i32> %801, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:802 [#uses=0] shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:803 [#uses=0] icmp eq i32 0, 0 ; <i1>:804 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 0 ; <<4 x float>*>:805 [#uses=1] - load <4 x float>* %805 ; <<4 x float>>:806 [#uses=0] + load <4 x float>, <4 x float>* %805 ; <<4 x float>>:806 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:807 [#uses=1] - load <4 x float>* %807 ; <<4 x float>>:808 [#uses=0] - load <4 x float>* null ; <<4 x float>>:809 [#uses=0] - load <4 x float>* null ; <<4 x float>>:810 [#uses=0] + load <4 x float>, <4 x float>* %807 ; <<4 x float>>:808 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:809 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:810 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:811 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:812 [#uses=1] - load <4 x float>* %812 ; <<4 x float>>:813 [#uses=0] + load <4 x float>, <4 x float>* %812 ; <<4 x float>>:813 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:814 [#uses=1] - load <4 x float>* %814 ; <<4 x float>>:815 [#uses=0] + load <4 x float>, <4 x float>* %814 ; <<4 x float>>:815 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:816 [#uses=0] unreachable @@ -909,11 +909,11 @@ xPBRK.exit: ; preds = %.critedge store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* %.sub7896 store <4 x i32> zeroinitializer, <4 x i32>* null getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:817 [#uses=1] - load <4 x float>* %817 ; <<4 x float>>:818 [#uses=1] + load <4 x float>, <4 x float>* %817 ; <<4 x float>>:818 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:819 [#uses=1] - load <4 x float>* %819 ; <<4 x float>>:820 [#uses=1] + load <4 x float>, <4 x float>* %819 ; <<4 x float>>:820 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:821 [#uses=1] - load <4 x float>* %821 ; <<4 x float>>:822 [#uses=1] + load <4 x float>, <4 x float>* %821 ; <<4 x float>>:822 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:823 [#uses=1] shufflevector <4 x float> %818, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:824 [#uses=1] shufflevector <4 x float> %820, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:825 [#uses=1] @@ -921,10 +921,10 @@ xPBRK.exit: ; preds = %.critedge shufflevector <4 x float> %823, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:827 [#uses=0] shufflevector <4 x float> %824, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:828 [#uses=1] store <4 x float> %828, <4 x float>* null - load <4 x float>* null ; <<4 x float>>:829 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:829 [#uses=1] shufflevector <4 x float> %825, <4 x float> %829, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:830 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:831 [#uses=2] - load <4 x float>* %831 ; <<4 x float>>:832 [#uses=1] + load <4 x float>, <4 x float>* %831 ; <<4 x float>>:832 [#uses=1] shufflevector <4 x float> %826, <4 x float> %832, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:833 [#uses=1] store <4 x float> %833, <4 x float>* %831 br label %xLS.exit449 @@ -959,13 +959,13 @@ xLS.exit449: ; preds = %1215, %xPBRK.exit %.17735 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07734, %1215 ] ; <<4 x float>> [#uses=2] %.17770 = phi <4 x float> [ undef, %xPBRK.exit ], [ %.07769, %1215 ] ; <<4 x float>> [#uses=2] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:834 [#uses=0] - load <4 x float>* null ; <<4 x float>>:835 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:835 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:836 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:837 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:838 [#uses=0] shufflevector <4 x float> %835, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:839 [#uses=1] getelementptr <4 x float>, <4 x float>* null, i32 878 ; <<4 x float>*>:840 [#uses=1] - load <4 x float>* %840 ; <<4 x float>>:841 [#uses=0] + load <4 x float>, <4 x float>* %840 ; <<4 x float>>:841 [#uses=0] call <4 x float> @llvm.ppc.altivec.vcfsx( <4 x i32> zeroinitializer, i32 0 ) ; <<4 x float>>:842 [#uses=1] shufflevector <4 x float> %842, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:843 [#uses=2] call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> %843, <4 x float> %839 ) ; <<4 x i32>>:844 [#uses=1] @@ -990,7 +990,7 @@ xLS.exit449: ; preds = %1215, %xPBRK.exit ; <label>:856 ; preds = %854 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:857 [#uses=2] - load <4 x float>* %857 ; <<4 x float>>:858 [#uses=0] + load <4 x float>, <4 x float>* %857 ; <<4 x float>>:858 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %857 br label %859 @@ -1005,7 +1005,7 @@ xLS.exit449: ; preds = %1215, %xPBRK.exit br label %864 ; <label>:864 ; preds = %861, %859 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:865 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:865 [#uses=1] shufflevector <4 x i32> %865, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:866 [#uses=0] br i1 false, label %868, label %867 @@ -1020,7 +1020,7 @@ xLS.exit449: ; preds = %1215, %xPBRK.exit xST.exit451: ; preds = %868, %849 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:870 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:871 [#uses=0] - load <4 x float>* null ; <<4 x float>>:872 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:872 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:873 [#uses=1] bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:874 [#uses=1] xor <4 x i32> %874, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:875 [#uses=0] @@ -1029,7 +1029,7 @@ xST.exit451: ; preds = %868, %849 bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:878 [#uses=1] xor <4 x i32> %878, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>>:879 [#uses=1] bitcast <4 x i32> %879 to <4 x float> ; <<4 x float>>:880 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:881 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:881 [#uses=1] icmp eq i32 0, 0 ; <i1>:882 [#uses=1] br i1 %882, label %888, label %883 @@ -1061,18 +1061,18 @@ xST.exit451: ; preds = %868, %849 br label %898 ; <label>:898 ; preds = %897, %894 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:899 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:899 [#uses=0] br i1 false, label %xST.exit453, label %900 ; <label>:900 ; preds = %898 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:901 [#uses=1] - load <4 x float>* %901 ; <<4 x float>>:902 [#uses=1] + load <4 x float>, <4 x float>* %901 ; <<4 x float>>:902 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %902, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:903 [#uses=0] br label %xST.exit453 xST.exit453: ; preds = %900, %898, %883 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:904 [#uses=0] - load <4 x float>* null ; <<4 x float>>:905 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:905 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:906 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:907 [#uses=1] shufflevector <4 x float> %905, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:908 [#uses=1] @@ -1080,15 +1080,15 @@ xST.exit453: ; preds = %900, %898, %883 bitcast <4 x float> %908 to <4 x i32> ; <<4 x i32>>:910 [#uses=0] bitcast <4 x float> %907 to <4 x i32> ; <<4 x i32>>:911 [#uses=0] bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:912 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:913 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:913 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 2, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:914 [#uses=0] br i1 false, label %915, label %xPIF.exit455 ; <label>:915 ; preds = %xST.exit453 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:916 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:916 [#uses=0] getelementptr [4 x <4 x i32>], [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:917 [#uses=1] store <4 x i32> zeroinitializer, <4 x i32>* %917 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:918 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:918 [#uses=1] and <4 x i32> %918, zeroinitializer ; <<4 x i32>>:919 [#uses=0] br label %.critedge7899 @@ -1102,15 +1102,15 @@ xPBRK.exit456: ; preds = %.critedge7899 xPIF.exit455: ; preds = %xST.exit453 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 0 ; <<4 x float>*>:922 [#uses=1] - load <4 x float>* %922 ; <<4 x float>>:923 [#uses=0] + load <4 x float>, <4 x float>* %922 ; <<4 x float>>:923 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:924 [#uses=1] - load <4 x float>* %924 ; <<4 x float>>:925 [#uses=0] + load <4 x float>, <4 x float>* %924 ; <<4 x float>>:925 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:926 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:927 [#uses=0] shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:928 [#uses=0] bitcast { { i16, i16, i32 } }* %1 to <4 x float>* ; <<4 x float>*>:929 [#uses=0] bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>>:930 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:931 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:931 [#uses=0] icmp eq i32 0, 0 ; <i1>:932 [#uses=1] br i1 %932, label %934, label %933 @@ -1131,11 +1131,11 @@ xST.exit459: ; preds = %937, %934 call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %938, <4 x i32> zeroinitializer ) ; <i32>:939 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:940 [#uses=1] store <4 x float> zeroinitializer, <4 x float>* %940 - load <4 x float>* null ; <<4 x float>>:941 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:941 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %941, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:942 [#uses=1] store <4 x float> %942, <4 x float>* null shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:943 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:944 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:944 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:945 [#uses=0] br i1 false, label %947, label %946 @@ -1170,7 +1170,7 @@ xST.exit459: ; preds = %937, %934 br label %xStoreDestAddressWithMask.exit461 xStoreDestAddressWithMask.exit461: ; preds = %958, %955 - load <4 x float>* %0 ; <<4 x float>>:960 [#uses=0] + load <4 x float>, <4 x float>* %0 ; <<4 x float>>:960 [#uses=0] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:961 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 0 ; <<4 x float>*>:962 [#uses=0] br i1 false, label %968, label %xST.exit463 @@ -1179,7 +1179,7 @@ xST.exit463: ; preds = %xStoreDestAddressWithMask.exit461 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:963 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 2 ; <<4 x float>*>:964 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 3 ; <<4 x float>*>:965 [#uses=0] - load <4 x float>* %0 ; <<4 x float>>:966 [#uses=3] + load <4 x float>, <4 x float>* %0 ; <<4 x float>>:966 [#uses=3] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <i32>:967 [#uses=0] br i1 false, label %972, label %969 @@ -1197,7 +1197,7 @@ xST.exit463: ; preds = %xStoreDestAddressWithMask.exit461 call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>>:973 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* null store <4 x float> zeroinitializer, <4 x float>* null - load <4 x float>* null ; <<4 x float>>:974 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:974 [#uses=0] bitcast <4 x float> %966 to <4 x i32> ; <<4 x i32>>:975 [#uses=1] call <4 x i32> @llvm.ppc.altivec.vsel( <4 x i32> zeroinitializer, <4 x i32> %975, <4 x i32> zeroinitializer ) ; <<4 x i32>>:976 [#uses=1] bitcast <4 x i32> %976 to <4 x float> ; <<4 x float>>:977 [#uses=1] @@ -1209,7 +1209,7 @@ xST.exit463: ; preds = %xStoreDestAddressWithMask.exit461 br label %xST.exit465 xST.exit465: ; preds = %972, %969 - load <4 x float>* %0 ; <<4 x float>>:982 [#uses=3] + load <4 x float>, <4 x float>* %0 ; <<4 x float>>:982 [#uses=3] icmp eq i32 0, 0 ; <i1>:983 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 0 ; <<4 x float>*>:984 [#uses=1] br i1 %983, label %989, label %985 @@ -1226,7 +1226,7 @@ xST.exit465: ; preds = %972, %969 shufflevector <4 x i32> zeroinitializer, <4 x i32> undef, <4 x i32> zeroinitializer ; <<4 x i32>>:991 [#uses=0] store <4 x float> zeroinitializer, <4 x float>* %984 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:992 [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:993 [#uses=0] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:993 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:994 [#uses=0] bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:995 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:996 [#uses=0] @@ -1238,16 +1238,16 @@ xST.exit465: ; preds = %972, %969 br label %xST.exit467 xST.exit467: ; preds = %989, %985 - load <4 x float>* %0 ; <<4 x float>>:1002 [#uses=5] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:1003 [#uses=2] + load <4 x float>, <4 x float>* %0 ; <<4 x float>>:1002 [#uses=5] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:1003 [#uses=2] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1003, <4 x i32> zeroinitializer ) ; <i32>:1004 [#uses=0] br i1 false, label %1011, label %1005 ; <label>:1005 ; preds = %xST.exit467 - load <4 x float>* null ; <<4 x float>>:1006 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1006 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:1007 [#uses=1] - load <4 x float>* %1007 ; <<4 x float>>:1008 [#uses=0] - load <4 x float>* null ; <<4 x float>>:1009 [#uses=0] + load <4 x float>, <4 x float>* %1007 ; <<4 x float>>:1008 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1009 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1010 [#uses=0] br label %xST.exit469 @@ -1293,15 +1293,15 @@ xST.exit469: ; preds = %1027, %1025, %1005 %.17463 = phi <4 x float> [ %.27464, %1005 ], [ %.07462, %1027 ], [ %.07462, %1025 ] ; <<4 x float>> [#uses=1] %.17468 = phi <4 x float> [ %.27469, %1005 ], [ %.07467, %1027 ], [ %.07467, %1025 ] ; <<4 x float>> [#uses=1] %.07489 = phi <4 x float> [ %1002, %1005 ], [ %.17490, %1027 ], [ %.17490, %1025 ] ; <<4 x float>> [#uses=1] - load <4 x float>* null ; <<4 x float>>:1029 [#uses=0] - load <4 x float>* null ; <<4 x float>>:1030 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1029 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1030 [#uses=0] fsub <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1031 [#uses=1] br i1 false, label %1037, label %1032 ; <label>:1032 ; preds = %xST.exit469 - load <4 x float>* null ; <<4 x float>>:1033 [#uses=0] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1033 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:1034 [#uses=1] - load <4 x float>* %1034 ; <<4 x float>>:1035 [#uses=0] + load <4 x float>, <4 x float>* %1034 ; <<4 x float>>:1035 [#uses=0] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:1036 [#uses=0] br label %xST.exit472 @@ -1319,7 +1319,7 @@ xST.exit469: ; preds = %1027, %1025, %1005 ; <label>:1042 ; preds = %1040 getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:1043 [#uses=1] - load <4 x float>* %1043 ; <<4 x float>>:1044 [#uses=0] + load <4 x float>, <4 x float>* %1043 ; <<4 x float>>:1044 [#uses=0] br label %1045 ; <label>:1045 ; preds = %1042, %1040 @@ -1367,7 +1367,7 @@ xST.exit472: ; preds = %1050, %1048, %1032 br label %xST.exit474 xST.exit474: ; preds = %1059, %1058, %1051 - load <4 x float>* null ; <<4 x float>>:1060 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1060 [#uses=1] fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1061 [#uses=1] fmul <4 x float> %1060, zeroinitializer ; <<4 x float>>:1062 [#uses=2] br i1 false, label %1065, label %1063 @@ -1555,7 +1555,7 @@ xST.exit489: ; preds = %1109, %1108, %1101 br label %xST.exit492 xST.exit492: ; preds = %1118, %1117, %1110 - load <4 x float>* null ; <<4 x float>>:1119 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1119 [#uses=1] fmul <4 x float> %1119, zeroinitializer ; <<4 x float>>:1120 [#uses=1] fmul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1121 [#uses=1] br i1 false, label %1123, label %1122 @@ -1590,7 +1590,7 @@ xST.exit492: ; preds = %1118, %1117, %1110 xST.exit495: ; preds = %1130, %1129, %1122 %.07582 = phi <4 x float> [ %1121, %1122 ], [ %.17583, %1130 ], [ %.17583, %1129 ] ; <<4 x float>> [#uses=1] %.07590 = phi <4 x float> [ %1120, %1122 ], [ %.17591, %1130 ], [ %.17591, %1129 ] ; <<4 x float>> [#uses=1] - load <4 x float>* null ; <<4 x float>>:1131 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1131 [#uses=1] fadd <4 x float> %1131, zeroinitializer ; <<4 x float>>:1132 [#uses=1] fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1133 [#uses=1] br i1 false, label %1135, label %1134 @@ -1625,11 +1625,11 @@ xST.exit495: ; preds = %1130, %1129, %1122 xST.exit498: ; preds = %1142, %1141, %1134 %.07617 = phi <4 x float> [ %1133, %1134 ], [ %.17618, %1142 ], [ %.17618, %1141 ] ; <<4 x float>> [#uses=1] %.07621 = phi <4 x float> [ %1132, %1134 ], [ %.17622, %1142 ], [ %.17622, %1141 ] ; <<4 x float>> [#uses=1] - load <4 x float>* null ; <<4 x float>>:1143 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1143 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1144 [#uses=1] - load <4 x float>* %1144 ; <<4 x float>>:1145 [#uses=1] + load <4 x float>, <4 x float>* %1144 ; <<4 x float>>:1145 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1146 [#uses=1] - load <4 x float>* %1146 ; <<4 x float>>:1147 [#uses=1] + load <4 x float>, <4 x float>* %1146 ; <<4 x float>>:1147 [#uses=1] shufflevector <4 x float> %1143, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1148 [#uses=1] shufflevector <4 x float> %1145, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1149 [#uses=1] shufflevector <4 x float> %1147, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:1150 [#uses=1] @@ -1671,11 +1671,11 @@ xST.exit501: ; preds = %1163, %1162, %1155 %.07656 = phi <4 x float> [ %1153, %1155 ], [ %.17657, %1163 ], [ %.17657, %1162 ] ; <<4 x float>> [#uses=1] %.07660 = phi <4 x float> [ %1152, %1155 ], [ %.17661, %1163 ], [ %.17661, %1162 ] ; <<4 x float>> [#uses=1] %.07664 = phi <4 x float> [ %1151, %1155 ], [ %.17665, %1163 ], [ %.17665, %1162 ] ; <<4 x float>> [#uses=1] - load <4 x float>* null ; <<4 x float>>:1164 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1164 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 2 ; <<4 x float>*>:1165 [#uses=1] - load <4 x float>* %1165 ; <<4 x float>>:1166 [#uses=1] + load <4 x float>, <4 x float>* %1165 ; <<4 x float>>:1166 [#uses=1] getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:1167 [#uses=1] - load <4 x float>* %1167 ; <<4 x float>>:1168 [#uses=1] + load <4 x float>, <4 x float>* %1167 ; <<4 x float>>:1168 [#uses=1] fadd <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:1169 [#uses=1] fadd <4 x float> zeroinitializer, %1164 ; <<4 x float>>:1170 [#uses=1] fadd <4 x float> zeroinitializer, %1166 ; <<4 x float>>:1171 [#uses=1] @@ -1734,21 +1734,21 @@ xST.exit504: ; preds = %1181, %1180, %1173 br label %1188 ; <label>:1188 ; preds = %1187, %1186 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:1189 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:1189 [#uses=1] shufflevector <4 x i32> %1189, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>>:1190 [#uses=1] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1190, <4 x i32> zeroinitializer ) ; <i32>:1191 [#uses=1] icmp eq i32 %1191, 0 ; <i1>:1192 [#uses=1] br i1 %1192, label %1196, label %1193 ; <label>:1193 ; preds = %1188 - load <4 x float>* null ; <<4 x float>>:1194 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1194 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %1194, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:1195 [#uses=1] store <4 x float> %1195, <4 x float>* null br label %1196 ; <label>:1196 ; preds = %1193, %1188 %.07742 = phi <4 x float> [ zeroinitializer, %1193 ], [ zeroinitializer, %1188 ] ; <<4 x float>> [#uses=0] - load <4 x i32>* %.sub7896 ; <<4 x i32>>:1197 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:1197 [#uses=1] shufflevector <4 x i32> %1197, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>>:1198 [#uses=1] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1198, <4 x i32> zeroinitializer ) ; <i32>:1199 [#uses=1] icmp eq i32 %1199, 0 ; <i1>:1200 [#uses=1] @@ -1765,20 +1765,20 @@ xST.exit507: ; preds = %1201, %1196, %1183 br i1 %1203, label %1207, label %1204 ; <label>:1204 ; preds = %xST.exit507 - load <4 x float>* null ; <<4 x float>>:1205 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1205 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %1205, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1206 [#uses=1] store <4 x float> %1206, <4 x float>* null br label %1207 ; <label>:1207 ; preds = %1204, %xST.exit507 - load <4 x i32>* %.sub7896 ; <<4 x i32>>:1208 [#uses=1] + load <4 x i32>, <4 x i32>* %.sub7896 ; <<4 x i32>>:1208 [#uses=1] shufflevector <4 x i32> %1208, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>>:1209 [#uses=1] call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> %1209, <4 x i32> zeroinitializer ) ; <i32>:1210 [#uses=1] icmp eq i32 %1210, 0 ; <i1>:1211 [#uses=1] br i1 %1211, label %1215, label %1212 ; <label>:1212 ; preds = %1207 - load <4 x float>* null ; <<4 x float>>:1213 [#uses=1] + load <4 x float>, <4 x float>* null ; <<4 x float>>:1213 [#uses=1] shufflevector <4 x float> zeroinitializer, <4 x float> %1213, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:1214 [#uses=1] store <4 x float> %1214, <4 x float>* null br label %1215 diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll index 53231b4f435..017775781f7 100644 --- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll +++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -22,7 +22,7 @@ define i64 @test(i32 %A, i32 %B, i32 %C) nounwind { entry: %Y = alloca i32, align 4 ; <i32*> [#uses=2] %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1] - %tmp5 = load i32* %Y ; <i32> [#uses=1] + %tmp5 = load i32, i32* %Y ; <i32> [#uses=1] %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1] %tmp7 = shl i64 %tmp56, 32 ; <i64> [#uses=1] %tmp89 = zext i32 %tmp4 to i64 ; <i64> [#uses=1] diff --git a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll index 382ba1f6a82..bba3707c113 100644 --- a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll +++ b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll @@ -15,7 +15,7 @@ entry: %retval = alloca i32, align 4 ; <i32*> [#uses=1] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr - %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp = load i32, i32* %i_addr ; <i32> [#uses=1] %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] @@ -24,7 +24,7 @@ entry: cond_true: ; preds = %entry %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] - %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp7 = load i32, i32* %q_addr ; <i32> [#uses=1] %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] @@ -33,7 +33,7 @@ cond_true: ; preds = %entry cond_false: ; preds = %entry %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] - %tmp27 = load i32* %q_addr ; <i32> [#uses=1] + %tmp27 = load i32, i32* %q_addr ; <i32> [#uses=1] %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] @@ -54,7 +54,7 @@ cond_next18: ; preds = %cond_false15, %cond_true11 br label %return return: ; preds = %cond_next18 - %retval20 = load i32* %retval ; <i32> [#uses=1] + %retval20 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval20 } diff --git a/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll index 40f46fda468..ee1e23324f7 100644 --- a/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll +++ b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll @@ -8,7 +8,7 @@ define void @foo() { entry: %ttype = alloca i32, align 4 ; <i32*> [#uses=1] %regs = alloca [1024 x %struct.__db_region], align 16 ; <[1024 x %struct.__db_region]*> [#uses=0] - %tmp = load i32* %ttype, align 4 ; <i32> [#uses=1] + %tmp = load i32, i32* %ttype, align 4 ; <i32> [#uses=1] %tmp1 = call i32 (...)* @bork( i32 %tmp ) ; <i32> [#uses=0] ret void diff --git a/test/CodeGen/PowerPC/2007-09-08-unaligned.ll b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll index 8897189d29b..341b6321b3b 100644 --- a/test/CodeGen/PowerPC/2007-09-08-unaligned.ll +++ b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll @@ -17,17 +17,17 @@ entry: %retval = alloca i32, align 4 ; <i32*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %tmp = getelementptr %struct.anon, %struct.anon* @s, i32 0, i32 1 ; <float*> [#uses=1] - %tmp1 = load float* %tmp, align 1 ; <float> [#uses=1] + %tmp1 = load float, float* %tmp, align 1 ; <float> [#uses=1] %tmp2 = getelementptr %struct.anon, %struct.anon* @t, i32 0, i32 1 ; <float*> [#uses=1] store float %tmp1, float* %tmp2, align 1 %tmp3 = getelementptr <{ i8, double }>, <{ i8, double }>* @u, i32 0, i32 1 ; <double*> [#uses=1] - %tmp4 = load double* %tmp3, align 1 ; <double> [#uses=1] + %tmp4 = load double, double* %tmp3, align 1 ; <double> [#uses=1] %tmp5 = getelementptr <{ i8, double }>, <{ i8, double }>* @v, i32 0, i32 1 ; <double*> [#uses=1] store double %tmp4, double* %tmp5, align 1 br label %return return: ; preds = %entry - %retval6 = load i32* %retval ; <i32> [#uses=1] + %retval6 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval6 } @@ -37,16 +37,16 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %tmp = call i32 @foo( ) ; <i32> [#uses=0] %tmp1 = getelementptr %struct.anon, %struct.anon* @t, i32 0, i32 1 ; <float*> [#uses=1] - %tmp2 = load float* %tmp1, align 1 ; <float> [#uses=1] + %tmp2 = load float, float* %tmp1, align 1 ; <float> [#uses=1] %tmp23 = fpext float %tmp2 to double ; <double> [#uses=1] %tmp4 = getelementptr <{ i8, double }>, <{ i8, double }>* @v, i32 0, i32 1 ; <double*> [#uses=1] - %tmp5 = load double* %tmp4, align 1 ; <double> [#uses=1] + %tmp5 = load double, double* %tmp4, align 1 ; <double> [#uses=1] %tmp6 = getelementptr [8 x i8], [8 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1] %tmp7 = call i32 (i8*, ...)* @printf( i8* %tmp6, double %tmp23, double %tmp5 ) ; <i32> [#uses=0] br label %return return: ; preds = %entry - %retval8 = load i32* %retval ; <i32> [#uses=1] + %retval8 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval8 } diff --git a/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll b/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll index 84fadd1b046..07b1f8d7698 100644 --- a/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll +++ b/test/CodeGen/PowerPC/2007-10-18-PtrArithmetic.ll @@ -10,9 +10,9 @@ entry: cond_true: ; preds = %entry %tmp89 = bitcast float* %res to <4 x i32>* ; <<4 x i32>*> [#uses=1] %tmp1011 = bitcast float* %argA to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %tmp14 = load <4 x i32>* %tmp1011, align 16 ; <<4 x i32>> [#uses=1] + %tmp14 = load <4 x i32>, <4 x i32>* %tmp1011, align 16 ; <<4 x i32>> [#uses=1] %tmp1516 = bitcast float* %argB to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %tmp18 = load <4 x i32>* %tmp1516, align 16 ; <<4 x i32>> [#uses=1] + %tmp18 = load <4 x i32>, <4 x i32>* %tmp1516, align 16 ; <<4 x i32>> [#uses=1] %tmp19 = sdiv <4 x i32> %tmp14, %tmp18 ; <<4 x i32>> [#uses=1] store <4 x i32> %tmp19, <4 x i32>* %tmp89, align 16 ret void diff --git a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll index a60d11c85c5..b136f2139ac 100644 --- a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll +++ b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll @@ -18,8 +18,8 @@ define %struct.NSManagedObjectContext* @"+[ListGenerator(Private) managedObjectC entry: %storeCoordinator = alloca %struct.NSPersistentStoreCoordinator* ; <%struct.NSPersistentStoreCoordinator**> [#uses=0] %tmp29 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2" ) ; <%struct.objc_object*> [#uses=0] - %tmp34 = load %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1] - %tmp37 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_5", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] + %tmp34 = load %struct.NSString*, %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1] + %tmp37 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_5", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] %tmp42 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 1 ) ; <%struct.objc_object*> [#uses=1] %tmp45 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp37( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_5", %struct.objc_object* %tmp42, %struct.NSString* null ) ; <%struct.objc_object*> [#uses=1] %tmp48 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* null( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", %struct.NSString* %tmp34, i8* null, %struct.NSURL* null, %struct.objc_object* %tmp45, %struct.NSError** null ) ; <%struct.objc_object*> [#uses=0] diff --git a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll index 3d1a328ec3c..0399020e097 100644 --- a/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll +++ b/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll @@ -14,11 +14,11 @@ define %struct.NSManagedObjectContext* @"+[ListGenerator(Private) managedObjectContextWithModelURL:storeURL:]"(%struct.objc_object* %self, %struct._message_ref_t* %_cmd, %struct.NSURL* %modelURL, %struct.NSURL* %storeURL) { entry: - %tmp27 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] + %tmp27 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] %tmp29 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp27( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_2" ) ; <%struct.objc_object*> [#uses=0] - %tmp33 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] - %tmp34 = load %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1] - %tmp40 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] + %tmp33 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] + %tmp34 = load %struct.NSString*, %struct.NSString** @NSXMLStoreType, align 8 ; <%struct.NSString*> [#uses=1] + %tmp40 = load %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*, %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)** getelementptr (%struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 0, i32 0), align 8 ; <%struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)*> [#uses=1] %tmp42 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp40( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_4", i32 1 ) ; <%struct.objc_object*> [#uses=0] %tmp48 = call %struct.objc_object* (%struct.objc_object*, %struct._message_ref_t*, ...)* %tmp33( %struct.objc_object* null, %struct._message_ref_t* @"\01L_OBJC_MESSAGE_REF_6", %struct.NSString* %tmp34, i8* null, %struct.NSURL* null, %struct.objc_object* null, %struct.NSError** null ) ; <%struct.objc_object*> [#uses=0] unreachable diff --git a/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll b/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll index 86c7b573ebb..34122912349 100644 --- a/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll +++ b/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll @@ -39,7 +39,7 @@ unwind: ; preds = %cond_true, %entry resume { i8*, i32 } %exn invcont23: ; preds = %cond_true - %tmp27 = load i64* %tmp26, align 8 ; <i64> [#uses=1] + %tmp27 = load i64, i64* %tmp26, align 8 ; <i64> [#uses=1] %tmp28 = sub i64 %range_addr.1.0, %tmp27 ; <i64> [#uses=1] br label %bb30 diff --git a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll index d1f02858616..4830ca60f9f 100644 --- a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll +++ b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll @@ -6,7 +6,7 @@ define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) { entry: - %input2 = load <4 x float>* null, align 16 ; <<4 x float>> + %input2 = load <4 x float>, <4 x float>* null, align 16 ; <<4 x float>> %shuffle7 = shufflevector <4 x float> %input2, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x float>> [#uses=1] %mul1 = fmul <4 x float> %shuffle7, zeroinitializer ; <<4 x diff --git a/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll b/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll index e28a3e04cf1..73a804bf02b 100644 --- a/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll +++ b/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll @@ -2,7 +2,7 @@ define i32 @bork(i64 %foo, i64 %bar) { entry: - %tmp = load i64* null, align 8 ; <i64> [#uses=2] + %tmp = load i64, i64* null, align 8 ; <i64> [#uses=2] %tmp2 = icmp ule i64 %tmp, 0 ; <i1> [#uses=1] %min = select i1 %tmp2, i64 %tmp, i64 0 ; <i64> [#uses=1] store i64 %min, i64* null, align 8 diff --git a/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll b/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll index d10291e190b..863b02528e1 100644 --- a/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll +++ b/test/CodeGen/PowerPC/2008-03-05-RegScavengerAssert.ll @@ -6,7 +6,7 @@ define void @foo(i8* %pp) nounwind { entry: %tmp2 = tail call i8* @bar( i32 14 ) nounwind ; <i8*> [#uses=0] %tmp28 = bitcast i8* %pp to void ()** ; <void ()**> [#uses=1] - %tmp38 = load void ()** %tmp28, align 4 ; <void ()*> [#uses=2] + %tmp38 = load void ()*, void ()** %tmp28, align 4 ; <void ()*> [#uses=2] br i1 false, label %bb34, label %bb25 bb25: ; preds = %entry %tmp30 = bitcast void ()* %tmp38 to void (i8*)* ; <void (i8*)*> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll b/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll index 7eb382a017e..dc9734f2f73 100644 --- a/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll +++ b/test/CodeGen/PowerPC/2008-03-17-RegScavengerCrash.ll @@ -7,7 +7,7 @@ declare fastcc void @emit_numeric_escape(i32, i32, %struct._cpp_strbuf*, i32) no define i32 @cpp_interpret_string(i32 %pfile, %struct.cpp_string* %from, i32 %wide) nounwind { entry: - %tmp61 = load i32* null, align 4 ; <i32> [#uses=1] + %tmp61 = load i32, i32* null, align 4 ; <i32> [#uses=1] %toBool = icmp eq i32 %wide, 0 ; <i1> [#uses=2] %iftmp.87.0 = select i1 %toBool, i32 %tmp61, i32 0 ; <i32> [#uses=2] %tmp69 = icmp ult i32 %iftmp.87.0, 33 ; <i1> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll b/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll index 7d056da1e0c..1191748b87d 100644 --- a/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll +++ b/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll @@ -6,7 +6,7 @@ entry: %tmp28 = and i64 %tmp2627, -16384 ; <i64> [#uses=2] %tmp2829 = inttoptr i64 %tmp28 to i8* ; <i8*> [#uses=1] %tmp37 = getelementptr i8, i8* %tmp2829, i64 42 ; <i8*> [#uses=1] - %tmp40 = load i8* %tmp37, align 1 ; <i8> [#uses=1] + %tmp40 = load i8, i8* %tmp37, align 1 ; <i8> [#uses=1] %tmp4041 = zext i8 %tmp40 to i64 ; <i64> [#uses=1] %tmp42 = shl i64 %tmp4041, 8 ; <i64> [#uses=1] %tmp47 = add i64 %tmp42, 0 ; <i64> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll index 8e5bf567b12..908a2a803b2 100644 --- a/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll +++ b/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll @@ -2,7 +2,7 @@ define i32 @t(i64 %byteStart, i32 %activeIndex) nounwind { entry: - %tmp50 = load i32* null, align 4 ; <i32> [#uses=1] + %tmp50 = load i32, i32* null, align 4 ; <i32> [#uses=1] %tmp5051 = zext i32 %tmp50 to i64 ; <i64> [#uses=3] %tmp53 = udiv i64 %byteStart, %tmp5051 ; <i64> [#uses=1] %tmp5354 = trunc i64 %tmp53 to i32 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll b/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll index 32c928e6600..16f4853cc21 100644 --- a/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll +++ b/test/CodeGen/PowerPC/2008-04-23-CoalescerCrash.ll @@ -24,7 +24,7 @@ bb: ; preds = %entry bb31: ; preds = %_Z24unlock_then_erase_sectory.exit, %bb %Pos.0.reg2mem.0 = phi i64 [ %tmp93, %_Z24unlock_then_erase_sectory.exit ], [ %Offset, %bb ] ; <i64> [#uses=3] - %tmp35 = load i16* @_ZL10DeviceCode, align 2 ; <i16> [#uses=1] + %tmp35 = load i16, i16* @_ZL10DeviceCode, align 2 ; <i16> [#uses=1] %tmp3536 = zext i16 %tmp35 to i32 ; <i32> [#uses=2] %tmp37 = and i32 %tmp3536, 65520 ; <i32> [#uses=1] %tmp38 = icmp eq i32 %tmp37, 35008 ; <i1> [#uses=1] @@ -43,7 +43,7 @@ bb68: ; preds = %bb31 %tmp2021.i = trunc i64 %Pos.0.reg2mem.0 to i32 ; <i32> [#uses=1] %tmp202122.i = inttoptr i32 %tmp2021.i to i8* ; <i8*> [#uses=1] tail call void @IODelay( i32 500 ) nounwind - %tmp53.i = load volatile i16* null, align 2 ; <i16> [#uses=2] + %tmp53.i = load volatile i16, i16* null, align 2 ; <i16> [#uses=2] %tmp5455.i = zext i16 %tmp53.i to i32 ; <i32> [#uses=1] br i1 false, label %bb.i, label %bb65.i diff --git a/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll b/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll index 862559b109c..8ce1708acdb 100644 --- a/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll +++ b/test/CodeGen/PowerPC/2008-06-21-F128LoadStore.ll @@ -4,7 +4,7 @@ @h = external global ppc_fp128 define void @f() { - %tmp = load ppc_fp128* @g + %tmp = load ppc_fp128, ppc_fp128* @g store ppc_fp128 %tmp, ppc_fp128* @h ret void } diff --git a/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll b/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll index 83c5511878c..db488ff36bf 100644 --- a/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll +++ b/test/CodeGen/PowerPC/2008-06-23-LiveVariablesCrash.ll @@ -6,7 +6,7 @@ entry: br i1 true, label %bb1, label %bb3 bb1: - %tmp1 = load i8* null, align 1 + %tmp1 = load i8, i8* null, align 1 %tmp2 = icmp eq i8 %tmp1, 0 br label %bb2 diff --git a/test/CodeGen/PowerPC/2008-07-15-Bswap.ll b/test/CodeGen/PowerPC/2008-07-15-Bswap.ll index 08efe4028e4..b271048fd04 100644 --- a/test/CodeGen/PowerPC/2008-07-15-Bswap.ll +++ b/test/CodeGen/PowerPC/2008-07-15-Bswap.ll @@ -137,7 +137,7 @@ bb144: ; preds = %bb395, %bb16 %numEdgesToTest.1770 = phi i32 [ 4, %bb16 ], [ %numEdgesToTest.2, %bb395 ] ; <i32> [#uses=1] icmp eq i32 %idxEachField11.0773, 0 ; <i1>:30 [#uses=0] getelementptr %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** null, i32 %mbIndexLeft.2772 ; <%struct.BiPartSrcDescriptor**>:31 [#uses=1] - load %struct.BiPartSrcDescriptor** %31, align 4 ; <%struct.BiPartSrcDescriptor*>:32 [#uses=0] + load %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** %31, align 4 ; <%struct.BiPartSrcDescriptor*>:32 [#uses=0] %fMacroblockHasNonZeroBS.4 = select i1 %21, i32 1, i32 0 ; <i32> [#uses=1] %numEdgesToTest.2 = select i1 %21, i32 1, i32 %numEdgesToTest.1770 ; <i32> [#uses=2] store i8 32, i8* %boundaryStrengthsV.1771, align 1 @@ -181,31 +181,31 @@ bb210.preheader: ; preds = %bb206 mul i32 %51, 0 ; <i32>:54 [#uses=1] add i32 %46, %54 ; <i32>:55 [#uses=1] getelementptr %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** null, i32 %53 ; <%struct.BiPartSrcDescriptor**>:56 [#uses=1] - load %struct.BiPartSrcDescriptor** %56, align 4 ; <%struct.BiPartSrcDescriptor*>:57 [#uses=7] + load %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** %56, align 4 ; <%struct.BiPartSrcDescriptor*>:57 [#uses=7] getelementptr %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** null, i32 %55 ; <%struct.BiPartSrcDescriptor**>:58 [#uses=1] - load %struct.BiPartSrcDescriptor** %58, align 4 ; <%struct.BiPartSrcDescriptor*>:59 [#uses=5] + load %struct.BiPartSrcDescriptor*, %struct.BiPartSrcDescriptor** %58, align 4 ; <%struct.BiPartSrcDescriptor*>:59 [#uses=5] icmp slt i32 %159, 0 ; <i1>:60 [#uses=0] icmp eq %struct.BiPartSrcDescriptor* %57, %59 ; <i1>:61 [#uses=0] bitcast %struct.BiPartSrcDescriptor* %57 to i16* ; <i16*>:62 [#uses=5] - load i16* %62, align 2 ; <i16>:63 [#uses=2] + load i16, i16* %62, align 2 ; <i16>:63 [#uses=2] getelementptr i16, i16* %62, i32 1 ; <i16*>:64 [#uses=1] - load i16* %64, align 2 ; <i16>:65 [#uses=2] + load i16, i16* %64, align 2 ; <i16>:65 [#uses=2] getelementptr i16, i16* %62, i32 2 ; <i16*>:66 [#uses=1] - load i16* %66, align 2 ; <i16>:67 [#uses=2] + load i16, i16* %66, align 2 ; <i16>:67 [#uses=2] getelementptr i16, i16* %62, i32 3 ; <i16*>:68 [#uses=1] - load i16* %68, align 2 ; <i16>:69 [#uses=2] + load i16, i16* %68, align 2 ; <i16>:69 [#uses=2] getelementptr i16, i16* %62, i32 6 ; <i16*>:70 [#uses=1] - load i16* %70, align 2 ; <i16>:71 [#uses=2] + load i16, i16* %70, align 2 ; <i16>:71 [#uses=2] bitcast %struct.BiPartSrcDescriptor* %59 to i16* ; <i16*>:72 [#uses=5] - load i16* %72, align 2 ; <i16>:73 [#uses=2] + load i16, i16* %72, align 2 ; <i16>:73 [#uses=2] getelementptr i16, i16* %72, i32 1 ; <i16*>:74 [#uses=1] - load i16* %74, align 2 ; <i16>:75 [#uses=2] + load i16, i16* %74, align 2 ; <i16>:75 [#uses=2] getelementptr i16, i16* %72, i32 2 ; <i16*>:76 [#uses=1] - load i16* %76, align 2 ; <i16>:77 [#uses=2] + load i16, i16* %76, align 2 ; <i16>:77 [#uses=2] getelementptr i16, i16* %72, i32 3 ; <i16*>:78 [#uses=1] - load i16* %78, align 2 ; <i16>:79 [#uses=2] + load i16, i16* %78, align 2 ; <i16>:79 [#uses=2] getelementptr i16, i16* %72, i32 6 ; <i16*>:80 [#uses=1] - load i16* %80, align 2 ; <i16>:81 [#uses=2] + load i16, i16* %80, align 2 ; <i16>:81 [#uses=2] sub i16 %63, %73 ; <i16>:82 [#uses=3] sub i16 %65, %75 ; <i16>:83 [#uses=3] sub i16 %67, %77 ; <i16>:84 [#uses=3] @@ -227,22 +227,22 @@ bb210.preheader: ; preds = %bb206 icmp slt i16 %86, 0 ; <i1>:96 [#uses=1] %.663 = select i1 %96, i16 %95, i16 %86 ; <i16> [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 1, i32 0 ; <i8*>:97 [#uses=1] - load i8* %97, align 1 ; <i8>:98 [#uses=1] + load i8, i8* %97, align 1 ; <i8>:98 [#uses=1] zext i8 %98 to i32 ; <i32>:99 [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 1, i32 1 ; <i8*>:100 [#uses=1] - load i8* %100, align 1 ; <i8>:101 [#uses=1] + load i8, i8* %100, align 1 ; <i8>:101 [#uses=1] zext i8 %101 to i32 ; <i32>:102 [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 3, i32 0 ; <i8*>:103 [#uses=1] - load i8* %103, align 1 ; <i8>:104 [#uses=2] + load i8, i8* %103, align 1 ; <i8>:104 [#uses=2] zext i8 %104 to i32 ; <i32>:105 [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %59, i32 0, i32 0, i32 0, i32 3, i32 0 ; <i8*>:106 [#uses=1] - load i8* %106, align 1 ; <i8>:107 [#uses=2] + load i8, i8* %106, align 1 ; <i8>:107 [#uses=2] zext i8 %107 to i32 ; <i32>:108 [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %57, i32 0, i32 0, i32 0, i32 3, i32 1 ; <i8*>:109 [#uses=1] - load i8* %109, align 1 ; <i8>:110 [#uses=1] + load i8, i8* %109, align 1 ; <i8>:110 [#uses=1] zext i8 %110 to i32 ; <i32>:111 [#uses=1] getelementptr %struct.BiPartSrcDescriptor, %struct.BiPartSrcDescriptor* %59, i32 0, i32 0, i32 0, i32 3, i32 1 ; <i8*>:112 [#uses=1] - load i8* %112, align 1 ; <i8>:113 [#uses=1] + load i8, i8* %112, align 1 ; <i8>:113 [#uses=1] zext i8 %113 to i32 ; <i32>:114 [#uses=1] lshr i32 %99, 4 ; <i32>:115 [#uses=1] and i32 %115, 2 ; <i32>:116 [#uses=1] @@ -322,7 +322,7 @@ labelContinueEdgesLoopV: ; preds = %bb206, %bb205, %bb144 %bfNZ12.2 = phi i32 [ %159, %bb205 ], [ 0, %bb144 ], [ %159, %bb206 ] ; <i32> [#uses=1] %boundaryStrengthsV.3 = phi i8* [ %158, %bb205 ], [ %boundaryStrengthsV.1771, %bb144 ], [ %158, %bb206 ] ; <i8*> [#uses=3] or i32 %fMacroblockHasNonZeroBS.6, %fEdgeHasNonZeroBS.0 ; <i32>:152 [#uses=2] - load i8* %boundaryStrengthsV.3, align 1 ; <i8>:153 [#uses=1] + load i8, i8* %boundaryStrengthsV.3, align 1 ; <i8>:153 [#uses=1] trunc i32 %fEdgeHasNonZeroBS.0 to i8 ; <i8>:154 [#uses=1] shl i8 %154, 5 ; <i8>:155 [#uses=1] xor i8 %155, 32 ; <i8>:156 [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll index 21b0c619e11..53639e7ceb0 100644 --- a/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll +++ b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll @@ -4,7 +4,7 @@ target triple = "powerpc-apple-darwin9" define signext i16 @t(i16* %dct) nounwind { entry: - load i16* null, align 2 ; <i16>:0 [#uses=2] + load i16, i16* null, align 2 ; <i16>:0 [#uses=2] lshr i16 %0, 11 ; <i16>:1 [#uses=0] trunc i16 %0 to i8 ; <i8>:2 [#uses=1] sext i8 %2 to i16 ; <i16>:3 [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll index c70bc6381f6..d98080bd3f8 100644 --- a/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll +++ b/test/CodeGen/PowerPC/2008-09-12-CoalescerBug.ll @@ -10,7 +10,7 @@ define void @lb(%struct.CGLSI* %src, i32 %n, %struct.CGLDI* %dst) nounwind { entry: - %0 = load i32* null, align 4 ; <i32> [#uses=1] + %0 = load i32, i32* null, align 4 ; <i32> [#uses=1] %1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1] br i1 %1, label %bb.nph4945, label %return @@ -26,9 +26,9 @@ bb2217: ; preds = %bb2326 %7 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1] %8 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1] %9 = getelementptr float, float* null, i32 2 ; <float*> [#uses=1] - %10 = load float* %9, align 4 ; <float> [#uses=1] + %10 = load float, float* %9, align 4 ; <float> [#uses=1] %11 = getelementptr float, float* null, i32 3 ; <float*> [#uses=1] - %12 = load float* %11, align 4 ; <float> [#uses=1] + %12 = load float, float* %11, align 4 ; <float> [#uses=1] %13 = fmul float %10, 6.553500e+04 ; <float> [#uses=1] %14 = fadd float %13, 5.000000e-01 ; <float> [#uses=1] %15 = fmul float %12, 6.553500e+04 ; <float> [#uses=1] @@ -65,9 +65,9 @@ bb2265: ; preds = %bb2264, %bb2262, %bb2217 store i64 %31, i64* %3, align 8 %35 = getelementptr i8, i8* null, i32 0 ; <i8*> [#uses=1] %36 = bitcast i8* %35 to float* ; <float*> [#uses=4] - %37 = load float* %36, align 4 ; <float> [#uses=1] + %37 = load float, float* %36, align 4 ; <float> [#uses=1] %38 = getelementptr float, float* %36, i32 1 ; <float*> [#uses=1] - %39 = load float* %38, align 4 ; <float> [#uses=1] + %39 = load float, float* %38, align 4 ; <float> [#uses=1] %40 = fmul float %37, 6.553500e+04 ; <float> [#uses=1] %41 = fadd float %40, 5.000000e-01 ; <float> [#uses=1] %42 = fmul float %39, 6.553500e+04 ; <float> [#uses=1] @@ -85,9 +85,9 @@ bb2277: ; preds = %bb2274, %bb2265 %47 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1] %48 = fptosi float %f1582.0 to i32 ; <i32> [#uses=1] %49 = getelementptr float, float* %36, i32 2 ; <float*> [#uses=1] - %50 = load float* %49, align 4 ; <float> [#uses=1] + %50 = load float, float* %49, align 4 ; <float> [#uses=1] %51 = getelementptr float, float* %36, i32 3 ; <float*> [#uses=1] - %52 = load float* %51, align 4 ; <float> [#uses=1] + %52 = load float, float* %51, align 4 ; <float> [#uses=1] %53 = fmul float %50, 6.553500e+04 ; <float> [#uses=1] %54 = fadd float %53, 5.000000e-01 ; <float> [#uses=1] %55 = fmul float %52, 6.553500e+04 ; <float> [#uses=1] @@ -108,9 +108,9 @@ bb2277: ; preds = %bb2274, %bb2265 %70 = or i64 %69, %67 ; <i64> [#uses=2] %71 = getelementptr i8, i8* null, i32 0 ; <i8*> [#uses=1] %72 = bitcast i8* %71 to float* ; <float*> [#uses=4] - %73 = load float* %72, align 4 ; <float> [#uses=1] + %73 = load float, float* %72, align 4 ; <float> [#uses=1] %74 = getelementptr float, float* %72, i32 1 ; <float*> [#uses=1] - %75 = load float* %74, align 4 ; <float> [#uses=1] + %75 = load float, float* %74, align 4 ; <float> [#uses=1] %76 = fmul float %73, 6.553500e+04 ; <float> [#uses=1] %77 = fadd float %76, 5.000000e-01 ; <float> [#uses=3] %78 = fmul float %75, 6.553500e+04 ; <float> [#uses=1] @@ -131,9 +131,9 @@ bb2295: ; preds = %bb2294, %bb2292, %bb2277 %83 = fptosi float %f0569.0 to i32 ; <i32> [#uses=1] %84 = fptosi float 0.000000e+00 to i32 ; <i32> [#uses=1] %85 = getelementptr float, float* %72, i32 2 ; <float*> [#uses=1] - %86 = load float* %85, align 4 ; <float> [#uses=1] + %86 = load float, float* %85, align 4 ; <float> [#uses=1] %87 = getelementptr float, float* %72, i32 3 ; <float*> [#uses=1] - %88 = load float* %87, align 4 ; <float> [#uses=1] + %88 = load float, float* %87, align 4 ; <float> [#uses=1] %89 = fmul float %86, 6.553500e+04 ; <float> [#uses=1] %90 = fadd float %89, 5.000000e-01 ; <float> [#uses=1] %91 = fmul float %88, 6.553500e+04 ; <float> [#uses=1] @@ -168,46 +168,46 @@ bb2315: ; preds = %bb2295 br i1 %114, label %bb2318, label %bb2317 bb2317: ; preds = %bb2315 - %115 = load i64* %2, align 16 ; <i64> [#uses=1] + %115 = load i64, i64* %2, align 16 ; <i64> [#uses=1] %116 = call i32 (...)* @_u16a_cm( i64 %115, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1] %117 = sext i32 %116 to i64 ; <i64> [#uses=1] store i64 %117, i64* %2, align 16 - %118 = load i64* %3, align 8 ; <i64> [#uses=1] + %118 = load i64, i64* %3, align 8 ; <i64> [#uses=1] %119 = call i32 (...)* @_u16a_cm( i64 %118, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1] %120 = sext i32 %119 to i64 ; <i64> [#uses=1] store i64 %120, i64* %3, align 8 - %121 = load i64* %4, align 16 ; <i64> [#uses=1] + %121 = load i64, i64* %4, align 16 ; <i64> [#uses=1] %122 = call i32 (...)* @_u16a_cm( i64 %121, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=1] %123 = sext i32 %122 to i64 ; <i64> [#uses=1] store i64 %123, i64* %4, align 16 - %124 = load i64* %5, align 8 ; <i64> [#uses=1] + %124 = load i64, i64* %5, align 8 ; <i64> [#uses=1] %125 = call i32 (...)* @_u16a_cm( i64 %124, %struct.xx_t* %159, double 0.000000e+00, double 1.047551e+06 ) nounwind ; <i32> [#uses=0] unreachable bb2318: ; preds = %bb2315 %126 = getelementptr %struct.CGLSI, %struct.CGLSI* %src, i32 %indvar5021, i32 8 ; <%struct.vv_t*> [#uses=1] %127 = bitcast %struct.vv_t* %126 to i64* ; <i64*> [#uses=1] - %128 = load i64* %127, align 8 ; <i64> [#uses=1] + %128 = load i64, i64* %127, align 8 ; <i64> [#uses=1] %129 = trunc i64 %128 to i32 ; <i32> [#uses=4] - %130 = load i64* %2, align 16 ; <i64> [#uses=1] + %130 = load i64, i64* %2, align 16 ; <i64> [#uses=1] %131 = call i32 (...)* @_u16_ff( i64 %130, i32 %129 ) nounwind ; <i32> [#uses=1] %132 = sext i32 %131 to i64 ; <i64> [#uses=1] store i64 %132, i64* %2, align 16 - %133 = load i64* %3, align 8 ; <i64> [#uses=1] + %133 = load i64, i64* %3, align 8 ; <i64> [#uses=1] %134 = call i32 (...)* @_u16_ff( i64 %133, i32 %129 ) nounwind ; <i32> [#uses=1] %135 = sext i32 %134 to i64 ; <i64> [#uses=1] store i64 %135, i64* %3, align 8 - %136 = load i64* %4, align 16 ; <i64> [#uses=1] + %136 = load i64, i64* %4, align 16 ; <i64> [#uses=1] %137 = call i32 (...)* @_u16_ff( i64 %136, i32 %129 ) nounwind ; <i32> [#uses=1] %138 = sext i32 %137 to i64 ; <i64> [#uses=1] store i64 %138, i64* %4, align 16 - %139 = load i64* %5, align 8 ; <i64> [#uses=1] + %139 = load i64, i64* %5, align 8 ; <i64> [#uses=1] %140 = call i32 (...)* @_u16_ff( i64 %139, i32 %129 ) nounwind ; <i32> [#uses=0] unreachable bb2319: ; preds = %bb2326 %141 = getelementptr %struct.CGLSI, %struct.CGLSI* %src, i32 %indvar5021, i32 2 ; <i8**> [#uses=1] - %142 = load i8** %141, align 4 ; <i8*> [#uses=4] + %142 = load i8*, i8** %141, align 4 ; <i8*> [#uses=4] %143 = getelementptr i8, i8* %142, i32 0 ; <i8*> [#uses=1] %144 = call i32 (...)* @_u16_sf32( double 0.000000e+00, double 6.553500e+04, double 5.000000e-01, i8* %143 ) nounwind ; <i32> [#uses=1] %145 = sext i32 %144 to i64 ; <i64> [#uses=2] @@ -234,9 +234,9 @@ bb2326: ; preds = %bb2325, %bb.nph4945 %indvar5021 = phi i32 [ 0, %bb.nph4945 ], [ %indvar.next5145, %bb2325 ] ; <i32> [#uses=6] %157 = icmp slt i32 %indvar5021, %n ; <i1> [#uses=0] %158 = getelementptr %struct.CGLSI, %struct.CGLSI* %src, i32 %indvar5021, i32 10 ; <%struct.xx_t**> [#uses=1] - %159 = load %struct.xx_t** %158, align 4 ; <%struct.xx_t*> [#uses=5] + %159 = load %struct.xx_t*, %struct.xx_t** %158, align 4 ; <%struct.xx_t*> [#uses=5] %160 = getelementptr %struct.CGLSI, %struct.CGLSI* %src, i32 %indvar5021, i32 1 ; <i32*> [#uses=1] - %161 = load i32* %160, align 4 ; <i32> [#uses=1] + %161 = load i32, i32* %160, align 4 ; <i32> [#uses=1] %162 = and i32 %161, 255 ; <i32> [#uses=1] switch i32 %162, label %bb2325 [ i32 59, label %bb2217 diff --git a/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll index f474a6d7cc2..2372b2f0b9d 100644 --- a/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll +++ b/test/CodeGen/PowerPC/2008-10-28-UnprocessedNode.ll @@ -2,7 +2,7 @@ define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind { entry: - %imag59 = load ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1] + %imag59 = load ppc_fp128, ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1] %0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59 ; <ppc_fp128> [#uses=1] %1 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1] %2 = fadd ppc_fp128 %0, %1 ; <ppc_fp128> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll b/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll index 8322a843081..fbe1287776f 100644 --- a/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll +++ b/test/CodeGen/PowerPC/2008-10-31-PPCF128Libcalls.ll @@ -9,17 +9,17 @@ target triple = "powerpc-apple-darwin10.0" define void @foo() nounwind { entry: - %0 = load ppc_fp128* @a, align 16 ; <ppc_fp128> [#uses=1] + %0 = load ppc_fp128, ppc_fp128* @a, align 16 ; <ppc_fp128> [#uses=1] %1 = call ppc_fp128 @llvm.sqrt.ppcf128(ppc_fp128 %0) ; <ppc_fp128> [#uses=1] store ppc_fp128 %1, ppc_fp128* @a, align 16 - %2 = load ppc_fp128* @b, align 16 ; <ppc_fp128> [#uses=1] + %2 = load ppc_fp128, ppc_fp128* @b, align 16 ; <ppc_fp128> [#uses=1] %3 = call ppc_fp128 @"\01_sinl$LDBL128"(ppc_fp128 %2) nounwind readonly ; <ppc_fp128> [#uses=1] store ppc_fp128 %3, ppc_fp128* @b, align 16 - %4 = load ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1] + %4 = load ppc_fp128, ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1] %5 = call ppc_fp128 @"\01_cosl$LDBL128"(ppc_fp128 %4) nounwind readonly ; <ppc_fp128> [#uses=1] store ppc_fp128 %5, ppc_fp128* @c, align 16 - %6 = load ppc_fp128* @d, align 16 ; <ppc_fp128> [#uses=1] - %7 = load ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1] + %6 = load ppc_fp128, ppc_fp128* @d, align 16 ; <ppc_fp128> [#uses=1] + %7 = load ppc_fp128, ppc_fp128* @c, align 16 ; <ppc_fp128> [#uses=1] %8 = call ppc_fp128 @llvm.pow.ppcf128(ppc_fp128 %6, ppc_fp128 %7) ; <ppc_fp128> [#uses=1] store ppc_fp128 %8, ppc_fp128* @d, align 16 br label %return diff --git a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll index e172de2aae6..289e09b2dae 100644 --- a/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll +++ b/test/CodeGen/PowerPC/2009-08-17-inline-asm-addr-mode-breakage.ll @@ -15,7 +15,7 @@ entry: %y_addr = alloca i32 ; <i32*> [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %y, i32* %y_addr - %0 = load i32* %y_addr, align 4 ; <i32> [#uses=1] + %0 = load i32, i32* %y_addr, align 4 ; <i32> [#uses=1] %1 = getelementptr inbounds [0 x i32], [0 x i32]* @x, i32 0, i32 %0 ; <i32*> [#uses=1] call void asm sideeffect "isync\0A\09eieio\0A\09stw $1, $0", "=*o,r,~{memory}"(i32* %1, i32 0) nounwind br label %return diff --git a/test/CodeGen/PowerPC/2010-03-09-indirect-call.ll b/test/CodeGen/PowerPC/2010-03-09-indirect-call.ll index b95ac688075..d4972a9caab 100644 --- a/test/CodeGen/PowerPC/2010-03-09-indirect-call.ll +++ b/test/CodeGen/PowerPC/2010-03-09-indirect-call.ll @@ -11,7 +11,7 @@ define void @foo() nounwind ssp { entry: ; CHECK: mtctr r12 ; CHECK: bctrl - %0 = load void (...)** @p, align 4 ; <void (...)*> [#uses=1] + %0 = load void (...)*, void (...)** @p, align 4 ; <void (...)*> [#uses=1] call void (...)* %0() nounwind br label %return diff --git a/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll index a25ce07e83b..1f320a84a4e 100644 --- a/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll +++ b/test/CodeGen/PowerPC/2010-12-18-PPCStackRefs.ll @@ -12,11 +12,11 @@ entry: %0 = alloca i32 %"alloca point" = bitcast i32 0 to i32 store i32 0, i32* %0, align 4 - %1 = load i32* %0, align 4 + %1 = load i32, i32* %0, align 4 store i32 %1, i32* %retval, align 4 br label %return return: ; preds = %entry - %retval1 = load i32* %retval + %retval1 = load i32, i32* %retval ret i32 %retval1 } diff --git a/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll b/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll index 0a8f7747f29..70d2ff11e44 100644 --- a/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll +++ b/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll @@ -47,9 +47,9 @@ for.body4.us: ; preds = %for.body4.lr.ph.us, %sext = shl i64 %sub5.us, 32 %idxprom.us = ashr exact i64 %sext, 32 %arrayidx.us = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us - %2 = load float* %arrayidx.us, align 4 + %2 = load float, float* %arrayidx.us, align 4 %arrayidx7.us = getelementptr inbounds [32000 x float], [32000 x float]* @a, i64 0, i64 %indvars.iv - %3 = load float* %arrayidx7.us, align 4 + %3 = load float, float* %arrayidx7.us, align 4 %add8.us = fadd float %3, %2 store float %add8.us, float* %arrayidx7.us, align 4 %indvars.iv.next = add i64 %indvars.iv, %1 @@ -82,9 +82,9 @@ for.body4.us.1: ; preds = %for.body4.us.1, %fo %sext23 = shl i64 %sub5.us.1, 32 %idxprom.us.1 = ashr exact i64 %sext23, 32 %arrayidx.us.1 = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us.1 - %5 = load float* %arrayidx.us.1, align 4 + %5 = load float, float* %arrayidx.us.1, align 4 %arrayidx7.us.1 = getelementptr inbounds [32000 x float], [32000 x float]* @a, i64 0, i64 %indvars.iv.1 - %6 = load float* %arrayidx7.us.1, align 4 + %6 = load float, float* %arrayidx7.us.1, align 4 %add8.us.1 = fadd float %6, %5 store float %add8.us.1, float* %arrayidx7.us.1, align 4 %indvars.iv.next.1 = add i64 %indvars.iv.1, %1 @@ -104,9 +104,9 @@ for.body4.us.2: ; preds = %for.body4.us.2, %fo %sext24 = shl i64 %sub5.us.2, 32 %idxprom.us.2 = ashr exact i64 %sext24, 32 %arrayidx.us.2 = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us.2 - %8 = load float* %arrayidx.us.2, align 4 + %8 = load float, float* %arrayidx.us.2, align 4 %arrayidx7.us.2 = getelementptr inbounds [32000 x float], [32000 x float]* @a, i64 0, i64 %indvars.iv.2 - %9 = load float* %arrayidx7.us.2, align 4 + %9 = load float, float* %arrayidx7.us.2, align 4 %add8.us.2 = fadd float %9, %8 store float %add8.us.2, float* %arrayidx7.us.2, align 4 %indvars.iv.next.2 = add i64 %indvars.iv.2, %1 @@ -126,9 +126,9 @@ for.body4.us.3: ; preds = %for.body4.us.3, %fo %sext25 = shl i64 %sub5.us.3, 32 %idxprom.us.3 = ashr exact i64 %sext25, 32 %arrayidx.us.3 = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us.3 - %11 = load float* %arrayidx.us.3, align 4 + %11 = load float, float* %arrayidx.us.3, align 4 %arrayidx7.us.3 = getelementptr inbounds [32000 x float], [32000 x float]* @a, i64 0, i64 %indvars.iv.3 - %12 = load float* %arrayidx7.us.3, align 4 + %12 = load float, float* %arrayidx7.us.3, align 4 %add8.us.3 = fadd float %12, %11 store float %add8.us.3, float* %arrayidx7.us.3, align 4 %indvars.iv.next.3 = add i64 %indvars.iv.3, %1 @@ -148,9 +148,9 @@ for.body4.us.4: ; preds = %for.body4.us.4, %fo %sext26 = shl i64 %sub5.us.4, 32 %idxprom.us.4 = ashr exact i64 %sext26, 32 %arrayidx.us.4 = getelementptr inbounds [32000 x float], [32000 x float]* @b, i64 0, i64 %idxprom.us.4 - %14 = load float* %arrayidx.us.4, align 4 + %14 = load float, float* %arrayidx.us.4, align 4 %arrayidx7.us.4 = getelementptr inbounds [32000 x float], [32000 x float]* @a, i64 0, i64 %indvars.iv.4 - %15 = load float* %arrayidx7.us.4, align 4 + %15 = load float, float* %arrayidx7.us.4, align 4 %add8.us.4 = fadd float %15, %14 store float %add8.us.4, float* %arrayidx7.us.4, align 4 %indvars.iv.next.4 = add i64 %indvars.iv.4, %1 diff --git a/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll b/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll index 7ec821bbb70..ec31036a554 100644 --- a/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll +++ b/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll @@ -35,7 +35,7 @@ entry: for.body: ; preds = %for.end17, %entry %nl.041 = phi i32 [ 0, %entry ], [ %inc22, %for.end17 ] - %0 = load float* getelementptr inbounds ([256 x [256 x float]]* @aa, i64 0, i64 0, i64 0), align 16 + %0 = load float, float* getelementptr inbounds ([256 x [256 x float]]* @aa, i64 0, i64 0, i64 0), align 16 br label %for.cond5.preheader for.cond5.preheader: ; preds = %for.inc15, %for.body @@ -51,7 +51,7 @@ for.body7: ; preds = %for.body7, %for.con %xindex.234 = phi i32 [ %xindex.138, %for.cond5.preheader ], [ %xindex.3.15, %for.body7 ] %yindex.233 = phi i32 [ %yindex.137, %for.cond5.preheader ], [ %yindex.3.15, %for.body7 ] %arrayidx9 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv - %1 = load float* %arrayidx9, align 16 + %1 = load float, float* %arrayidx9, align 16 %cmp10 = fcmp ogt float %1, %max.235 %2 = trunc i64 %indvars.iv to i32 %yindex.3 = select i1 %cmp10, i32 %2, i32 %yindex.233 @@ -60,7 +60,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3 = select i1 %cmp10, float %1, float %max.235 %indvars.iv.next45 = or i64 %indvars.iv, 1 %arrayidx9.1 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next45 - %4 = load float* %arrayidx9.1, align 4 + %4 = load float, float* %arrayidx9.1, align 4 %cmp10.1 = fcmp ogt float %4, %max.3 %5 = trunc i64 %indvars.iv.next45 to i32 %yindex.3.1 = select i1 %cmp10.1, i32 %5, i32 %yindex.3 @@ -68,7 +68,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.1 = select i1 %cmp10.1, float %4, float %max.3 %indvars.iv.next.146 = or i64 %indvars.iv, 2 %arrayidx9.2 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.146 - %6 = load float* %arrayidx9.2, align 8 + %6 = load float, float* %arrayidx9.2, align 8 %cmp10.2 = fcmp ogt float %6, %max.3.1 %7 = trunc i64 %indvars.iv.next.146 to i32 %yindex.3.2 = select i1 %cmp10.2, i32 %7, i32 %yindex.3.1 @@ -76,7 +76,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.2 = select i1 %cmp10.2, float %6, float %max.3.1 %indvars.iv.next.247 = or i64 %indvars.iv, 3 %arrayidx9.3 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.247 - %8 = load float* %arrayidx9.3, align 4 + %8 = load float, float* %arrayidx9.3, align 4 %cmp10.3 = fcmp ogt float %8, %max.3.2 %9 = trunc i64 %indvars.iv.next.247 to i32 %yindex.3.3 = select i1 %cmp10.3, i32 %9, i32 %yindex.3.2 @@ -84,7 +84,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.3 = select i1 %cmp10.3, float %8, float %max.3.2 %indvars.iv.next.348 = or i64 %indvars.iv, 4 %arrayidx9.4 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.348 - %10 = load float* %arrayidx9.4, align 16 + %10 = load float, float* %arrayidx9.4, align 16 %cmp10.4 = fcmp ogt float %10, %max.3.3 %11 = trunc i64 %indvars.iv.next.348 to i32 %yindex.3.4 = select i1 %cmp10.4, i32 %11, i32 %yindex.3.3 @@ -92,7 +92,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.4 = select i1 %cmp10.4, float %10, float %max.3.3 %indvars.iv.next.449 = or i64 %indvars.iv, 5 %arrayidx9.5 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.449 - %12 = load float* %arrayidx9.5, align 4 + %12 = load float, float* %arrayidx9.5, align 4 %cmp10.5 = fcmp ogt float %12, %max.3.4 %13 = trunc i64 %indvars.iv.next.449 to i32 %yindex.3.5 = select i1 %cmp10.5, i32 %13, i32 %yindex.3.4 @@ -100,7 +100,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.5 = select i1 %cmp10.5, float %12, float %max.3.4 %indvars.iv.next.550 = or i64 %indvars.iv, 6 %arrayidx9.6 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.550 - %14 = load float* %arrayidx9.6, align 8 + %14 = load float, float* %arrayidx9.6, align 8 %cmp10.6 = fcmp ogt float %14, %max.3.5 %15 = trunc i64 %indvars.iv.next.550 to i32 %yindex.3.6 = select i1 %cmp10.6, i32 %15, i32 %yindex.3.5 @@ -108,7 +108,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.6 = select i1 %cmp10.6, float %14, float %max.3.5 %indvars.iv.next.651 = or i64 %indvars.iv, 7 %arrayidx9.7 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.651 - %16 = load float* %arrayidx9.7, align 4 + %16 = load float, float* %arrayidx9.7, align 4 %cmp10.7 = fcmp ogt float %16, %max.3.6 %17 = trunc i64 %indvars.iv.next.651 to i32 %yindex.3.7 = select i1 %cmp10.7, i32 %17, i32 %yindex.3.6 @@ -116,7 +116,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.7 = select i1 %cmp10.7, float %16, float %max.3.6 %indvars.iv.next.752 = or i64 %indvars.iv, 8 %arrayidx9.8 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.752 - %18 = load float* %arrayidx9.8, align 16 + %18 = load float, float* %arrayidx9.8, align 16 %cmp10.8 = fcmp ogt float %18, %max.3.7 %19 = trunc i64 %indvars.iv.next.752 to i32 %yindex.3.8 = select i1 %cmp10.8, i32 %19, i32 %yindex.3.7 @@ -124,7 +124,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.8 = select i1 %cmp10.8, float %18, float %max.3.7 %indvars.iv.next.853 = or i64 %indvars.iv, 9 %arrayidx9.9 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.853 - %20 = load float* %arrayidx9.9, align 4 + %20 = load float, float* %arrayidx9.9, align 4 %cmp10.9 = fcmp ogt float %20, %max.3.8 %21 = trunc i64 %indvars.iv.next.853 to i32 %yindex.3.9 = select i1 %cmp10.9, i32 %21, i32 %yindex.3.8 @@ -132,7 +132,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.9 = select i1 %cmp10.9, float %20, float %max.3.8 %indvars.iv.next.954 = or i64 %indvars.iv, 10 %arrayidx9.10 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.954 - %22 = load float* %arrayidx9.10, align 8 + %22 = load float, float* %arrayidx9.10, align 8 %cmp10.10 = fcmp ogt float %22, %max.3.9 %23 = trunc i64 %indvars.iv.next.954 to i32 %yindex.3.10 = select i1 %cmp10.10, i32 %23, i32 %yindex.3.9 @@ -140,7 +140,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.10 = select i1 %cmp10.10, float %22, float %max.3.9 %indvars.iv.next.1055 = or i64 %indvars.iv, 11 %arrayidx9.11 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1055 - %24 = load float* %arrayidx9.11, align 4 + %24 = load float, float* %arrayidx9.11, align 4 %cmp10.11 = fcmp ogt float %24, %max.3.10 %25 = trunc i64 %indvars.iv.next.1055 to i32 %yindex.3.11 = select i1 %cmp10.11, i32 %25, i32 %yindex.3.10 @@ -148,7 +148,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.11 = select i1 %cmp10.11, float %24, float %max.3.10 %indvars.iv.next.1156 = or i64 %indvars.iv, 12 %arrayidx9.12 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1156 - %26 = load float* %arrayidx9.12, align 16 + %26 = load float, float* %arrayidx9.12, align 16 %cmp10.12 = fcmp ogt float %26, %max.3.11 %27 = trunc i64 %indvars.iv.next.1156 to i32 %yindex.3.12 = select i1 %cmp10.12, i32 %27, i32 %yindex.3.11 @@ -156,7 +156,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.12 = select i1 %cmp10.12, float %26, float %max.3.11 %indvars.iv.next.1257 = or i64 %indvars.iv, 13 %arrayidx9.13 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1257 - %28 = load float* %arrayidx9.13, align 4 + %28 = load float, float* %arrayidx9.13, align 4 %cmp10.13 = fcmp ogt float %28, %max.3.12 %29 = trunc i64 %indvars.iv.next.1257 to i32 %yindex.3.13 = select i1 %cmp10.13, i32 %29, i32 %yindex.3.12 @@ -164,7 +164,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.13 = select i1 %cmp10.13, float %28, float %max.3.12 %indvars.iv.next.1358 = or i64 %indvars.iv, 14 %arrayidx9.14 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1358 - %30 = load float* %arrayidx9.14, align 8 + %30 = load float, float* %arrayidx9.14, align 8 %cmp10.14 = fcmp ogt float %30, %max.3.13 %31 = trunc i64 %indvars.iv.next.1358 to i32 %yindex.3.14 = select i1 %cmp10.14, i32 %31, i32 %yindex.3.13 @@ -172,7 +172,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.14 = select i1 %cmp10.14, float %30, float %max.3.13 %indvars.iv.next.1459 = or i64 %indvars.iv, 15 %arrayidx9.15 = getelementptr inbounds [256 x [256 x float]], [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1459 - %32 = load float* %arrayidx9.15, align 4 + %32 = load float, float* %arrayidx9.15, align 4 %cmp10.15 = fcmp ogt float %32, %max.3.14 %33 = trunc i64 %indvars.iv.next.1459 to i32 %yindex.3.15 = select i1 %cmp10.15, i32 %33, i32 %yindex.3.14 diff --git a/test/CodeGen/PowerPC/2011-12-08-DemandedBitsMiscompile.ll b/test/CodeGen/PowerPC/2011-12-08-DemandedBitsMiscompile.ll index b1cbb36fe04..05390cf8b92 100644 --- a/test/CodeGen/PowerPC/2011-12-08-DemandedBitsMiscompile.ll +++ b/test/CodeGen/PowerPC/2011-12-08-DemandedBitsMiscompile.ll @@ -2,7 +2,7 @@ define void @test(i32* nocapture %x, i64* %xx, i32* %yp) nounwind uwtable ssp { entry: - %yy = load i32* %yp + %yy = load i32, i32* %yp %y = add i32 %yy, 1 %z = zext i32 %y to i64 %z2 = shl i64 %z, 32 diff --git a/test/CodeGen/PowerPC/Atomics-64.ll b/test/CodeGen/PowerPC/Atomics-64.ll index 122b54e080a..77066de25e7 100644 --- a/test/CodeGen/PowerPC/Atomics-64.ll +++ b/test/CodeGen/PowerPC/Atomics-64.ll @@ -254,272 +254,272 @@ return: ; preds = %entry define void @test_op_and_fetch() nounwind { entry: - %0 = load i8* @uc, align 1 + %0 = load i8, i8* @uc, align 1 %1 = atomicrmw add i8* @sc, i8 %0 monotonic %2 = add i8 %1, %0 store i8 %2, i8* @sc, align 1 - %3 = load i8* @uc, align 1 + %3 = load i8, i8* @uc, align 1 %4 = atomicrmw add i8* @uc, i8 %3 monotonic %5 = add i8 %4, %3 store i8 %5, i8* @uc, align 1 - %6 = load i8* @uc, align 1 + %6 = load i8, i8* @uc, align 1 %7 = zext i8 %6 to i16 %8 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %9 = atomicrmw add i16* %8, i16 %7 monotonic %10 = add i16 %9, %7 store i16 %10, i16* @ss, align 2 - %11 = load i8* @uc, align 1 + %11 = load i8, i8* @uc, align 1 %12 = zext i8 %11 to i16 %13 = bitcast i8* bitcast (i16* @us to i8*) to i16* %14 = atomicrmw add i16* %13, i16 %12 monotonic %15 = add i16 %14, %12 store i16 %15, i16* @us, align 2 - %16 = load i8* @uc, align 1 + %16 = load i8, i8* @uc, align 1 %17 = zext i8 %16 to i32 %18 = bitcast i8* bitcast (i32* @si to i8*) to i32* %19 = atomicrmw add i32* %18, i32 %17 monotonic %20 = add i32 %19, %17 store i32 %20, i32* @si, align 4 - %21 = load i8* @uc, align 1 + %21 = load i8, i8* @uc, align 1 %22 = zext i8 %21 to i32 %23 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %24 = atomicrmw add i32* %23, i32 %22 monotonic %25 = add i32 %24, %22 store i32 %25, i32* @ui, align 4 - %26 = load i8* @uc, align 1 + %26 = load i8, i8* @uc, align 1 %27 = zext i8 %26 to i64 %28 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %29 = atomicrmw add i64* %28, i64 %27 monotonic %30 = add i64 %29, %27 store i64 %30, i64* @sl, align 8 - %31 = load i8* @uc, align 1 + %31 = load i8, i8* @uc, align 1 %32 = zext i8 %31 to i64 %33 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %34 = atomicrmw add i64* %33, i64 %32 monotonic %35 = add i64 %34, %32 store i64 %35, i64* @ul, align 8 - %36 = load i8* @uc, align 1 + %36 = load i8, i8* @uc, align 1 %37 = atomicrmw sub i8* @sc, i8 %36 monotonic %38 = sub i8 %37, %36 store i8 %38, i8* @sc, align 1 - %39 = load i8* @uc, align 1 + %39 = load i8, i8* @uc, align 1 %40 = atomicrmw sub i8* @uc, i8 %39 monotonic %41 = sub i8 %40, %39 store i8 %41, i8* @uc, align 1 - %42 = load i8* @uc, align 1 + %42 = load i8, i8* @uc, align 1 %43 = zext i8 %42 to i16 %44 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %45 = atomicrmw sub i16* %44, i16 %43 monotonic %46 = sub i16 %45, %43 store i16 %46, i16* @ss, align 2 - %47 = load i8* @uc, align 1 + %47 = load i8, i8* @uc, align 1 %48 = zext i8 %47 to i16 %49 = bitcast i8* bitcast (i16* @us to i8*) to i16* %50 = atomicrmw sub i16* %49, i16 %48 monotonic %51 = sub i16 %50, %48 store i16 %51, i16* @us, align 2 - %52 = load i8* @uc, align 1 + %52 = load i8, i8* @uc, align 1 %53 = zext i8 %52 to i32 %54 = bitcast i8* bitcast (i32* @si to i8*) to i32* %55 = atomicrmw sub i32* %54, i32 %53 monotonic %56 = sub i32 %55, %53 store i32 %56, i32* @si, align 4 - %57 = load i8* @uc, align 1 + %57 = load i8, i8* @uc, align 1 %58 = zext i8 %57 to i32 %59 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %60 = atomicrmw sub i32* %59, i32 %58 monotonic %61 = sub i32 %60, %58 store i32 %61, i32* @ui, align 4 - %62 = load i8* @uc, align 1 + %62 = load i8, i8* @uc, align 1 %63 = zext i8 %62 to i64 %64 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %65 = atomicrmw sub i64* %64, i64 %63 monotonic %66 = sub i64 %65, %63 store i64 %66, i64* @sl, align 8 - %67 = load i8* @uc, align 1 + %67 = load i8, i8* @uc, align 1 %68 = zext i8 %67 to i64 %69 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %70 = atomicrmw sub i64* %69, i64 %68 monotonic %71 = sub i64 %70, %68 store i64 %71, i64* @ul, align 8 - %72 = load i8* @uc, align 1 + %72 = load i8, i8* @uc, align 1 %73 = atomicrmw or i8* @sc, i8 %72 monotonic %74 = or i8 %73, %72 store i8 %74, i8* @sc, align 1 - %75 = load i8* @uc, align 1 + %75 = load i8, i8* @uc, align 1 %76 = atomicrmw or i8* @uc, i8 %75 monotonic %77 = or i8 %76, %75 store i8 %77, i8* @uc, align 1 - %78 = load i8* @uc, align 1 + %78 = load i8, i8* @uc, align 1 %79 = zext i8 %78 to i16 %80 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %81 = atomicrmw or i16* %80, i16 %79 monotonic %82 = or i16 %81, %79 store i16 %82, i16* @ss, align 2 - %83 = load i8* @uc, align 1 + %83 = load i8, i8* @uc, align 1 %84 = zext i8 %83 to i16 %85 = bitcast i8* bitcast (i16* @us to i8*) to i16* %86 = atomicrmw or i16* %85, i16 %84 monotonic %87 = or i16 %86, %84 store i16 %87, i16* @us, align 2 - %88 = load i8* @uc, align 1 + %88 = load i8, i8* @uc, align 1 %89 = zext i8 %88 to i32 %90 = bitcast i8* bitcast (i32* @si to i8*) to i32* %91 = atomicrmw or i32* %90, i32 %89 monotonic %92 = or i32 %91, %89 store i32 %92, i32* @si, align 4 - %93 = load i8* @uc, align 1 + %93 = load i8, i8* @uc, align 1 %94 = zext i8 %93 to i32 %95 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %96 = atomicrmw or i32* %95, i32 %94 monotonic %97 = or i32 %96, %94 store i32 %97, i32* @ui, align 4 - %98 = load i8* @uc, align 1 + %98 = load i8, i8* @uc, align 1 %99 = zext i8 %98 to i64 %100 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %101 = atomicrmw or i64* %100, i64 %99 monotonic %102 = or i64 %101, %99 store i64 %102, i64* @sl, align 8 - %103 = load i8* @uc, align 1 + %103 = load i8, i8* @uc, align 1 %104 = zext i8 %103 to i64 %105 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %106 = atomicrmw or i64* %105, i64 %104 monotonic %107 = or i64 %106, %104 store i64 %107, i64* @ul, align 8 - %108 = load i8* @uc, align 1 + %108 = load i8, i8* @uc, align 1 %109 = atomicrmw xor i8* @sc, i8 %108 monotonic %110 = xor i8 %109, %108 store i8 %110, i8* @sc, align 1 - %111 = load i8* @uc, align 1 + %111 = load i8, i8* @uc, align 1 %112 = atomicrmw xor i8* @uc, i8 %111 monotonic %113 = xor i8 %112, %111 store i8 %113, i8* @uc, align 1 - %114 = load i8* @uc, align 1 + %114 = load i8, i8* @uc, align 1 %115 = zext i8 %114 to i16 %116 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %117 = atomicrmw xor i16* %116, i16 %115 monotonic %118 = xor i16 %117, %115 store i16 %118, i16* @ss, align 2 - %119 = load i8* @uc, align 1 + %119 = load i8, i8* @uc, align 1 %120 = zext i8 %119 to i16 %121 = bitcast i8* bitcast (i16* @us to i8*) to i16* %122 = atomicrmw xor i16* %121, i16 %120 monotonic %123 = xor i16 %122, %120 store i16 %123, i16* @us, align 2 - %124 = load i8* @uc, align 1 + %124 = load i8, i8* @uc, align 1 %125 = zext i8 %124 to i32 %126 = bitcast i8* bitcast (i32* @si to i8*) to i32* %127 = atomicrmw xor i32* %126, i32 %125 monotonic %128 = xor i32 %127, %125 store i32 %128, i32* @si, align 4 - %129 = load i8* @uc, align 1 + %129 = load i8, i8* @uc, align 1 %130 = zext i8 %129 to i32 %131 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %132 = atomicrmw xor i32* %131, i32 %130 monotonic %133 = xor i32 %132, %130 store i32 %133, i32* @ui, align 4 - %134 = load i8* @uc, align 1 + %134 = load i8, i8* @uc, align 1 %135 = zext i8 %134 to i64 %136 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %137 = atomicrmw xor i64* %136, i64 %135 monotonic %138 = xor i64 %137, %135 store i64 %138, i64* @sl, align 8 - %139 = load i8* @uc, align 1 + %139 = load i8, i8* @uc, align 1 %140 = zext i8 %139 to i64 %141 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %142 = atomicrmw xor i64* %141, i64 %140 monotonic %143 = xor i64 %142, %140 store i64 %143, i64* @ul, align 8 - %144 = load i8* @uc, align 1 + %144 = load i8, i8* @uc, align 1 %145 = atomicrmw and i8* @sc, i8 %144 monotonic %146 = and i8 %145, %144 store i8 %146, i8* @sc, align 1 - %147 = load i8* @uc, align 1 + %147 = load i8, i8* @uc, align 1 %148 = atomicrmw and i8* @uc, i8 %147 monotonic %149 = and i8 %148, %147 store i8 %149, i8* @uc, align 1 - %150 = load i8* @uc, align 1 + %150 = load i8, i8* @uc, align 1 %151 = zext i8 %150 to i16 %152 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %153 = atomicrmw and i16* %152, i16 %151 monotonic %154 = and i16 %153, %151 store i16 %154, i16* @ss, align 2 - %155 = load i8* @uc, align 1 + %155 = load i8, i8* @uc, align 1 %156 = zext i8 %155 to i16 %157 = bitcast i8* bitcast (i16* @us to i8*) to i16* %158 = atomicrmw and i16* %157, i16 %156 monotonic %159 = and i16 %158, %156 store i16 %159, i16* @us, align 2 - %160 = load i8* @uc, align 1 + %160 = load i8, i8* @uc, align 1 %161 = zext i8 %160 to i32 %162 = bitcast i8* bitcast (i32* @si to i8*) to i32* %163 = atomicrmw and i32* %162, i32 %161 monotonic %164 = and i32 %163, %161 store i32 %164, i32* @si, align 4 - %165 = load i8* @uc, align 1 + %165 = load i8, i8* @uc, align 1 %166 = zext i8 %165 to i32 %167 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %168 = atomicrmw and i32* %167, i32 %166 monotonic %169 = and i32 %168, %166 store i32 %169, i32* @ui, align 4 - %170 = load i8* @uc, align 1 + %170 = load i8, i8* @uc, align 1 %171 = zext i8 %170 to i64 %172 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %173 = atomicrmw and i64* %172, i64 %171 monotonic %174 = and i64 %173, %171 store i64 %174, i64* @sl, align 8 - %175 = load i8* @uc, align 1 + %175 = load i8, i8* @uc, align 1 %176 = zext i8 %175 to i64 %177 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %178 = atomicrmw and i64* %177, i64 %176 monotonic %179 = and i64 %178, %176 store i64 %179, i64* @ul, align 8 - %180 = load i8* @uc, align 1 + %180 = load i8, i8* @uc, align 1 %181 = atomicrmw nand i8* @sc, i8 %180 monotonic %182 = xor i8 %181, -1 %183 = and i8 %182, %180 store i8 %183, i8* @sc, align 1 - %184 = load i8* @uc, align 1 + %184 = load i8, i8* @uc, align 1 %185 = atomicrmw nand i8* @uc, i8 %184 monotonic %186 = xor i8 %185, -1 %187 = and i8 %186, %184 store i8 %187, i8* @uc, align 1 - %188 = load i8* @uc, align 1 + %188 = load i8, i8* @uc, align 1 %189 = zext i8 %188 to i16 %190 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %191 = atomicrmw nand i16* %190, i16 %189 monotonic %192 = xor i16 %191, -1 %193 = and i16 %192, %189 store i16 %193, i16* @ss, align 2 - %194 = load i8* @uc, align 1 + %194 = load i8, i8* @uc, align 1 %195 = zext i8 %194 to i16 %196 = bitcast i8* bitcast (i16* @us to i8*) to i16* %197 = atomicrmw nand i16* %196, i16 %195 monotonic %198 = xor i16 %197, -1 %199 = and i16 %198, %195 store i16 %199, i16* @us, align 2 - %200 = load i8* @uc, align 1 + %200 = load i8, i8* @uc, align 1 %201 = zext i8 %200 to i32 %202 = bitcast i8* bitcast (i32* @si to i8*) to i32* %203 = atomicrmw nand i32* %202, i32 %201 monotonic %204 = xor i32 %203, -1 %205 = and i32 %204, %201 store i32 %205, i32* @si, align 4 - %206 = load i8* @uc, align 1 + %206 = load i8, i8* @uc, align 1 %207 = zext i8 %206 to i32 %208 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %209 = atomicrmw nand i32* %208, i32 %207 monotonic %210 = xor i32 %209, -1 %211 = and i32 %210, %207 store i32 %211, i32* @ui, align 4 - %212 = load i8* @uc, align 1 + %212 = load i8, i8* @uc, align 1 %213 = zext i8 %212 to i64 %214 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %215 = atomicrmw nand i64* %214, i64 %213 monotonic %216 = xor i64 %215, -1 %217 = and i64 %216, %213 store i64 %217, i64* @sl, align 8 - %218 = load i8* @uc, align 1 + %218 = load i8, i8* @uc, align 1 %219 = zext i8 %218 to i64 %220 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %221 = atomicrmw nand i64* %220, i64 %219 monotonic @@ -534,73 +534,73 @@ return: ; preds = %entry define void @test_compare_and_swap() nounwind { entry: - %0 = load i8* @uc, align 1 - %1 = load i8* @sc, align 1 + %0 = load i8, i8* @uc, align 1 + %1 = load i8, i8* @sc, align 1 %2 = cmpxchg i8* @sc, i8 %0, i8 %1 monotonic monotonic store i8 %2, i8* @sc, align 1 - %3 = load i8* @uc, align 1 - %4 = load i8* @sc, align 1 + %3 = load i8, i8* @uc, align 1 + %4 = load i8, i8* @sc, align 1 %5 = cmpxchg i8* @uc, i8 %3, i8 %4 monotonic monotonic store i8 %5, i8* @uc, align 1 - %6 = load i8* @uc, align 1 + %6 = load i8, i8* @uc, align 1 %7 = zext i8 %6 to i16 - %8 = load i8* @sc, align 1 + %8 = load i8, i8* @sc, align 1 %9 = sext i8 %8 to i16 %10 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %11 = cmpxchg i16* %10, i16 %7, i16 %9 monotonic monotonic store i16 %11, i16* @ss, align 2 - %12 = load i8* @uc, align 1 + %12 = load i8, i8* @uc, align 1 %13 = zext i8 %12 to i16 - %14 = load i8* @sc, align 1 + %14 = load i8, i8* @sc, align 1 %15 = sext i8 %14 to i16 %16 = bitcast i8* bitcast (i16* @us to i8*) to i16* %17 = cmpxchg i16* %16, i16 %13, i16 %15 monotonic monotonic store i16 %17, i16* @us, align 2 - %18 = load i8* @uc, align 1 + %18 = load i8, i8* @uc, align 1 %19 = zext i8 %18 to i32 - %20 = load i8* @sc, align 1 + %20 = load i8, i8* @sc, align 1 %21 = sext i8 %20 to i32 %22 = bitcast i8* bitcast (i32* @si to i8*) to i32* %23 = cmpxchg i32* %22, i32 %19, i32 %21 monotonic monotonic store i32 %23, i32* @si, align 4 - %24 = load i8* @uc, align 1 + %24 = load i8, i8* @uc, align 1 %25 = zext i8 %24 to i32 - %26 = load i8* @sc, align 1 + %26 = load i8, i8* @sc, align 1 %27 = sext i8 %26 to i32 %28 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %29 = cmpxchg i32* %28, i32 %25, i32 %27 monotonic monotonic store i32 %29, i32* @ui, align 4 - %30 = load i8* @uc, align 1 + %30 = load i8, i8* @uc, align 1 %31 = zext i8 %30 to i64 - %32 = load i8* @sc, align 1 + %32 = load i8, i8* @sc, align 1 %33 = sext i8 %32 to i64 %34 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %35 = cmpxchg i64* %34, i64 %31, i64 %33 monotonic monotonic store i64 %35, i64* @sl, align 8 - %36 = load i8* @uc, align 1 + %36 = load i8, i8* @uc, align 1 %37 = zext i8 %36 to i64 - %38 = load i8* @sc, align 1 + %38 = load i8, i8* @sc, align 1 %39 = sext i8 %38 to i64 %40 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %41 = cmpxchg i64* %40, i64 %37, i64 %39 monotonic monotonic store i64 %41, i64* @ul, align 8 - %42 = load i8* @uc, align 1 - %43 = load i8* @sc, align 1 + %42 = load i8, i8* @uc, align 1 + %43 = load i8, i8* @sc, align 1 %44 = cmpxchg i8* @sc, i8 %42, i8 %43 monotonic monotonic %45 = icmp eq i8 %44, %42 %46 = zext i1 %45 to i8 %47 = zext i8 %46 to i32 store i32 %47, i32* @ui, align 4 - %48 = load i8* @uc, align 1 - %49 = load i8* @sc, align 1 + %48 = load i8, i8* @uc, align 1 + %49 = load i8, i8* @sc, align 1 %50 = cmpxchg i8* @uc, i8 %48, i8 %49 monotonic monotonic %51 = icmp eq i8 %50, %48 %52 = zext i1 %51 to i8 %53 = zext i8 %52 to i32 store i32 %53, i32* @ui, align 4 - %54 = load i8* @uc, align 1 + %54 = load i8, i8* @uc, align 1 %55 = zext i8 %54 to i16 - %56 = load i8* @sc, align 1 + %56 = load i8, i8* @sc, align 1 %57 = sext i8 %56 to i16 %58 = bitcast i8* bitcast (i16* @ss to i8*) to i16* %59 = cmpxchg i16* %58, i16 %55, i16 %57 monotonic monotonic @@ -608,9 +608,9 @@ entry: %61 = zext i1 %60 to i8 %62 = zext i8 %61 to i32 store i32 %62, i32* @ui, align 4 - %63 = load i8* @uc, align 1 + %63 = load i8, i8* @uc, align 1 %64 = zext i8 %63 to i16 - %65 = load i8* @sc, align 1 + %65 = load i8, i8* @sc, align 1 %66 = sext i8 %65 to i16 %67 = bitcast i8* bitcast (i16* @us to i8*) to i16* %68 = cmpxchg i16* %67, i16 %64, i16 %66 monotonic monotonic @@ -618,9 +618,9 @@ entry: %70 = zext i1 %69 to i8 %71 = zext i8 %70 to i32 store i32 %71, i32* @ui, align 4 - %72 = load i8* @uc, align 1 + %72 = load i8, i8* @uc, align 1 %73 = zext i8 %72 to i32 - %74 = load i8* @sc, align 1 + %74 = load i8, i8* @sc, align 1 %75 = sext i8 %74 to i32 %76 = bitcast i8* bitcast (i32* @si to i8*) to i32* %77 = cmpxchg i32* %76, i32 %73, i32 %75 monotonic monotonic @@ -628,9 +628,9 @@ entry: %79 = zext i1 %78 to i8 %80 = zext i8 %79 to i32 store i32 %80, i32* @ui, align 4 - %81 = load i8* @uc, align 1 + %81 = load i8, i8* @uc, align 1 %82 = zext i8 %81 to i32 - %83 = load i8* @sc, align 1 + %83 = load i8, i8* @sc, align 1 %84 = sext i8 %83 to i32 %85 = bitcast i8* bitcast (i32* @ui to i8*) to i32* %86 = cmpxchg i32* %85, i32 %82, i32 %84 monotonic monotonic @@ -638,9 +638,9 @@ entry: %88 = zext i1 %87 to i8 %89 = zext i8 %88 to i32 store i32 %89, i32* @ui, align 4 - %90 = load i8* @uc, align 1 + %90 = load i8, i8* @uc, align 1 %91 = zext i8 %90 to i64 - %92 = load i8* @sc, align 1 + %92 = load i8, i8* @sc, align 1 %93 = sext i8 %92 to i64 %94 = bitcast i8* bitcast (i64* @sl to i8*) to i64* %95 = cmpxchg i64* %94, i64 %91, i64 %93 monotonic monotonic @@ -648,9 +648,9 @@ entry: %97 = zext i1 %96 to i8 %98 = zext i8 %97 to i32 store i32 %98, i32* @ui, align 4 - %99 = load i8* @uc, align 1 + %99 = load i8, i8* @uc, align 1 %100 = zext i8 %99 to i64 - %101 = load i8* @sc, align 1 + %101 = load i8, i8* @sc, align 1 %102 = sext i8 %101 to i64 %103 = bitcast i8* bitcast (i64* @ul to i8*) to i64* %104 = cmpxchg i64* %103, i64 %100, i64 %102 monotonic monotonic diff --git a/test/CodeGen/PowerPC/a2-fp-basic.ll b/test/CodeGen/PowerPC/a2-fp-basic.ll index 07a7d9e868f..0324e38e169 100644 --- a/test/CodeGen/PowerPC/a2-fp-basic.ll +++ b/test/CodeGen/PowerPC/a2-fp-basic.ll @@ -5,13 +5,13 @@ define void @maybe_an_fma(%0* sret %agg.result, %0* byval %a, %0* byval %b, %0* byval %c) nounwind { entry: %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0 - %a.real = load double* %a.realp + %a.real = load double, double* %a.realp %a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1 - %a.imag = load double* %a.imagp + %a.imag = load double, double* %a.imagp %b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0 - %b.real = load double* %b.realp + %b.real = load double, double* %b.realp %b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1 - %b.imag = load double* %b.imagp + %b.imag = load double, double* %b.imagp %mul.rl = fmul double %a.real, %b.real %mul.rr = fmul double %a.imag, %b.imag %mul.r = fsub double %mul.rl, %mul.rr @@ -19,9 +19,9 @@ entry: %mul.ir = fmul double %a.real, %b.imag %mul.i = fadd double %mul.il, %mul.ir %c.realp = getelementptr inbounds %0, %0* %c, i32 0, i32 0 - %c.real = load double* %c.realp + %c.real = load double, double* %c.realp %c.imagp = getelementptr inbounds %0, %0* %c, i32 0, i32 1 - %c.imag = load double* %c.imagp + %c.imag = load double, double* %c.imagp %add.r = fadd double %mul.r, %c.real %add.i = fadd double %mul.i, %c.imag %real = getelementptr inbounds %0, %0* %agg.result, i32 0, i32 0 diff --git a/test/CodeGen/PowerPC/addi-licm.ll b/test/CodeGen/PowerPC/addi-licm.ll index ff33cf03104..b6cfeec0e6f 100644 --- a/test/CodeGen/PowerPC/addi-licm.ll +++ b/test/CodeGen/PowerPC/addi-licm.ll @@ -34,10 +34,10 @@ for.body.i: ; preds = %for.body.i.preheade %accumulator.09.i = phi double [ %add.i, %for.body.i ], [ 0.000000e+00, %entry ] %i.08.i = phi i64 [ %inc.i, %for.body.i ], [ 0, %entry ] %arrayidx.i = getelementptr inbounds [2048 x float], [2048 x float]* %x, i64 0, i64 %i.08.i - %v14 = load float* %arrayidx.i, align 4 + %v14 = load float, float* %arrayidx.i, align 4 %conv.i = fpext float %v14 to double %arrayidx1.i = getelementptr inbounds [2048 x float], [2048 x float]* %y, i64 0, i64 %i.08.i - %v15 = load float* %arrayidx1.i, align 4 + %v15 = load float, float* %arrayidx1.i, align 4 %conv2.i = fpext float %v15 to double %mul.i = fmul double %conv.i, %conv2.i %add.i = fadd double %accumulator.09.i, %mul.i diff --git a/test/CodeGen/PowerPC/addi-reassoc.ll b/test/CodeGen/PowerPC/addi-reassoc.ll index 3a93b53479a..3624ce638c7 100644 --- a/test/CodeGen/PowerPC/addi-reassoc.ll +++ b/test/CodeGen/PowerPC/addi-reassoc.ll @@ -5,14 +5,14 @@ define i32 @test1([4 x i32]* %P, i32 %i) { %tmp.2 = add i32 %i, 2 ; <i32> [#uses=1] %tmp.4 = getelementptr [4 x i32], [4 x i32]* %P, i32 %tmp.2, i32 1 ; <i32*> [#uses=1] - %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1] + %tmp.5 = load i32, i32* %tmp.4 ; <i32> [#uses=1] ret i32 %tmp.5 } define i32 @test2(%struct.X* %P, i32 %i) { %tmp.2 = add i32 %i, 2 ; <i32> [#uses=1] %tmp.5 = getelementptr %struct.X, %struct.X* %P, i32 %tmp.2, i32 0, i32 1 ; <i8*> [#uses=1] - %tmp.6 = load i8* %tmp.5 ; <i8> [#uses=1] + %tmp.6 = load i8, i8* %tmp.5 ; <i8> [#uses=1] %tmp.7 = sext i8 %tmp.6 to i32 ; <i32> [#uses=1] ret i32 %tmp.7 } diff --git a/test/CodeGen/PowerPC/alias.ll b/test/CodeGen/PowerPC/alias.ll index 86e41148a0d..b1521d63b63 100644 --- a/test/CodeGen/PowerPC/alias.ll +++ b/test/CodeGen/PowerPC/alias.ll @@ -11,7 +11,7 @@ define i32 @bar() { ; MEDIUM: addis 3, 2, fooa@toc@ha ; LARGE: addis 3, 2, .LC1@toc@ha - %a = load i32* @fooa + %a = load i32, i32* @fooa ret i32 %a } @@ -20,7 +20,7 @@ define i64 @bar2() { ; MEDIUM: addis 3, 2, foo2a@toc@ha ; MEDIUM: addi 3, 3, foo2a@toc@l ; LARGE: addis 3, 2, .LC3@toc@ha - %a = load i64* @foo2a + %a = load i64, i64* @foo2a ret i64 %a } diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll index a1ec29b16f1..f1738b2c151 100644 --- a/test/CodeGen/PowerPC/and-elim.ll +++ b/test/CodeGen/PowerPC/and-elim.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 | not grep rlwin define void @test(i8* %P) { - %W = load i8* %P + %W = load i8, i8* %P %X = shl i8 %W, 1 %Y = add i8 %X, 2 %Z = and i8 %Y, 254 ; dead and diff --git a/test/CodeGen/PowerPC/anon_aggr.ll b/test/CodeGen/PowerPC/anon_aggr.ll index 90497a2a418..1a25f4bfbfe 100644 --- a/test/CodeGen/PowerPC/anon_aggr.ll +++ b/test/CodeGen/PowerPC/anon_aggr.ll @@ -52,7 +52,7 @@ define i8* @func2({ i64, i8* } %array1, %tarray* byval %array2) { entry: %array1_ptr = extractvalue {i64, i8* } %array1, 1 %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 - %array2_ptr = load i8** %tmp + %array2_ptr = load i8*, i8** %tmp %cond = icmp eq i8* %array1_ptr, %array2_ptr br i1 %cond, label %equal, label %unequal equal: @@ -94,9 +94,9 @@ unequal: define i8* @func3({ i64, i8* }* byval %array1, %tarray* byval %array2) { entry: %tmp1 = getelementptr inbounds { i64, i8* }, { i64, i8* }* %array1, i32 0, i32 1 - %array1_ptr = load i8** %tmp1 + %array1_ptr = load i8*, i8** %tmp1 %tmp2 = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 - %array2_ptr = load i8** %tmp2 + %array2_ptr = load i8*, i8** %tmp2 %cond = icmp eq i8* %array1_ptr, %array2_ptr br i1 %cond, label %equal, label %unequal equal: @@ -141,7 +141,7 @@ define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4, entry: %array1_ptr = extractvalue {i64, i8* } %array1, 1 %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 - %array2_ptr = load i8** %tmp + %array2_ptr = load i8*, i8** %tmp %cond = icmp eq i8* %array1_ptr, %array2_ptr br i1 %cond, label %equal, label %unequal equal: diff --git a/test/CodeGen/PowerPC/asm-constraints.ll b/test/CodeGen/PowerPC/asm-constraints.ll index 9bf8b75e0ac..1cb00ca30fb 100644 --- a/test/CodeGen/PowerPC/asm-constraints.ll +++ b/test/CodeGen/PowerPC/asm-constraints.ll @@ -23,7 +23,7 @@ entry: %addr.addr = alloca i8*, align 8 store i32 %result, i32* %result.addr, align 4 store i8* %addr, i8** %addr.addr, align 8 - %0 = load i8** %addr.addr, align 8 + %0 = load i8*, i8** %addr.addr, align 8 %1 = call i32 asm sideeffect "ld${1:U}${1:X} $0,$1\0Acmpw $0,$0\0Abne- 1f\0A1: isync\0A", "=r,*m,~{memory},~{cr0}"(i8* %0) #1, !srcloc !1 store i32 %1, i32* %result.addr, align 4 ret void diff --git a/test/CodeGen/PowerPC/atomic-2.ll b/test/CodeGen/PowerPC/atomic-2.ll index 9cb0fa5be5c..bc77ed73f0e 100644 --- a/test/CodeGen/PowerPC/atomic-2.ll +++ b/test/CodeGen/PowerPC/atomic-2.ll @@ -39,7 +39,7 @@ entry: define i64 @atomic_load(i64* %mem) nounwind { entry: ; CHECK: @atomic_load - %tmp = load atomic i64* %mem acquire, align 64 + %tmp = load atomic i64, i64* %mem acquire, align 64 ; CHECK-NOT: ldarx ; CHECK: ld ; CHECK: sync 1 diff --git a/test/CodeGen/PowerPC/atomics-indexed.ll b/test/CodeGen/PowerPC/atomics-indexed.ll index 910874ee7b1..b9ec3c669ba 100644 --- a/test/CodeGen/PowerPC/atomics-indexed.ll +++ b/test/CodeGen/PowerPC/atomics-indexed.ll @@ -13,7 +13,7 @@ define i8 @load_x_i8_seq_cst([100000 x i8]* %mem) { ; CHECK: lbzx ; CHECK: sync 1 %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000 - %val = load atomic i8* %ptr seq_cst, align 1 + %val = load atomic i8, i8* %ptr seq_cst, align 1 ret i8 %val } define i16 @load_x_i16_acquire([100000 x i16]* %mem) { @@ -21,7 +21,7 @@ define i16 @load_x_i16_acquire([100000 x i16]* %mem) { ; CHECK: lhzx ; CHECK: sync 1 %ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000 - %val = load atomic i16* %ptr acquire, align 2 + %val = load atomic i16, i16* %ptr acquire, align 2 ret i16 %val } define i32 @load_x_i32_monotonic([100000 x i32]* %mem) { @@ -29,7 +29,7 @@ define i32 @load_x_i32_monotonic([100000 x i32]* %mem) { ; CHECK: lwzx ; CHECK-NOT: sync %ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %mem, i64 0, i64 90000 - %val = load atomic i32* %ptr monotonic, align 4 + %val = load atomic i32, i32* %ptr monotonic, align 4 ret i32 %val } define i64 @load_x_i64_unordered([100000 x i64]* %mem) { @@ -39,7 +39,7 @@ define i64 @load_x_i64_unordered([100000 x i64]* %mem) { ; PPC64: ldx ; CHECK-NOT: sync %ptr = getelementptr inbounds [100000 x i64], [100000 x i64]* %mem, i64 0, i64 90000 - %val = load atomic i64* %ptr unordered, align 8 + %val = load atomic i64, i64* %ptr unordered, align 8 ret i64 %val } diff --git a/test/CodeGen/PowerPC/atomics.ll b/test/CodeGen/PowerPC/atomics.ll index 5f6a6a4dcdf..fe4791ec193 100644 --- a/test/CodeGen/PowerPC/atomics.ll +++ b/test/CodeGen/PowerPC/atomics.ll @@ -13,20 +13,20 @@ define i8 @load_i8_unordered(i8* %mem) { ; CHECK-LABEL: load_i8_unordered ; CHECK: lbz ; CHECK-NOT: sync - %val = load atomic i8* %mem unordered, align 1 + %val = load atomic i8, i8* %mem unordered, align 1 ret i8 %val } define i16 @load_i16_monotonic(i16* %mem) { ; CHECK-LABEL: load_i16_monotonic ; CHECK: lhz ; CHECK-NOT: sync - %val = load atomic i16* %mem monotonic, align 2 + %val = load atomic i16, i16* %mem monotonic, align 2 ret i16 %val } define i32 @load_i32_acquire(i32* %mem) { ; CHECK-LABEL: load_i32_acquire ; CHECK: lwz - %val = load atomic i32* %mem acquire, align 4 + %val = load atomic i32, i32* %mem acquire, align 4 ; CHECK: sync 1 ret i32 %val } @@ -36,7 +36,7 @@ define i64 @load_i64_seq_cst(i64* %mem) { ; PPC32: __sync_ ; PPC64-NOT: __sync_ ; PPC64: ld - %val = load atomic i64* %mem seq_cst, align 8 + %val = load atomic i64, i64* %mem seq_cst, align 8 ; CHECK: sync 1 ret i64 %val } diff --git a/test/CodeGen/PowerPC/bdzlr.ll b/test/CodeGen/PowerPC/bdzlr.ll index c54c07a0088..d6506044868 100644 --- a/test/CodeGen/PowerPC/bdzlr.ll +++ b/test/CodeGen/PowerPC/bdzlr.ll @@ -36,7 +36,7 @@ for.body: ; preds = %for.body.for.body_c %0 = phi %struct.lua_TValue.17.692* [ undef, %for.body.lr.ph ], [ %.pre, %for.body.for.body_crit_edge ] %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body.for.body_crit_edge ] %tt = getelementptr inbounds %struct.lua_TValue.17.692, %struct.lua_TValue.17.692* %0, i64 %indvars.iv, i32 1 - %1 = load i32* %tt, align 4 + %1 = load i32, i32* %tt, align 4 store i32 %1, i32* undef, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 @@ -44,7 +44,7 @@ for.body: ; preds = %for.body.for.body_c br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge for.body.for.body_crit_edge: ; preds = %for.body - %.pre = load %struct.lua_TValue.17.692** undef, align 8 + %.pre = load %struct.lua_TValue.17.692*, %struct.lua_TValue.17.692** undef, align 8 br label %for.body for.end: ; preds = %for.body, %if.end, %entry diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll index bb219c2c0ab..cee1f0cdaa9 100644 --- a/test/CodeGen/PowerPC/bswap-load-store.ll +++ b/test/CodeGen/PowerPC/bswap-load-store.ll @@ -15,7 +15,7 @@ define void @STWBRX(i32 %i, i8* %ptr, i32 %off) { define i32 @LWBRX(i8* %ptr, i32 %off) { %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1] %tmp1.upgrd.2 = bitcast i8* %tmp1 to i32* ; <i32*> [#uses=1] - %tmp = load i32* %tmp1.upgrd.2 ; <i32> [#uses=1] + %tmp = load i32, i32* %tmp1.upgrd.2 ; <i32> [#uses=1] %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp ) ; <i32> [#uses=1] ret i32 %tmp14 } @@ -31,7 +31,7 @@ define void @STHBRX(i16 %s, i8* %ptr, i32 %off) { define i16 @LHBRX(i8* %ptr, i32 %off) { %tmp1 = getelementptr i8, i8* %ptr, i32 %off ; <i8*> [#uses=1] %tmp1.upgrd.4 = bitcast i8* %tmp1 to i16* ; <i16*> [#uses=1] - %tmp = load i16* %tmp1.upgrd.4 ; <i16> [#uses=1] + %tmp = load i16, i16* %tmp1.upgrd.4 ; <i16> [#uses=1] %tmp6 = call i16 @llvm.bswap.i16( i16 %tmp ) ; <i16> [#uses=1] ret i16 %tmp6 } @@ -47,7 +47,7 @@ define void @STDBRX(i64 %i, i8* %ptr, i64 %off) { define i64 @LDBRX(i8* %ptr, i64 %off) { %tmp1 = getelementptr i8, i8* %ptr, i64 %off ; <i8*> [#uses=1] %tmp1.upgrd.2 = bitcast i8* %tmp1 to i64* ; <i64*> [#uses=1] - %tmp = load i64* %tmp1.upgrd.2 ; <i64> [#uses=1] + %tmp = load i64, i64* %tmp1.upgrd.2 ; <i64> [#uses=1] %tmp14 = tail call i64 @llvm.bswap.i64( i64 %tmp ) ; <i64> [#uses=1] ret i64 %tmp14 } diff --git a/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/test/CodeGen/PowerPC/buildvec_canonicalize.ll index b70671bfd5c..6c591912d9b 100644 --- a/test/CodeGen/PowerPC/buildvec_canonicalize.ll +++ b/test/CodeGen/PowerPC/buildvec_canonicalize.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) { - %tmp = load <4 x float>* %P3 ; <<4 x float>> [#uses=1] - %tmp3 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %P3 ; <<4 x float>> [#uses=1] + %tmp3 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] %tmp4 = fmul <4 x float> %tmp, %tmp3 ; <<4 x float>> [#uses=1] store <4 x float> %tmp4, <4 x float>* %P3 store <4 x float> zeroinitializer, <4 x float>* %P1 diff --git a/test/CodeGen/PowerPC/byval-aliased.ll b/test/CodeGen/PowerPC/byval-aliased.ll index caaf0c95a24..8668e64d4d5 100644 --- a/test/CodeGen/PowerPC/byval-aliased.ll +++ b/test/CodeGen/PowerPC/byval-aliased.ll @@ -8,7 +8,7 @@ target triple = "powerpc-apple-macosx10.5.0" define void @foo(%struct.sm* byval %s) #0 { entry: %a = getelementptr inbounds %struct.sm, %struct.sm* %s, i32 0, i32 0 - %0 = load i8* %a, align 1 + %0 = load i8, i8* %a, align 1 %conv2 = zext i8 %0 to i32 %add = add nuw nsw i32 %conv2, 3 %conv1 = trunc i32 %add to i8 diff --git a/test/CodeGen/PowerPC/code-align.ll b/test/CodeGen/PowerPC/code-align.ll index 6b743e91c5a..19d1b236ce0 100644 --- a/test/CodeGen/PowerPC/code-align.ll +++ b/test/CodeGen/PowerPC/code-align.ll @@ -56,8 +56,8 @@ vector.body: ; preds = %vector.body, %entry %induction45 = or i64 %index, 1 %0 = getelementptr inbounds i32, i32* %a, i64 %index %1 = getelementptr inbounds i32, i32* %a, i64 %induction45 - %2 = load i32* %0, align 4 - %3 = load i32* %1, align 4 + %2 = load i32, i32* %0, align 4 + %3 = load i32, i32* %1, align 4 %4 = add nsw i32 %2, 4 %5 = add nsw i32 %3, 4 %6 = mul nsw i32 %4, 3 @@ -93,7 +93,7 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv - %0 = load i32* %arrayidx, align 4 + %0 = load i32, i32* %arrayidx, align 4 %add = add nsw i32 %0, 4 %mul = mul nsw i32 %add, 3 store i32 %mul, i32* %arrayidx, align 4 diff --git a/test/CodeGen/PowerPC/complex-return.ll b/test/CodeGen/PowerPC/complex-return.ll index bc201f912d2..e419f079952 100644 --- a/test/CodeGen/PowerPC/complex-return.ll +++ b/test/CodeGen/PowerPC/complex-return.ll @@ -12,14 +12,14 @@ entry: store ppc_fp128 0xM400C0000000000000000000000000000, ppc_fp128* %real store ppc_fp128 0xMC00547AE147AE1483CA47AE147AE147A, ppc_fp128* %imag %x.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %x, i32 0, i32 0 - %x.real = load ppc_fp128* %x.realp + %x.real = load ppc_fp128, ppc_fp128* %x.realp %x.imagp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %x, i32 0, i32 1 - %x.imag = load ppc_fp128* %x.imagp + %x.imag = load ppc_fp128, ppc_fp128* %x.imagp %real1 = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 0 %imag2 = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 1 store ppc_fp128 %x.real, ppc_fp128* %real1 store ppc_fp128 %x.imag, ppc_fp128* %imag2 - %0 = load { ppc_fp128, ppc_fp128 }* %retval + %0 = load { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval ret { ppc_fp128, ppc_fp128 } %0 } @@ -38,14 +38,14 @@ entry: store float 3.500000e+00, float* %real store float 0xC00547AE20000000, float* %imag %x.realp = getelementptr inbounds { float, float }, { float, float }* %x, i32 0, i32 0 - %x.real = load float* %x.realp + %x.real = load float, float* %x.realp %x.imagp = getelementptr inbounds { float, float }, { float, float }* %x, i32 0, i32 1 - %x.imag = load float* %x.imagp + %x.imag = load float, float* %x.imagp %real1 = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 0 %imag2 = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 1 store float %x.real, float* %real1 store float %x.imag, float* %imag2 - %0 = load { float, float }* %retval + %0 = load { float, float }, { float, float }* %retval ret { float, float } %0 } diff --git a/test/CodeGen/PowerPC/cr-spills.ll b/test/CodeGen/PowerPC/cr-spills.ll index 14a48a25cdc..e5605548a32 100644 --- a/test/CodeGen/PowerPC/cr-spills.ll +++ b/test/CodeGen/PowerPC/cr-spills.ll @@ -31,7 +31,7 @@ land.rhs: ; preds = %land.lhs.true, %lan land.end: ; preds = %land.rhs, %land.lhs.true, %entry %0 = phi i1 [ %tobool21, %land.rhs ], [ false, %land.lhs.true ], [ false, %entry ] - %cond = load i32** undef, align 8 + %cond = load i32*, i32** undef, align 8 br i1 undef, label %if.then95, label %for.body.lr.ph if.then95: ; preds = %land.end @@ -53,11 +53,11 @@ for.cond286.preheader: ; preds = %for.body252 for.cond290.preheader: ; preds = %for.end520, %for.cond286.preheader %srcptr.31595 = phi i16* [ getelementptr inbounds ([768 x i16]* @SetupFastFullPelSearch.orig_pels, i64 0, i64 0), %for.cond286.preheader ], [ null, %for.end520 ] - %1 = load i32* undef, align 4 - %2 = load i32* @weight_luma, align 4 - %3 = load i32* @wp_luma_round, align 4 - %4 = load i32* @luma_log_weight_denom, align 4 - %5 = load i32* @offset_luma, align 4 + %1 = load i32, i32* undef, align 4 + %2 = load i32, i32* @weight_luma, align 4 + %3 = load i32, i32* @wp_luma_round, align 4 + %4 = load i32, i32* @luma_log_weight_denom, align 4 + %5 = load i32, i32* @offset_luma, align 4 %incdec.ptr502.sum = add i64 undef, 16 br label %for.body293 @@ -68,7 +68,7 @@ for.body293: ; preds = %for.body293, %for.c %LineSadBlk1.01587 = phi i32 [ 0, %for.cond290.preheader ], [ %add402, %for.body293 ] %LineSadBlk3.01586 = phi i32 [ 0, %for.cond290.preheader ], [ %add514, %for.body293 ] %LineSadBlk2.01585 = phi i32 [ 0, %for.cond290.preheader ], [ %add458, %for.body293 ] - %6 = load i16* %refptr.11590, align 2 + %6 = load i16, i16* %refptr.11590, align 2 %conv294 = zext i16 %6 to i32 %mul295 = mul nsw i32 %conv294, %2 %add296 = add nsw i32 %mul295, %3 @@ -78,16 +78,16 @@ for.body293: ; preds = %for.body293, %for.c %cond.i.i1514 = select i1 %cmp.i.i1513, i32 %add297, i32 0 %cmp.i4.i1515 = icmp slt i32 %cond.i.i1514, %1 %cond.i5.i1516 = select i1 %cmp.i4.i1515, i32 %cond.i.i1514, i32 %1 - %7 = load i16* %srcptr.41591, align 2 + %7 = load i16, i16* %srcptr.41591, align 2 %conv300 = zext i16 %7 to i32 %sub301 = sub nsw i32 %cond.i5.i1516, %conv300 %idxprom302 = sext i32 %sub301 to i64 %arrayidx303 = getelementptr inbounds i32, i32* %cond, i64 %idxprom302 - %8 = load i32* %arrayidx303, align 4 + %8 = load i32, i32* %arrayidx303, align 4 %add304 = add nsw i32 %8, %LineSadBlk0.01588 - %9 = load i32* undef, align 4 + %9 = load i32, i32* undef, align 4 %add318 = add nsw i32 %add304, %9 - %10 = load i16* undef, align 2 + %10 = load i16, i16* undef, align 2 %conv321 = zext i16 %10 to i32 %mul322 = mul nsw i32 %conv321, %2 %add323 = add nsw i32 %mul322, %3 @@ -100,22 +100,22 @@ for.body293: ; preds = %for.body293, %for.c %sub329 = sub nsw i32 %cond.i5.i1508, 0 %idxprom330 = sext i32 %sub329 to i64 %arrayidx331 = getelementptr inbounds i32, i32* %cond, i64 %idxprom330 - %11 = load i32* %arrayidx331, align 4 + %11 = load i32, i32* %arrayidx331, align 4 %add332 = add nsw i32 %add318, %11 %cmp.i.i1501 = icmp sgt i32 undef, 0 %cond.i.i1502 = select i1 %cmp.i.i1501, i32 undef, i32 0 %cmp.i4.i1503 = icmp slt i32 %cond.i.i1502, %1 %cond.i5.i1504 = select i1 %cmp.i4.i1503, i32 %cond.i.i1502, i32 %1 %incdec.ptr341 = getelementptr inbounds i16, i16* %srcptr.41591, i64 4 - %12 = load i16* null, align 2 + %12 = load i16, i16* null, align 2 %conv342 = zext i16 %12 to i32 %sub343 = sub nsw i32 %cond.i5.i1504, %conv342 %idxprom344 = sext i32 %sub343 to i64 %arrayidx345 = getelementptr inbounds i32, i32* %cond, i64 %idxprom344 - %13 = load i32* %arrayidx345, align 4 + %13 = load i32, i32* %arrayidx345, align 4 %add346 = add nsw i32 %add332, %13 %incdec.ptr348 = getelementptr inbounds i16, i16* %refptr.11590, i64 5 - %14 = load i16* null, align 2 + %14 = load i16, i16* null, align 2 %conv349 = zext i16 %14 to i32 %mul350 = mul nsw i32 %conv349, %2 %add351 = add nsw i32 %mul350, %3 @@ -126,15 +126,15 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1499 = icmp slt i32 %cond.i.i1498, %1 %cond.i5.i1500 = select i1 %cmp.i4.i1499, i32 %cond.i.i1498, i32 %1 %incdec.ptr355 = getelementptr inbounds i16, i16* %srcptr.41591, i64 5 - %15 = load i16* %incdec.ptr341, align 2 + %15 = load i16, i16* %incdec.ptr341, align 2 %conv356 = zext i16 %15 to i32 %sub357 = sub nsw i32 %cond.i5.i1500, %conv356 %idxprom358 = sext i32 %sub357 to i64 %arrayidx359 = getelementptr inbounds i32, i32* %cond, i64 %idxprom358 - %16 = load i32* %arrayidx359, align 4 + %16 = load i32, i32* %arrayidx359, align 4 %add360 = add nsw i32 %16, %LineSadBlk1.01587 %incdec.ptr362 = getelementptr inbounds i16, i16* %refptr.11590, i64 6 - %17 = load i16* %incdec.ptr348, align 2 + %17 = load i16, i16* %incdec.ptr348, align 2 %conv363 = zext i16 %17 to i32 %mul364 = mul nsw i32 %conv363, %2 %add365 = add nsw i32 %mul364, %3 @@ -145,15 +145,15 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1495 = icmp slt i32 %cond.i.i1494, %1 %cond.i5.i1496 = select i1 %cmp.i4.i1495, i32 %cond.i.i1494, i32 %1 %incdec.ptr369 = getelementptr inbounds i16, i16* %srcptr.41591, i64 6 - %18 = load i16* %incdec.ptr355, align 2 + %18 = load i16, i16* %incdec.ptr355, align 2 %conv370 = zext i16 %18 to i32 %sub371 = sub nsw i32 %cond.i5.i1496, %conv370 %idxprom372 = sext i32 %sub371 to i64 %arrayidx373 = getelementptr inbounds i32, i32* %cond, i64 %idxprom372 - %19 = load i32* %arrayidx373, align 4 + %19 = load i32, i32* %arrayidx373, align 4 %add374 = add nsw i32 %add360, %19 %incdec.ptr376 = getelementptr inbounds i16, i16* %refptr.11590, i64 7 - %20 = load i16* %incdec.ptr362, align 2 + %20 = load i16, i16* %incdec.ptr362, align 2 %conv377 = zext i16 %20 to i32 %mul378 = mul nsw i32 %conv377, %2 %add379 = add nsw i32 %mul378, %3 @@ -164,14 +164,14 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1491 = icmp slt i32 %cond.i.i1490, %1 %cond.i5.i1492 = select i1 %cmp.i4.i1491, i32 %cond.i.i1490, i32 %1 %incdec.ptr383 = getelementptr inbounds i16, i16* %srcptr.41591, i64 7 - %21 = load i16* %incdec.ptr369, align 2 + %21 = load i16, i16* %incdec.ptr369, align 2 %conv384 = zext i16 %21 to i32 %sub385 = sub nsw i32 %cond.i5.i1492, %conv384 %idxprom386 = sext i32 %sub385 to i64 %arrayidx387 = getelementptr inbounds i32, i32* %cond, i64 %idxprom386 - %22 = load i32* %arrayidx387, align 4 + %22 = load i32, i32* %arrayidx387, align 4 %add388 = add nsw i32 %add374, %22 - %23 = load i16* %incdec.ptr376, align 2 + %23 = load i16, i16* %incdec.ptr376, align 2 %conv391 = zext i16 %23 to i32 %mul392 = mul nsw i32 %conv391, %2 %add395 = add nsw i32 0, %5 @@ -180,25 +180,25 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1487 = icmp slt i32 %cond.i.i1486, %1 %cond.i5.i1488 = select i1 %cmp.i4.i1487, i32 %cond.i.i1486, i32 %1 %incdec.ptr397 = getelementptr inbounds i16, i16* %srcptr.41591, i64 8 - %24 = load i16* %incdec.ptr383, align 2 + %24 = load i16, i16* %incdec.ptr383, align 2 %conv398 = zext i16 %24 to i32 %sub399 = sub nsw i32 %cond.i5.i1488, %conv398 %idxprom400 = sext i32 %sub399 to i64 %arrayidx401 = getelementptr inbounds i32, i32* %cond, i64 %idxprom400 - %25 = load i32* %arrayidx401, align 4 + %25 = load i32, i32* %arrayidx401, align 4 %add402 = add nsw i32 %add388, %25 %incdec.ptr404 = getelementptr inbounds i16, i16* %refptr.11590, i64 9 %cmp.i4.i1483 = icmp slt i32 undef, %1 %cond.i5.i1484 = select i1 %cmp.i4.i1483, i32 undef, i32 %1 - %26 = load i16* %incdec.ptr397, align 2 + %26 = load i16, i16* %incdec.ptr397, align 2 %conv412 = zext i16 %26 to i32 %sub413 = sub nsw i32 %cond.i5.i1484, %conv412 %idxprom414 = sext i32 %sub413 to i64 %arrayidx415 = getelementptr inbounds i32, i32* %cond, i64 %idxprom414 - %27 = load i32* %arrayidx415, align 4 + %27 = load i32, i32* %arrayidx415, align 4 %add416 = add nsw i32 %27, %LineSadBlk2.01585 %incdec.ptr418 = getelementptr inbounds i16, i16* %refptr.11590, i64 10 - %28 = load i16* %incdec.ptr404, align 2 + %28 = load i16, i16* %incdec.ptr404, align 2 %conv419 = zext i16 %28 to i32 %mul420 = mul nsw i32 %conv419, %2 %add421 = add nsw i32 %mul420, %3 @@ -212,10 +212,10 @@ for.body293: ; preds = %for.body293, %for.c %sub427 = sub nsw i32 %cond.i5.i1480, 0 %idxprom428 = sext i32 %sub427 to i64 %arrayidx429 = getelementptr inbounds i32, i32* %cond, i64 %idxprom428 - %29 = load i32* %arrayidx429, align 4 + %29 = load i32, i32* %arrayidx429, align 4 %add430 = add nsw i32 %add416, %29 %incdec.ptr432 = getelementptr inbounds i16, i16* %refptr.11590, i64 11 - %30 = load i16* %incdec.ptr418, align 2 + %30 = load i16, i16* %incdec.ptr418, align 2 %conv433 = zext i16 %30 to i32 %mul434 = mul nsw i32 %conv433, %2 %add435 = add nsw i32 %mul434, %3 @@ -225,15 +225,15 @@ for.body293: ; preds = %for.body293, %for.c %cond.i.i1474 = select i1 %cmp.i.i1473, i32 %add437, i32 0 %cmp.i4.i1475 = icmp slt i32 %cond.i.i1474, %1 %cond.i5.i1476 = select i1 %cmp.i4.i1475, i32 %cond.i.i1474, i32 %1 - %31 = load i16* %incdec.ptr425, align 2 + %31 = load i16, i16* %incdec.ptr425, align 2 %conv440 = zext i16 %31 to i32 %sub441 = sub nsw i32 %cond.i5.i1476, %conv440 %idxprom442 = sext i32 %sub441 to i64 %arrayidx443 = getelementptr inbounds i32, i32* %cond, i64 %idxprom442 - %32 = load i32* %arrayidx443, align 4 + %32 = load i32, i32* %arrayidx443, align 4 %add444 = add nsw i32 %add430, %32 %incdec.ptr446 = getelementptr inbounds i16, i16* %refptr.11590, i64 12 - %33 = load i16* %incdec.ptr432, align 2 + %33 = load i16, i16* %incdec.ptr432, align 2 %conv447 = zext i16 %33 to i32 %mul448 = mul nsw i32 %conv447, %2 %add449 = add nsw i32 %mul448, %3 @@ -244,15 +244,15 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1471 = icmp slt i32 %cond.i.i1470, %1 %cond.i5.i1472 = select i1 %cmp.i4.i1471, i32 %cond.i.i1470, i32 %1 %incdec.ptr453 = getelementptr inbounds i16, i16* %srcptr.41591, i64 12 - %34 = load i16* undef, align 2 + %34 = load i16, i16* undef, align 2 %conv454 = zext i16 %34 to i32 %sub455 = sub nsw i32 %cond.i5.i1472, %conv454 %idxprom456 = sext i32 %sub455 to i64 %arrayidx457 = getelementptr inbounds i32, i32* %cond, i64 %idxprom456 - %35 = load i32* %arrayidx457, align 4 + %35 = load i32, i32* %arrayidx457, align 4 %add458 = add nsw i32 %add444, %35 %incdec.ptr460 = getelementptr inbounds i16, i16* %refptr.11590, i64 13 - %36 = load i16* %incdec.ptr446, align 2 + %36 = load i16, i16* %incdec.ptr446, align 2 %conv461 = zext i16 %36 to i32 %mul462 = mul nsw i32 %conv461, %2 %add463 = add nsw i32 %mul462, %3 @@ -263,12 +263,12 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1467 = icmp slt i32 %cond.i.i1466, %1 %cond.i5.i1468 = select i1 %cmp.i4.i1467, i32 %cond.i.i1466, i32 %1 %incdec.ptr467 = getelementptr inbounds i16, i16* %srcptr.41591, i64 13 - %37 = load i16* %incdec.ptr453, align 2 + %37 = load i16, i16* %incdec.ptr453, align 2 %conv468 = zext i16 %37 to i32 %sub469 = sub nsw i32 %cond.i5.i1468, %conv468 %idxprom470 = sext i32 %sub469 to i64 %arrayidx471 = getelementptr inbounds i32, i32* %cond, i64 %idxprom470 - %38 = load i32* %arrayidx471, align 4 + %38 = load i32, i32* %arrayidx471, align 4 %add472 = add nsw i32 %38, %LineSadBlk3.01586 %incdec.ptr474 = getelementptr inbounds i16, i16* %refptr.11590, i64 14 %add477 = add nsw i32 0, %3 @@ -279,15 +279,15 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1463 = icmp slt i32 %cond.i.i1462, %1 %cond.i5.i1464 = select i1 %cmp.i4.i1463, i32 %cond.i.i1462, i32 %1 %incdec.ptr481 = getelementptr inbounds i16, i16* %srcptr.41591, i64 14 - %39 = load i16* %incdec.ptr467, align 2 + %39 = load i16, i16* %incdec.ptr467, align 2 %conv482 = zext i16 %39 to i32 %sub483 = sub nsw i32 %cond.i5.i1464, %conv482 %idxprom484 = sext i32 %sub483 to i64 %arrayidx485 = getelementptr inbounds i32, i32* %cond, i64 %idxprom484 - %40 = load i32* %arrayidx485, align 4 + %40 = load i32, i32* %arrayidx485, align 4 %add486 = add nsw i32 %add472, %40 %incdec.ptr488 = getelementptr inbounds i16, i16* %refptr.11590, i64 15 - %41 = load i16* %incdec.ptr474, align 2 + %41 = load i16, i16* %incdec.ptr474, align 2 %conv489 = zext i16 %41 to i32 %mul490 = mul nsw i32 %conv489, %2 %add491 = add nsw i32 %mul490, %3 @@ -298,14 +298,14 @@ for.body293: ; preds = %for.body293, %for.c %cmp.i4.i1459 = icmp slt i32 %cond.i.i1458, %1 %cond.i5.i1460 = select i1 %cmp.i4.i1459, i32 %cond.i.i1458, i32 %1 %incdec.ptr495 = getelementptr inbounds i16, i16* %srcptr.41591, i64 15 - %42 = load i16* %incdec.ptr481, align 2 + %42 = load i16, i16* %incdec.ptr481, align 2 %conv496 = zext i16 %42 to i32 %sub497 = sub nsw i32 %cond.i5.i1460, %conv496 %idxprom498 = sext i32 %sub497 to i64 %arrayidx499 = getelementptr inbounds i32, i32* %cond, i64 %idxprom498 - %43 = load i32* %arrayidx499, align 4 + %43 = load i32, i32* %arrayidx499, align 4 %add500 = add nsw i32 %add486, %43 - %44 = load i16* %incdec.ptr488, align 2 + %44 = load i16, i16* %incdec.ptr488, align 2 %conv503 = zext i16 %44 to i32 %mul504 = mul nsw i32 %conv503, %2 %add505 = add nsw i32 %mul504, %3 @@ -315,12 +315,12 @@ for.body293: ; preds = %for.body293, %for.c %cond.i.i1454 = select i1 %cmp.i.i1453, i32 %add507, i32 0 %cmp.i4.i1455 = icmp slt i32 %cond.i.i1454, %1 %cond.i5.i1456 = select i1 %cmp.i4.i1455, i32 %cond.i.i1454, i32 %1 - %45 = load i16* %incdec.ptr495, align 2 + %45 = load i16, i16* %incdec.ptr495, align 2 %conv510 = zext i16 %45 to i32 %sub511 = sub nsw i32 %cond.i5.i1456, %conv510 %idxprom512 = sext i32 %sub511 to i64 %arrayidx513 = getelementptr inbounds i32, i32* %cond, i64 %idxprom512 - %46 = load i32* %arrayidx513, align 4 + %46 = load i32, i32* %arrayidx513, align 4 %add514 = add nsw i32 %add500, %46 %add.ptr517 = getelementptr inbounds i16, i16* %refptr.11590, i64 %incdec.ptr502.sum %exitcond1692 = icmp eq i32 undef, 4 diff --git a/test/CodeGen/PowerPC/crbits.ll b/test/CodeGen/PowerPC/crbits.ll index 06e90019db7..8873c1bd28c 100644 --- a/test/CodeGen/PowerPC/crbits.ll +++ b/test/CodeGen/PowerPC/crbits.ll @@ -145,7 +145,7 @@ entry: define zeroext i32 @exttest8() #0 { entry: - %v0 = load i64* undef, align 8 + %v0 = load i64, i64* undef, align 8 %sub = sub i64 80, %v0 %div = lshr i64 %sub, 1 %conv13 = trunc i64 %div to i32 diff --git a/test/CodeGen/PowerPC/crsave.ll b/test/CodeGen/PowerPC/crsave.ll index 602ba94dc09..8121e1b6e63 100644 --- a/test/CodeGen/PowerPC/crsave.ll +++ b/test/CodeGen/PowerPC/crsave.ll @@ -9,7 +9,7 @@ entry: %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind store i32 %0, i32* %ret, align 4 call void @foo() - %1 = load i32* %ret, align 4 + %1 = load i32, i32* %ret, align 4 ret i32 %1 } @@ -38,7 +38,7 @@ entry: %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind store i32 %0, i32* %ret, align 4 call void @foo() - %1 = load i32* %ret, align 4 + %1 = load i32, i32* %ret, align 4 ret i32 %1 } diff --git a/test/CodeGen/PowerPC/ctrloop-cpsgn.ll b/test/CodeGen/PowerPC/ctrloop-cpsgn.ll index 7bff8d3909a..fcfcf154ef5 100644 --- a/test/CodeGen/PowerPC/ctrloop-cpsgn.ll +++ b/test/CodeGen/PowerPC/ctrloop-cpsgn.ll @@ -11,7 +11,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi ppc_fp128 [ %d, %entry ], [ %conv, %for.body ] %arrayidx = getelementptr inbounds ppc_fp128, ppc_fp128* %n, i32 %i.06 - %0 = load ppc_fp128* %arrayidx, align 8 + %0 = load ppc_fp128, ppc_fp128* %arrayidx, align 8 %conv = tail call ppc_fp128 @copysignl(ppc_fp128 %x.05, ppc_fp128 %d) nounwind readonly %inc = add nsw i32 %i.06, 1 %exitcond = icmp eq i32 %inc, 2048 diff --git a/test/CodeGen/PowerPC/ctrloop-fp64.ll b/test/CodeGen/PowerPC/ctrloop-fp64.ll index b5aeb72c51b..6128d7cbdf6 100644 --- a/test/CodeGen/PowerPC/ctrloop-fp64.ll +++ b/test/CodeGen/PowerPC/ctrloop-fp64.ll @@ -11,7 +11,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi i64 [ 0, %entry ], [ %conv1, %for.body ] %arrayidx = getelementptr inbounds double, double* %n, i32 %i.06 - %0 = load double* %arrayidx, align 8 + %0 = load double, double* %arrayidx, align 8 %conv = sitofp i64 %x.05 to double %add = fadd double %conv, %0 %conv1 = fptosi double %add to i64 @@ -31,7 +31,7 @@ for.end: ; preds = %for.body define i32 @main(i32 %argc, i8** nocapture %argv) { entry: - %0 = load double* @init_value, align 8 + %0 = load double, double* @init_value, align 8 %conv = fptosi double %0 to i64 %broadcast.splatinsert.i = insertelement <2 x i64> undef, i64 %conv, i32 0 %broadcast.splat.i = shufflevector <2 x i64> %broadcast.splatinsert.i, <2 x i64> undef, <2 x i32> zeroinitializer diff --git a/test/CodeGen/PowerPC/ctrloop-i64.ll b/test/CodeGen/PowerPC/ctrloop-i64.ll index 6aa3dba68a5..5c66a6865ae 100644 --- a/test/CodeGen/PowerPC/ctrloop-i64.ll +++ b/test/CodeGen/PowerPC/ctrloop-i64.ll @@ -11,7 +11,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi i64 [ 0, %entry ], [ %conv1, %for.body ] %arrayidx = getelementptr inbounds i64, i64* %n, i32 %i.06 - %0 = load i64* %arrayidx, align 8 + %0 = load i64, i64* %arrayidx, align 8 %conv = udiv i64 %x.05, %d %conv1 = add i64 %conv, %0 %inc = add nsw i32 %i.06, 1 @@ -33,7 +33,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi i64 [ 0, %entry ], [ %conv1, %for.body ] %arrayidx = getelementptr inbounds i64, i64* %n, i32 %i.06 - %0 = load i64* %arrayidx, align 8 + %0 = load i64, i64* %arrayidx, align 8 %conv = sdiv i64 %x.05, %d %conv1 = add i64 %conv, %0 %inc = add nsw i32 %i.06, 1 @@ -55,7 +55,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi i64 [ 0, %entry ], [ %conv1, %for.body ] %arrayidx = getelementptr inbounds i64, i64* %n, i32 %i.06 - %0 = load i64* %arrayidx, align 8 + %0 = load i64, i64* %arrayidx, align 8 %conv = urem i64 %x.05, %d %conv1 = add i64 %conv, %0 %inc = add nsw i32 %i.06, 1 @@ -77,7 +77,7 @@ for.body: ; preds = %for.body, %entry %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %x.05 = phi i64 [ 0, %entry ], [ %conv1, %for.body ] %arrayidx = getelementptr inbounds i64, i64* %n, i32 %i.06 - %0 = load i64* %arrayidx, align 8 + %0 = load i64, i64* %arrayidx, align 8 %conv = srem i64 %x.05, %d %conv1 = add i64 %conv, %0 %inc = add nsw i32 %i.06, 1 diff --git a/test/CodeGen/PowerPC/ctrloop-le.ll b/test/CodeGen/PowerPC/ctrloop-le.ll index e6b745d0d44..bef04370324 100644 --- a/test/CodeGen/PowerPC/ctrloop-le.ll +++ b/test/CodeGen/PowerPC/ctrloop-le.ll @@ -19,7 +19,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 28395, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -48,7 +48,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 9073, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -77,7 +77,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 21956, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -106,7 +106,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 16782, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -135,7 +135,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 19097, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -164,7 +164,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -193,7 +193,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -222,7 +222,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -251,7 +251,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -280,7 +280,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -310,7 +310,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -340,7 +340,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -370,7 +370,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -400,7 +400,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -430,7 +430,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 diff --git a/test/CodeGen/PowerPC/ctrloop-lt.ll b/test/CodeGen/PowerPC/ctrloop-lt.ll index d1ab3763f5f..fa910aab4e0 100644 --- a/test/CodeGen/PowerPC/ctrloop-lt.ll +++ b/test/CodeGen/PowerPC/ctrloop-lt.ll @@ -19,7 +19,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 8531, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -49,7 +49,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 9152, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -79,7 +79,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 18851, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -108,7 +108,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 25466, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -137,7 +137,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 9295, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -166,7 +166,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -195,7 +195,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -224,7 +224,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -253,7 +253,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -282,7 +282,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -311,7 +311,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -340,7 +340,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -369,7 +369,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -398,7 +398,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -427,7 +427,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 diff --git a/test/CodeGen/PowerPC/ctrloop-ne.ll b/test/CodeGen/PowerPC/ctrloop-ne.ll index d51e8777735..13a9909c3d6 100644 --- a/test/CodeGen/PowerPC/ctrloop-ne.ll +++ b/test/CodeGen/PowerPC/ctrloop-ne.ll @@ -16,7 +16,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 32623, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -46,7 +46,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 29554, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -76,7 +76,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 15692, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -106,7 +106,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 10449, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -136,7 +136,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ 32087, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -165,7 +165,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -195,7 +195,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -225,7 +225,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -255,7 +255,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -285,7 +285,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -314,7 +314,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -344,7 +344,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -374,7 +374,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -404,7 +404,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 @@ -434,7 +434,7 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds i8, i8* %p, i32 %i.04 - %0 = load i8* %arrayidx, align 1 + %0 = load i8, i8* %arrayidx, align 1 %conv = zext i8 %0 to i32 %add = add nsw i32 %conv, 1 %conv1 = trunc i32 %add to i8 diff --git a/test/CodeGen/PowerPC/ctrloop-s000.ll b/test/CodeGen/PowerPC/ctrloop-s000.ll index bfb61ca28e1..4b42d2edb5d 100644 --- a/test/CodeGen/PowerPC/ctrloop-s000.ll +++ b/test/CodeGen/PowerPC/ctrloop-s000.ll @@ -36,97 +36,97 @@ for.cond1.preheader: ; preds = %for.end, %entry for.body3: ; preds = %for.body3, %for.cond1.preheader %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next.15, %for.body3 ] %arrayidx = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv - %0 = load double* %arrayidx, align 32 + %0 = load double, double* %arrayidx, align 32 %add = fadd double %0, 1.000000e+00 %arrayidx5 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv store double %add, double* %arrayidx5, align 32 %indvars.iv.next11 = or i64 %indvars.iv, 1 %arrayidx.1 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next11 - %1 = load double* %arrayidx.1, align 8 + %1 = load double, double* %arrayidx.1, align 8 %add.1 = fadd double %1, 1.000000e+00 %arrayidx5.1 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next11 store double %add.1, double* %arrayidx5.1, align 8 %indvars.iv.next.112 = or i64 %indvars.iv, 2 %arrayidx.2 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.112 - %2 = load double* %arrayidx.2, align 16 + %2 = load double, double* %arrayidx.2, align 16 %add.2 = fadd double %2, 1.000000e+00 %arrayidx5.2 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.112 store double %add.2, double* %arrayidx5.2, align 16 %indvars.iv.next.213 = or i64 %indvars.iv, 3 %arrayidx.3 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.213 - %3 = load double* %arrayidx.3, align 8 + %3 = load double, double* %arrayidx.3, align 8 %add.3 = fadd double %3, 1.000000e+00 %arrayidx5.3 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.213 store double %add.3, double* %arrayidx5.3, align 8 %indvars.iv.next.314 = or i64 %indvars.iv, 4 %arrayidx.4 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.314 - %4 = load double* %arrayidx.4, align 32 + %4 = load double, double* %arrayidx.4, align 32 %add.4 = fadd double %4, 1.000000e+00 %arrayidx5.4 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.314 store double %add.4, double* %arrayidx5.4, align 32 %indvars.iv.next.415 = or i64 %indvars.iv, 5 %arrayidx.5 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.415 - %5 = load double* %arrayidx.5, align 8 + %5 = load double, double* %arrayidx.5, align 8 %add.5 = fadd double %5, 1.000000e+00 %arrayidx5.5 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.415 store double %add.5, double* %arrayidx5.5, align 8 %indvars.iv.next.516 = or i64 %indvars.iv, 6 %arrayidx.6 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.516 - %6 = load double* %arrayidx.6, align 16 + %6 = load double, double* %arrayidx.6, align 16 %add.6 = fadd double %6, 1.000000e+00 %arrayidx5.6 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.516 store double %add.6, double* %arrayidx5.6, align 16 %indvars.iv.next.617 = or i64 %indvars.iv, 7 %arrayidx.7 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.617 - %7 = load double* %arrayidx.7, align 8 + %7 = load double, double* %arrayidx.7, align 8 %add.7 = fadd double %7, 1.000000e+00 %arrayidx5.7 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.617 store double %add.7, double* %arrayidx5.7, align 8 %indvars.iv.next.718 = or i64 %indvars.iv, 8 %arrayidx.8 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.718 - %8 = load double* %arrayidx.8, align 32 + %8 = load double, double* %arrayidx.8, align 32 %add.8 = fadd double %8, 1.000000e+00 %arrayidx5.8 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.718 store double %add.8, double* %arrayidx5.8, align 32 %indvars.iv.next.819 = or i64 %indvars.iv, 9 %arrayidx.9 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.819 - %9 = load double* %arrayidx.9, align 8 + %9 = load double, double* %arrayidx.9, align 8 %add.9 = fadd double %9, 1.000000e+00 %arrayidx5.9 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.819 store double %add.9, double* %arrayidx5.9, align 8 %indvars.iv.next.920 = or i64 %indvars.iv, 10 %arrayidx.10 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.920 - %10 = load double* %arrayidx.10, align 16 + %10 = load double, double* %arrayidx.10, align 16 %add.10 = fadd double %10, 1.000000e+00 %arrayidx5.10 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.920 store double %add.10, double* %arrayidx5.10, align 16 %indvars.iv.next.1021 = or i64 %indvars.iv, 11 %arrayidx.11 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1021 - %11 = load double* %arrayidx.11, align 8 + %11 = load double, double* %arrayidx.11, align 8 %add.11 = fadd double %11, 1.000000e+00 %arrayidx5.11 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1021 store double %add.11, double* %arrayidx5.11, align 8 %indvars.iv.next.1122 = or i64 %indvars.iv, 12 %arrayidx.12 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1122 - %12 = load double* %arrayidx.12, align 32 + %12 = load double, double* %arrayidx.12, align 32 %add.12 = fadd double %12, 1.000000e+00 %arrayidx5.12 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1122 store double %add.12, double* %arrayidx5.12, align 32 %indvars.iv.next.1223 = or i64 %indvars.iv, 13 %arrayidx.13 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1223 - %13 = load double* %arrayidx.13, align 8 + %13 = load double, double* %arrayidx.13, align 8 %add.13 = fadd double %13, 1.000000e+00 %arrayidx5.13 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1223 store double %add.13, double* %arrayidx5.13, align 8 %indvars.iv.next.1324 = or i64 %indvars.iv, 14 %arrayidx.14 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1324 - %14 = load double* %arrayidx.14, align 16 + %14 = load double, double* %arrayidx.14, align 16 %add.14 = fadd double %14, 1.000000e+00 %arrayidx5.14 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1324 store double %add.14, double* %arrayidx5.14, align 16 %indvars.iv.next.1425 = or i64 %indvars.iv, 15 %arrayidx.15 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1425 - %15 = load double* %arrayidx.15, align 8 + %15 = load double, double* %arrayidx.15, align 8 %add.15 = fadd double %15, 1.000000e+00 %arrayidx5.15 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1425 store double %add.15, double* %arrayidx5.15, align 8 diff --git a/test/CodeGen/PowerPC/ctrloop-sh.ll b/test/CodeGen/PowerPC/ctrloop-sh.ll index d8e6fc79a66..540f0d6b57e 100644 --- a/test/CodeGen/PowerPC/ctrloop-sh.ll +++ b/test/CodeGen/PowerPC/ctrloop-sh.ll @@ -9,8 +9,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = shl i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 @@ -31,8 +31,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = ashr i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 @@ -53,8 +53,8 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load i128* %b, align 16 - %1 = load i128* %c, align 16 + %0 = load i128, i128* %b, align 16 + %1 = load i128, i128* %c, align 16 %shl = lshr i128 %0, %1 store i128 %shl, i128* %a, align 16 %inc = add nsw i32 %i.02, 1 diff --git a/test/CodeGen/PowerPC/ctrloop-sums.ll b/test/CodeGen/PowerPC/ctrloop-sums.ll index 8b9d691968a..fa5e8d9a86e 100644 --- a/test/CodeGen/PowerPC/ctrloop-sums.ll +++ b/test/CodeGen/PowerPC/ctrloop-sums.ll @@ -24,7 +24,7 @@ for.body3.us: ; preds = %for.body3.us, %for. %indvars.iv = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next, %for.body3.us ] %Result.111.us = phi i32 [ %Result.014.us, %for.body3.lr.ph.us ], [ %add.us, %for.body3.us ] %arrayidx5.us = getelementptr inbounds [100 x i32], [100 x i32]* %Array, i64 %indvars.iv16, i64 %indvars.iv - %0 = load i32* %arrayidx5.us, align 4 + %0 = load i32, i32* %arrayidx5.us, align 4 %add.us = add nsw i32 %0, %Result.111.us %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 @@ -106,7 +106,7 @@ for.body3.us.i: ; preds = %for.body3.lr.ph.us. %indvars.iv.i = phi i64 [ 0, %for.body3.lr.ph.us.i ], [ %indvars.iv.next.i, %for.body3.us.i ] %Result.111.us.i = phi i32 [ %Result.014.us.i, %for.body3.lr.ph.us.i ], [ %add.us.i, %for.body3.us.i ] %arrayidx5.us.i = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* %Array, i64 0, i64 %indvars.iv16.i, i64 %indvars.iv.i - %5 = load i32* %arrayidx5.us.i, align 4 + %5 = load i32, i32* %arrayidx5.us.i, align 4 %add.us.i = add nsw i32 %5, %Result.111.us.i %indvars.iv.next.i = add i64 %indvars.iv.i, 1 %lftr.wideiv = trunc i64 %indvars.iv.next.i to i32 diff --git a/test/CodeGen/PowerPC/ctrloops.ll b/test/CodeGen/PowerPC/ctrloops.ll index ccab7cb7a0b..fff9e20d262 100644 --- a/test/CodeGen/PowerPC/ctrloops.ll +++ b/test/CodeGen/PowerPC/ctrloops.ll @@ -10,7 +10,7 @@ entry: for.body: ; preds = %for.body, %entry %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load volatile i32* @a, align 4 + %0 = load volatile i32, i32* @a, align 4 %add = add nsw i32 %0, %c store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.01, 1 @@ -34,7 +34,7 @@ entry: for.body: ; preds = %entry, %for.body %i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ] - %0 = load volatile i32* @a, align 4 + %0 = load volatile i32, i32* @a, align 4 %add = add nsw i32 %0, %c store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.02, 1 @@ -58,7 +58,7 @@ entry: for.body: ; preds = %entry, %for.body %i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ] %mul = mul nsw i32 %i.02, %c - %0 = load volatile i32* @a, align 4 + %0 = load volatile i32, i32* @a, align 4 %add = add nsw i32 %0, %mul store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.02, 1 diff --git a/test/CodeGen/PowerPC/dcbt-sched.ll b/test/CodeGen/PowerPC/dcbt-sched.ll index dfa1b75bd7d..51d58b47ee9 100644 --- a/test/CodeGen/PowerPC/dcbt-sched.ll +++ b/test/CodeGen/PowerPC/dcbt-sched.ll @@ -4,9 +4,9 @@ target triple = "powerpc64-unknown-linux-gnu" define i8 @test1(i8* noalias %a, i8* noalias %b, i8* noalias %c) nounwind { entry: - %q = load i8* %b + %q = load i8, i8* %b call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 1) - %r = load i8* %c + %r = load i8, i8* %c %s = add i8 %q, %r ret i8 %s } diff --git a/test/CodeGen/PowerPC/delete-node.ll b/test/CodeGen/PowerPC/delete-node.ll index 388c90233dd..999af54a8a9 100644 --- a/test/CodeGen/PowerPC/delete-node.ll +++ b/test/CodeGen/PowerPC/delete-node.ll @@ -9,11 +9,11 @@ entry: br label %bb1 bb1: ; preds = %bb1, %entry - %0 = load i16* null, align 2 ; <i16> [#uses=1] + %0 = load i16, i16* null, align 2 ; <i16> [#uses=1] %1 = ashr i16 %0, 4 ; <i16> [#uses=1] %2 = sext i16 %1 to i32 ; <i32> [#uses=1] %3 = getelementptr i8, i8* null, i32 %2 ; <i8*> [#uses=1] - %4 = load i8* %3, align 1 ; <i8> [#uses=1] + %4 = load i8, i8* %3, align 1 ; <i8> [#uses=1] %5 = zext i8 %4 to i32 ; <i32> [#uses=1] %6 = shl i32 %5, 24 ; <i32> [#uses=1] %7 = or i32 0, %6 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/dyn-alloca-aligned.ll b/test/CodeGen/PowerPC/dyn-alloca-aligned.ll index e74399706f1..98b0a175f36 100644 --- a/test/CodeGen/PowerPC/dyn-alloca-aligned.ll +++ b/test/CodeGen/PowerPC/dyn-alloca-aligned.ll @@ -12,10 +12,10 @@ entry: %vla = alloca i32, i64 %0, align 128 %vla1 = alloca i32, i64 %0, align 128 %a2 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 - %1 = load i32* %a2, align 4 + %1 = load i32, i32* %a2, align 4 store i32 %1, i32* %vla1, align 128 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 - %2 = load i32* %b, align 4 + %2 = load i32, i32* %b, align 4 %arrayidx3 = getelementptr inbounds i32, i32* %vla1, i64 1 store i32 %2, i32* %arrayidx3, align 4 call void @bar(i32* %vla1, i32* %vla) #0 diff --git a/test/CodeGen/PowerPC/emptystruct.ll b/test/CodeGen/PowerPC/emptystruct.ll index 47cfadd0a7b..66cada14f9d 100644 --- a/test/CodeGen/PowerPC/emptystruct.ll +++ b/test/CodeGen/PowerPC/emptystruct.ll @@ -18,7 +18,7 @@ define void @callee(%struct.empty* noalias sret %agg.result, %struct.empty* byva entry: %a2.addr = alloca %struct.empty*, align 8 store %struct.empty* %a2, %struct.empty** %a2.addr, align 8 - %0 = load %struct.empty** %a2.addr, align 8 + %0 = load %struct.empty*, %struct.empty** %a2.addr, align 8 %1 = bitcast %struct.empty* %agg.result to i8* %2 = bitcast %struct.empty* %0 to i8* call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %2, i64 0, i32 1, i1 false) diff --git a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll index f99089b3bb0..f90eccb359a 100644 --- a/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll +++ b/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll @@ -69,9 +69,9 @@ define i32 @NAND1(i32 %X, i32 %Y) nounwind { } define void @VNOR(<4 x float>* %P, <4 x float>* %Q) nounwind { - %tmp = load <4 x float>* %P ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %P ; <<4 x float>> [#uses=1] %tmp.upgrd.1 = bitcast <4 x float> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp2 = load <4 x float>* %Q ; <<4 x float>> [#uses=1] + %tmp2 = load <4 x float>, <4 x float>* %Q ; <<4 x float>> [#uses=1] %tmp2.upgrd.2 = bitcast <4 x float> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp3 = or <4 x i32> %tmp.upgrd.1, %tmp2.upgrd.2 ; <<4 x i32>> [#uses=1] %tmp4 = xor <4 x i32> %tmp3, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] @@ -81,9 +81,9 @@ define void @VNOR(<4 x float>* %P, <4 x float>* %Q) nounwind { } define void @VANDC(<4 x float>* %P, <4 x float>* %Q) nounwind { - %tmp = load <4 x float>* %P ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %P ; <<4 x float>> [#uses=1] %tmp.upgrd.4 = bitcast <4 x float> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp2 = load <4 x float>* %Q ; <<4 x float>> [#uses=1] + %tmp2 = load <4 x float>, <4 x float>* %Q ; <<4 x float>> [#uses=1] %tmp2.upgrd.5 = bitcast <4 x float> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp4 = xor <4 x i32> %tmp2.upgrd.5, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] %tmp3 = and <4 x i32> %tmp.upgrd.4, %tmp4 ; <<4 x i32>> [#uses=1] diff --git a/test/CodeGen/PowerPC/fast-isel-GEP-coalesce.ll b/test/CodeGen/PowerPC/fast-isel-GEP-coalesce.ll index 4b4093033e5..92f986efd52 100644 --- a/test/CodeGen/PowerPC/fast-isel-GEP-coalesce.ll +++ b/test/CodeGen/PowerPC/fast-isel-GEP-coalesce.ll @@ -13,7 +13,7 @@ entry: %addr = alloca i32*, align 4 store i32* getelementptr inbounds ([2 x [2 x [2 x [2 x [2 x i32]]]]]* @arr, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1), i32** %addr, align 4 ; ELF64: addi {{[0-9]+}}, {{[0-9]+}}, 124 - %0 = load i32** %addr, align 4 + %0 = load i32*, i32** %addr, align 4 ret i32* %0 } @@ -23,7 +23,7 @@ entry: %addr = alloca i32*, align 4 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), i32** %addr, align 4 ; ELF64: addi {{[0-9]+}}, {{[0-9]+}}, 1148 - %0 = load i32** %addr, align 4 + %0 = load i32*, i32** %addr, align 4 ret i32* %0 } @@ -33,7 +33,7 @@ entry: %addr = alloca i32*, align 4 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1), i32** %addr, align 4 ; ELF64: addi {{[0-9]+}}, {{[0-9]+}}, 140 - %0 = load i32** %addr, align 4 + %0 = load i32*, i32** %addr, align 4 ret i32* %0 } @@ -43,6 +43,6 @@ entry: %addr = alloca i32*, align 4 store i32* getelementptr inbounds ([2 x [2 x [2 x %struct.B]]]* @B, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 3, i32 1, i32 2, i32 1), i32** %addr, align 4 ; ELF64: addi {{[0-9]+}}, {{[0-9]+}}, 1284 - %0 = load i32** %addr, align 4 + %0 = load i32*, i32** %addr, align 4 ret i32* %0 } diff --git a/test/CodeGen/PowerPC/fast-isel-call.ll b/test/CodeGen/PowerPC/fast-isel-call.ll index dac71c5aab9..64d8f6e7919 100644 --- a/test/CodeGen/PowerPC/fast-isel-call.ll +++ b/test/CodeGen/PowerPC/fast-isel-call.ll @@ -85,7 +85,7 @@ define i32 @bar0(i32 %i) nounwind { ;define void @foo3() uwtable { ; %fptr = alloca i32 (i32)*, align 8 ; store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8 -; %1 = load i32 (i32)** %fptr, align 8 +; %1 = load i32 (i32)*, i32 (i32)** %fptr, align 8 ; %call = call i32 %1(i32 0) ; ret void ;} diff --git a/test/CodeGen/PowerPC/fast-isel-fold.ll b/test/CodeGen/PowerPC/fast-isel-fold.ll index cdc4c0adb0e..e56101a28e2 100644 --- a/test/CodeGen/PowerPC/fast-isel-fold.ll +++ b/test/CodeGen/PowerPC/fast-isel-fold.ll @@ -6,7 +6,7 @@ define void @t1() nounwind uwtable ssp { ; ELF64: t1 - %1 = load i8* @a, align 1 + %1 = load i8, i8* @a, align 1 call void @foo1(i8 zeroext %1) ; ELF64: lbz ; ELF64-NOT: rldicl @@ -16,7 +16,7 @@ define void @t1() nounwind uwtable ssp { define void @t2() nounwind uwtable ssp { ; ELF64: t2 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 call void @foo2(i16 zeroext %1) ; ELF64: lhz ; ELF64-NOT: rldicl @@ -26,7 +26,7 @@ define void @t2() nounwind uwtable ssp { define void @t2a() nounwind uwtable ssp { ; ELF64: t2a - %1 = load i32* @c, align 4 + %1 = load i32, i32* @c, align 4 call void @foo3(i32 zeroext %1) ; ELF64: lwz ; ELF64-NOT: rldicl @@ -40,7 +40,7 @@ declare void @foo3(i32 zeroext) define i32 @t3() nounwind uwtable ssp { ; ELF64: t3 - %1 = load i8* @a, align 1 + %1 = load i8, i8* @a, align 1 %2 = zext i8 %1 to i32 ; ELF64: lbz ; ELF64-NOT: rlwinm @@ -49,7 +49,7 @@ define i32 @t3() nounwind uwtable ssp { define i32 @t4() nounwind uwtable ssp { ; ELF64: t4 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 %2 = zext i16 %1 to i32 ; ELF64: lhz ; ELF64-NOT: rlwinm @@ -58,7 +58,7 @@ define i32 @t4() nounwind uwtable ssp { define i32 @t5() nounwind uwtable ssp { ; ELF64: t5 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 %2 = sext i16 %1 to i32 ; ELF64: lha ; ELF64-NOT: rlwinm @@ -67,7 +67,7 @@ define i32 @t5() nounwind uwtable ssp { define i32 @t6() nounwind uwtable ssp { ; ELF64: t6 - %1 = load i8* @a, align 2 + %1 = load i8, i8* @a, align 2 %2 = sext i8 %1 to i32 ; ELF64: lbz ; ELF64-NOT: rlwinm @@ -76,7 +76,7 @@ define i32 @t6() nounwind uwtable ssp { define i64 @t7() nounwind uwtable ssp { ; ELF64: t7 - %1 = load i8* @a, align 1 + %1 = load i8, i8* @a, align 1 %2 = zext i8 %1 to i64 ; ELF64: lbz ; ELF64-NOT: rldicl @@ -85,7 +85,7 @@ define i64 @t7() nounwind uwtable ssp { define i64 @t8() nounwind uwtable ssp { ; ELF64: t8 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 %2 = zext i16 %1 to i64 ; ELF64: lhz ; ELF64-NOT: rldicl @@ -94,7 +94,7 @@ define i64 @t8() nounwind uwtable ssp { define i64 @t9() nounwind uwtable ssp { ; ELF64: t9 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 %2 = sext i16 %1 to i64 ; ELF64: lha ; ELF64-NOT: extsh @@ -103,7 +103,7 @@ define i64 @t9() nounwind uwtable ssp { define i64 @t10() nounwind uwtable ssp { ; ELF64: t10 - %1 = load i8* @a, align 2 + %1 = load i8, i8* @a, align 2 %2 = sext i8 %1 to i64 ; ELF64: lbz ; ELF64: extsb @@ -112,7 +112,7 @@ define i64 @t10() nounwind uwtable ssp { define i64 @t11() nounwind uwtable ssp { ; ELF64: t11 - %1 = load i32* @c, align 4 + %1 = load i32, i32* @c, align 4 %2 = zext i32 %1 to i64 ; ELF64: lwz ; ELF64-NOT: rldicl @@ -121,7 +121,7 @@ define i64 @t11() nounwind uwtable ssp { define i64 @t12() nounwind uwtable ssp { ; ELF64: t12 - %1 = load i32* @c, align 4 + %1 = load i32, i32* @c, align 4 %2 = sext i32 %1 to i64 ; ELF64: lwa ; ELF64-NOT: extsw diff --git a/test/CodeGen/PowerPC/fast-isel-load-store.ll b/test/CodeGen/PowerPC/fast-isel-load-store.ll index cf53d6bc50a..ec4b0dcd874 100644 --- a/test/CodeGen/PowerPC/fast-isel-load-store.ll +++ b/test/CodeGen/PowerPC/fast-isel-load-store.ll @@ -26,7 +26,7 @@ define i8 @t1() nounwind uwtable ssp { ; ELF64: t1 - %1 = load i8* @a, align 1 + %1 = load i8, i8* @a, align 1 ; ELF64: lbz %2 = add nsw i8 %1, 1 ; ELF64: addi @@ -35,7 +35,7 @@ define i8 @t1() nounwind uwtable ssp { define i16 @t2() nounwind uwtable ssp { ; ELF64: t2 - %1 = load i16* @b, align 2 + %1 = load i16, i16* @b, align 2 ; ELF64: lhz %2 = add nsw i16 %1, 1 ; ELF64: addi @@ -44,7 +44,7 @@ define i16 @t2() nounwind uwtable ssp { define i32 @t3() nounwind uwtable ssp { ; ELF64: t3 - %1 = load i32* @c, align 4 + %1 = load i32, i32* @c, align 4 ; ELF64: lwz %2 = add nsw i32 %1, 1 ; ELF64: addi @@ -53,7 +53,7 @@ define i32 @t3() nounwind uwtable ssp { define i64 @t4() nounwind uwtable ssp { ; ELF64: t4 - %1 = load i64* @d, align 4 + %1 = load i64, i64* @d, align 4 ; ELF64: ld %2 = add nsw i64 %1, 1 ; ELF64: addi @@ -62,7 +62,7 @@ define i64 @t4() nounwind uwtable ssp { define float @t5() nounwind uwtable ssp { ; ELF64: t5 - %1 = load float* @e, align 4 + %1 = load float, float* @e, align 4 ; ELF64: lfs %2 = fadd float %1, 1.0 ; ELF64: fadds @@ -71,7 +71,7 @@ define float @t5() nounwind uwtable ssp { define double @t6() nounwind uwtable ssp { ; ELF64: t6 - %1 = load double* @f, align 8 + %1 = load double, double* @f, align 8 ; ELF64: lfd %2 = fadd double %1, 1.0 ; ELF64: fadd @@ -145,7 +145,7 @@ define void @t12(double %v) nounwind uwtable ssp { ;; lwa requires an offset divisible by 4, so we need lwax here. define i64 @t13() nounwind uwtable ssp { ; ELF64: t13 - %1 = load i32* getelementptr inbounds (%struct.s* @g, i32 0, i32 1), align 1 + %1 = load i32, i32* getelementptr inbounds (%struct.s* @g, i32 0, i32 1), align 1 %2 = sext i32 %1 to i64 ; ELF64: li ; ELF64: lwax @@ -157,7 +157,7 @@ define i64 @t13() nounwind uwtable ssp { ;; ld requires an offset divisible by 4, so we need ldx here. define i64 @t14() nounwind uwtable ssp { ; ELF64: t14 - %1 = load i64* getelementptr inbounds (%struct.t* @h, i32 0, i32 1), align 1 + %1 = load i64, i64* getelementptr inbounds (%struct.t* @h, i32 0, i32 1), align 1 ; ELF64: li ; ELF64: ldx %2 = add nsw i64 %1, 1 @@ -181,7 +181,7 @@ define void @t15(i64 %v) nounwind uwtable ssp { ;; ld requires an offset that fits in 16 bits, so we need ldx here. define i64 @t16() nounwind uwtable ssp { ; ELF64: t16 - %1 = load i64* getelementptr inbounds ([8192 x i64]* @i, i32 0, i64 5000), align 8 + %1 = load i64, i64* getelementptr inbounds ([8192 x i64]* @i, i32 0, i64 5000), align 8 ; ELF64: lis ; ELF64: ori ; ELF64: ldx diff --git a/test/CodeGen/PowerPC/fast-isel-redefinition.ll b/test/CodeGen/PowerPC/fast-isel-redefinition.ll index aa257863512..60706a6e143 100644 --- a/test/CodeGen/PowerPC/fast-isel-redefinition.ll +++ b/test/CodeGen/PowerPC/fast-isel-redefinition.ll @@ -5,6 +5,6 @@ define i32 @f(i32* %x) nounwind ssp { %y = getelementptr inbounds i32, i32* %x, i32 5000 - %tmp103 = load i32* %y, align 4 + %tmp103 = load i32, i32* %y, align 4 ret i32 %tmp103 } diff --git a/test/CodeGen/PowerPC/fastisel-gep-promote-before-add.ll b/test/CodeGen/PowerPC/fastisel-gep-promote-before-add.ll index fdedc5d3d86..96cf67c869f 100644 --- a/test/CodeGen/PowerPC/fastisel-gep-promote-before-add.ll +++ b/test/CodeGen/PowerPC/fastisel-gep-promote-before-add.ll @@ -6,12 +6,12 @@ define zeroext i8 @gep_promotion(i8* %ptr) nounwind uwtable ssp { entry: %ptr.addr = alloca i8*, align 8 %add = add i8 64, 64 ; 0x40 + 0x40 - %0 = load i8** %ptr.addr, align 8 + %0 = load i8*, i8** %ptr.addr, align 8 ; CHECK-LABEL: gep_promotion: ; CHECK: lbz {{[0-9]+}}, 0({{.*}}) %arrayidx = getelementptr inbounds i8, i8* %0, i8 %add - %1 = load i8* %arrayidx, align 1 + %1 = load i8, i8* %arrayidx, align 1 ret i8 %1 } diff --git a/test/CodeGen/PowerPC/floatPSA.ll b/test/CodeGen/PowerPC/floatPSA.ll index f14c73630a6..cff95d591c9 100644 --- a/test/CodeGen/PowerPC/floatPSA.ll +++ b/test/CodeGen/PowerPC/floatPSA.ll @@ -37,7 +37,7 @@ entry: store float %l, float* %l.addr, align 4 store float %m, float* %m.addr, align 4 store float %n, float* %n.addr, align 4 - %0 = load float* %n.addr, align 4 + %0 = load float, float* %n.addr, align 4 ret float %0 } @@ -73,20 +73,20 @@ entry: store float 1.200000e+01, float* %l, align 4 store float 1.300000e+01, float* %m, align 4 store float 1.400000e+01, float* %n, align 4 - %0 = load float* %a, align 4 - %1 = load float* %b, align 4 - %2 = load float* %c, align 4 - %3 = load float* %d, align 4 - %4 = load float* %e, align 4 - %5 = load float* %f, align 4 - %6 = load float* %g, align 4 - %7 = load float* %h, align 4 - %8 = load float* %i, align 4 - %9 = load float* %j, align 4 - %10 = load float* %k, align 4 - %11 = load float* %l, align 4 - %12 = load float* %m, align 4 - %13 = load float* %n, align 4 + %0 = load float, float* %a, align 4 + %1 = load float, float* %b, align 4 + %2 = load float, float* %c, align 4 + %3 = load float, float* %d, align 4 + %4 = load float, float* %e, align 4 + %5 = load float, float* %f, align 4 + %6 = load float, float* %g, align 4 + %7 = load float, float* %h, align 4 + %8 = load float, float* %i, align 4 + %9 = load float, float* %j, align 4 + %10 = load float, float* %k, align 4 + %11 = load float, float* %l, align 4 + %12 = load float, float* %m, align 4 + %13 = load float, float* %n, align 4 %call = call float @bar(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) ret float %call } diff --git a/test/CodeGen/PowerPC/flt-preinc.ll b/test/CodeGen/PowerPC/flt-preinc.ll index a0ea01e1275..c0e3d3a21e1 100644 --- a/test/CodeGen/PowerPC/flt-preinc.ll +++ b/test/CodeGen/PowerPC/flt-preinc.ll @@ -7,10 +7,10 @@ define float @tf(float* nocapture readonly %i, i32 signext %o) #0 { entry: %idx.ext = sext i32 %o to i64 %add.ptr = getelementptr inbounds float, float* %i, i64 %idx.ext - %0 = load float* %add.ptr, align 4 + %0 = load float, float* %add.ptr, align 4 %add.ptr.sum = add nsw i64 %idx.ext, 1 %add.ptr3 = getelementptr inbounds float, float* %i, i64 %add.ptr.sum - %1 = load float* %add.ptr3, align 4 + %1 = load float, float* %add.ptr3, align 4 %add = fadd float %0, %1 ret float %add @@ -24,10 +24,10 @@ define double @td(double* nocapture readonly %i, i32 signext %o) #0 { entry: %idx.ext = sext i32 %o to i64 %add.ptr = getelementptr inbounds double, double* %i, i64 %idx.ext - %0 = load double* %add.ptr, align 8 + %0 = load double, double* %add.ptr, align 8 %add.ptr.sum = add nsw i64 %idx.ext, 1 %add.ptr3 = getelementptr inbounds double, double* %i, i64 %add.ptr.sum - %1 = load double* %add.ptr3, align 8 + %1 = load double, double* %add.ptr3, align 8 %add = fadd double %0, %1 ret double %add diff --git a/test/CodeGen/PowerPC/fp-to-int-ext.ll b/test/CodeGen/PowerPC/fp-to-int-ext.ll index bfacd89ca1a..393fe04d41c 100644 --- a/test/CodeGen/PowerPC/fp-to-int-ext.ll +++ b/test/CodeGen/PowerPC/fp-to-int-ext.ll @@ -5,7 +5,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: nounwind define double @foo1(i32* %x) #0 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %conv = sext i32 %0 to i64 %conv1 = sitofp i64 %conv to double ret double %conv1 @@ -18,7 +18,7 @@ entry: define double @foo2(i32* %x) #0 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %conv = zext i32 %0 to i64 %conv1 = sitofp i64 %conv to double ret double %conv1 @@ -31,7 +31,7 @@ entry: define double @foo3(i32* %x) #0 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %1 = add i32 %0, 8 %conv = zext i32 %1 to i64 %conv1 = sitofp i64 %conv to double @@ -49,7 +49,7 @@ entry: define double @foo4(i32* %x) #0 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %1 = add i32 %0, 8 %conv = sext i32 %1 to i64 %conv1 = sitofp i64 %conv to double diff --git a/test/CodeGen/PowerPC/frounds.ll b/test/CodeGen/PowerPC/frounds.ll index 8eeadc3a346..49f3465e9e2 100644 --- a/test/CodeGen/PowerPC/frounds.ll +++ b/test/CodeGen/PowerPC/frounds.ll @@ -7,12 +7,12 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %tmp1 = call i32 @llvm.flt.rounds( ) ; <i32> [#uses=1] store i32 %tmp1, i32* %tmp, align 4 - %tmp2 = load i32* %tmp, align 4 ; <i32> [#uses=1] + %tmp2 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1] store i32 %tmp2, i32* %retval, align 4 br label %return return: ; preds = %entry - %retval3 = load i32* %retval ; <i32> [#uses=1] + %retval3 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval3 } diff --git a/test/CodeGen/PowerPC/glob-comp-aa-crash.ll b/test/CodeGen/PowerPC/glob-comp-aa-crash.ll index 1f3fec85969..66df6bb8669 100644 --- a/test/CodeGen/PowerPC/glob-comp-aa-crash.ll +++ b/test/CodeGen/PowerPC/glob-comp-aa-crash.ll @@ -65,12 +65,12 @@ lpad3: ; preds = %if.then br label %ehcleanup if.end: ; preds = %invoke.cont - %7 = load i8* %__owns_.i.i, align 8, !tbaa !6, !range !4 + %7 = load i8, i8* %__owns_.i.i, align 8, !tbaa !6, !range !4 %tobool.i.i = icmp eq i8 %7, 0 br i1 %tobool.i.i, label %_ZNSt3__111unique_lockINS_5mutexEED1Ev.exit, label %if.then.i.i if.then.i.i: ; preds = %if.end - %8 = load %"class.std::__1::mutex"** %__m_.i.i, align 8, !tbaa !5 + %8 = load %"class.std::__1::mutex"*, %"class.std::__1::mutex"** %__m_.i.i, align 8, !tbaa !5 call void @_ZNSt3__15mutex6unlockEv(%"class.std::__1::mutex"* %8) #5 br label %_ZNSt3__111unique_lockINS_5mutexEED1Ev.exit @@ -80,12 +80,12 @@ _ZNSt3__111unique_lockINS_5mutexEED1Ev.exit: ; preds = %if.then.i.i, %if.en ehcleanup: ; preds = %lpad3, %lpad %exn.slot.0 = phi i8* [ %5, %lpad3 ], [ %2, %lpad ] %ehselector.slot.0 = phi i32 [ %6, %lpad3 ], [ %3, %lpad ] - %9 = load i8* %__owns_.i.i, align 8, !tbaa !6, !range !4 + %9 = load i8, i8* %__owns_.i.i, align 8, !tbaa !6, !range !4 %tobool.i.i9 = icmp eq i8 %9, 0 br i1 %tobool.i.i9, label %_ZNSt3__111unique_lockINS_5mutexEED1Ev.exit12, label %if.then.i.i11 if.then.i.i11: ; preds = %ehcleanup - %10 = load %"class.std::__1::mutex"** %__m_.i.i, align 8, !tbaa !5 + %10 = load %"class.std::__1::mutex"*, %"class.std::__1::mutex"** %__m_.i.i, align 8, !tbaa !5 call void @_ZNSt3__15mutex6unlockEv(%"class.std::__1::mutex"* %10) #5 br label %_ZNSt3__111unique_lockINS_5mutexEED1Ev.exit12 diff --git a/test/CodeGen/PowerPC/hidden-vis-2.ll b/test/CodeGen/PowerPC/hidden-vis-2.ll index e9e2c0a93a0..3eb9dbd21ad 100644 --- a/test/CodeGen/PowerPC/hidden-vis-2.ll +++ b/test/CodeGen/PowerPC/hidden-vis-2.ll @@ -5,8 +5,8 @@ define i32 @t() nounwind readonly { entry: - %0 = load i32* @x, align 4 ; <i32> [#uses=1] - %1 = load i32* @y, align 4 ; <i32> [#uses=1] + %0 = load i32, i32* @x, align 4 ; <i32> [#uses=1] + %1 = load i32, i32* @y, align 4 ; <i32> [#uses=1] %2 = add i32 %1, %0 ; <i32> [#uses=1] ret i32 %2 } diff --git a/test/CodeGen/PowerPC/hidden-vis.ll b/test/CodeGen/PowerPC/hidden-vis.ll index b2cc1431ebd..bcb6723402b 100644 --- a/test/CodeGen/PowerPC/hidden-vis.ll +++ b/test/CodeGen/PowerPC/hidden-vis.ll @@ -4,6 +4,6 @@ define i32 @t() nounwind readonly { entry: - %0 = load i32* @x, align 4 ; <i32> [#uses=1] + %0 = load i32, i32* @x, align 4 ; <i32> [#uses=1] ret i32 %0 } diff --git a/test/CodeGen/PowerPC/ia-mem-r0.ll b/test/CodeGen/PowerPC/ia-mem-r0.ll index 0ce6cc89f1b..a007fc1aa63 100644 --- a/test/CodeGen/PowerPC/ia-mem-r0.ll +++ b/test/CodeGen/PowerPC/ia-mem-r0.ll @@ -84,10 +84,10 @@ define void @test1({ i8*, void (i8*, i8*)* } %fn_arg) { %52 = bitcast i8* %51 to i64* call void asm sideeffect "std 31, $0", "=*m"(i64* %52) %53 = getelementptr { i8*, void (i8*, i8*)* }, { i8*, void (i8*, i8*)* }* %fn, i32 0, i32 1 - %.funcptr = load void (i8*, i8*)** %53 + %.funcptr = load void (i8*, i8*)*, void (i8*, i8*)** %53 %54 = getelementptr { i8*, void (i8*, i8*)* }, { i8*, void (i8*, i8*)* }* %fn, i32 0, i32 0 - %.ptr = load i8** %54 - %55 = load i8** %sp + %.ptr = load i8*, i8** %54 + %55 = load i8*, i8** %sp call void %.funcptr(i8* %.ptr, i8* %55) ret void } diff --git a/test/CodeGen/PowerPC/indexed-load.ll b/test/CodeGen/PowerPC/indexed-load.ll index 28d5724d283..ce386d76cf1 100644 --- a/test/CodeGen/PowerPC/indexed-load.ll +++ b/test/CodeGen/PowerPC/indexed-load.ll @@ -15,7 +15,7 @@ define void @f(%class.test* %this) { entry: %Subminor.i.i = getelementptr inbounds %class.test, %class.test* %this, i64 0, i32 1 %0 = bitcast [5 x i8]* %Subminor.i.i to i40* - %bf.load2.i.i = load i40* %0, align 4 + %bf.load2.i.i = load i40, i40* %0, align 4 %bf.clear7.i.i = and i40 %bf.load2.i.i, -8589934592 store i40 %bf.clear7.i.i, i40* %0, align 4 ret void diff --git a/test/CodeGen/PowerPC/indirectbr.ll b/test/CodeGen/PowerPC/indirectbr.ll index cd34e0899aa..d1e03ca7773 100644 --- a/test/CodeGen/PowerPC/indirectbr.ll +++ b/test/CodeGen/PowerPC/indirectbr.ll @@ -10,7 +10,7 @@ define internal i32 @foo(i32 %i) nounwind { ; STATIC-LABEL: foo: ; PPC64-LABEL: foo: entry: - %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2] + %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2] %1 = icmp eq i8* %0, null ; <i1> [#uses=1] br i1 %1, label %bb3, label %bb2 @@ -38,7 +38,7 @@ bb2: ; preds = %entry, %bb3 bb3: ; preds = %entry %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1] - %gotovar.4.0.pre = load i8** %2, align 4 ; <i8*> [#uses=1] + %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1] br label %bb2 L5: ; preds = %bb2 diff --git a/test/CodeGen/PowerPC/inlineasm-i64-reg.ll b/test/CodeGen/PowerPC/inlineasm-i64-reg.ll index 4d8e704f07a..05f2a197cd5 100644 --- a/test/CodeGen/PowerPC/inlineasm-i64-reg.ll +++ b/test/CodeGen/PowerPC/inlineasm-i64-reg.ll @@ -19,18 +19,18 @@ entry: store %struct.BG_CoordinateMapping_t* %map, %struct.BG_CoordinateMapping_t** %map.addr, align 8 store i64* %numentries, i64** %numentries.addr, align 8 store i64 1055, i64* %r0, align 8 - %0 = load i64* %mapsize.addr, align 8 + %0 = load i64, i64* %mapsize.addr, align 8 store i64 %0, i64* %r3, align 8 - %1 = load %struct.BG_CoordinateMapping_t** %map.addr, align 8 + %1 = load %struct.BG_CoordinateMapping_t*, %struct.BG_CoordinateMapping_t** %map.addr, align 8 %2 = ptrtoint %struct.BG_CoordinateMapping_t* %1 to i64 store i64 %2, i64* %r4, align 8 - %3 = load i64** %numentries.addr, align 8 + %3 = load i64*, i64** %numentries.addr, align 8 %4 = ptrtoint i64* %3 to i64 store i64 %4, i64* %r5, align 8 - %5 = load i64* %r0, align 8 - %6 = load i64* %r3, align 8 - %7 = load i64* %r4, align 8 - %8 = load i64* %r5, align 8 + %5 = load i64, i64* %r0, align 8 + %6 = load i64, i64* %r3, align 8 + %7 = load i64, i64* %r4, align 8 + %8 = load i64, i64* %r5, align 8 %9 = call { i64, i64, i64, i64 } asm sideeffect "sc", "={r0},={r3},={r4},={r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 %5, i64 %6, i64 %7, i64 %8) #1, !srcloc !0 ; CHECK-LABEL: @Kernel_RanksToCoords @@ -52,9 +52,9 @@ entry: store i64 %asmresult1, i64* %r3, align 8 store i64 %asmresult2, i64* %r4, align 8 store i64 %asmresult3, i64* %r5, align 8 - %10 = load i64* %r3, align 8 + %10 = load i64, i64* %r3, align 8 store i64 %10, i64* %tmp - %11 = load i64* %tmp + %11 = load i64, i64* %tmp %conv = trunc i64 %11 to i32 ret i32 %conv } @@ -87,7 +87,7 @@ entry: if.then: ; preds = %entry call void @mtrace() - %.pre = load i32* %argc.addr, align 4 + %.pre = load i32, i32* %argc.addr, align 4 br label %if.end if.end: ; preds = %if.then, %entry diff --git a/test/CodeGen/PowerPC/isel-rc-nox0.ll b/test/CodeGen/PowerPC/isel-rc-nox0.ll index ac99aa408bd..df0116d0f23 100644 --- a/test/CodeGen/PowerPC/isel-rc-nox0.ll +++ b/test/CodeGen/PowerPC/isel-rc-nox0.ll @@ -22,7 +22,7 @@ crc32_gentab.exit: ; preds = %for.cond1.preheader for.cond1.preheader.i2961.i: ; preds = %for.inc44.i2977.i, %crc32_gentab.exit call void @llvm.memset.p0i8.i64(i8* bitcast ([1 x [9 x i32]]* @g_62 to i8*), i8 -1, i64 36, i32 4, i1 false) #1 - %0 = load i32* %retval.0.i.i.i, align 4 + %0 = load i32, i32* %retval.0.i.i.i, align 4 %tobool.i2967.i = icmp eq i32 %0, 0 br label %for.body21.i2968.i diff --git a/test/CodeGen/PowerPC/lbz-from-ld-shift.ll b/test/CodeGen/PowerPC/lbz-from-ld-shift.ll index 3eacd6a45fb..7696b84708d 100644 --- a/test/CodeGen/PowerPC/lbz-from-ld-shift.ll +++ b/test/CodeGen/PowerPC/lbz-from-ld-shift.ll @@ -5,7 +5,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: nounwind readonly define signext i32 @test(i32* nocapture readonly %P) #0 { entry: - %0 = load i32* %P, align 4 + %0 = load i32, i32* %P, align 4 %shr = lshr i32 %0, 24 ret i32 %shr diff --git a/test/CodeGen/PowerPC/lbzux.ll b/test/CodeGen/PowerPC/lbzux.ll index 11231e79020..4bd9cb6ab18 100644 --- a/test/CodeGen/PowerPC/lbzux.ll +++ b/test/CodeGen/PowerPC/lbzux.ll @@ -4,7 +4,7 @@ target triple = "powerpc64-unknown-linux-gnu" define fastcc void @allocateSpace(i1 %cond1, i1 %cond2) nounwind { entry: - %0 = load i8** undef, align 8 + %0 = load i8*, i8** undef, align 8 br i1 undef, label %return, label %lor.lhs.false lor.lhs.false: ; preds = %entry @@ -30,7 +30,7 @@ if.then45: ; preds = %while.body %arrayidx49 = getelementptr inbounds i8, i8* %0, i64 %idxprom48139 %1 = bitcast i8* %arrayidx49 to i16* %2 = bitcast i8* %arrayidx18 to i16* - %3 = load i16* %1, align 1 + %3 = load i16, i16* %1, align 1 store i16 %3, i16* %2, align 1 br label %return diff --git a/test/CodeGen/PowerPC/ld-st-upd.ll b/test/CodeGen/PowerPC/ld-st-upd.ll index 30fae7080e2..be0c94a54fe 100644 --- a/test/CodeGen/PowerPC/ld-st-upd.ll +++ b/test/CodeGen/PowerPC/ld-st-upd.ll @@ -5,7 +5,7 @@ target triple = "powerpc-unknown-linux-gnu" ; Function Attrs: nounwind define i32* @test4(i32* readonly %X, i32* nocapture %dest) #0 { %Y = getelementptr i32, i32* %X, i64 4 - %A = load i32* %Y, align 4 + %A = load i32, i32* %Y, align 4 store i32 %A, i32* %dest, align 4 ret i32* %Y diff --git a/test/CodeGen/PowerPC/ldtoc-inv.ll b/test/CodeGen/PowerPC/ldtoc-inv.ll index 69a3dd2e305..07a1686cc70 100644 --- a/test/CodeGen/PowerPC/ldtoc-inv.ll +++ b/test/CodeGen/PowerPC/ldtoc-inv.ll @@ -24,7 +24,7 @@ for.body: ; preds = %entry, %for.body %idxprom2 = sext i32 %shl1 to i64 %arrayidx.sum = add nsw i64 %idxprom2, %idxprom %arrayidx3 = getelementptr inbounds [4096 x i32], [4096 x i32]* @phasor, i64 0, i64 %arrayidx.sum - %1 = load i32* %arrayidx3, align 4 + %1 = load i32, i32* %arrayidx3, align 4 %arrayidx5 = getelementptr inbounds i32, i32* %out, i64 %indvars.iv store i32 %1, i32* %arrayidx5, align 4 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4 diff --git a/test/CodeGen/PowerPC/lha.ll b/test/CodeGen/PowerPC/lha.ll index 3a100c1aae6..c5c5f5905f6 100644 --- a/test/CodeGen/PowerPC/lha.ll +++ b/test/CodeGen/PowerPC/lha.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 | grep lha define i32 @test(i16* %a) { - %tmp.1 = load i16* %a ; <i16> [#uses=1] + %tmp.1 = load i16, i16* %a ; <i16> [#uses=1] %tmp.2 = sext i16 %tmp.1 to i32 ; <i32> [#uses=1] ret i32 %tmp.2 } diff --git a/test/CodeGen/PowerPC/load-constant-addr.ll b/test/CodeGen/PowerPC/load-constant-addr.ll index f1d061c1ad5..783443008ca 100644 --- a/test/CodeGen/PowerPC/load-constant-addr.ll +++ b/test/CodeGen/PowerPC/load-constant-addr.ll @@ -3,7 +3,7 @@ ; RUN: llc < %s -march=ppc32 | not grep ori define float @test() { - %tmp.i = load float* inttoptr (i32 186018016 to float*) ; <float> [#uses=1] + %tmp.i = load float, float* inttoptr (i32 186018016 to float*) ; <float> [#uses=1] ret float %tmp.i } diff --git a/test/CodeGen/PowerPC/load-shift-combine.ll b/test/CodeGen/PowerPC/load-shift-combine.ll index a5d1224864a..cf0b7fb8a13 100644 --- a/test/CodeGen/PowerPC/load-shift-combine.ll +++ b/test/CodeGen/PowerPC/load-shift-combine.ll @@ -16,17 +16,17 @@ define void @test1847() nounwind { entry: %j = alloca i32, align 4 - %0 = load i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 8), align 8 - %1 = load i32* @fails, align 4 - %bf.load1 = load i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 + %0 = load i64, i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 8), align 8 + %1 = load i32, i32* @fails, align 4 + %bf.load1 = load i96, i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 %bf.clear2 = and i96 %bf.load1, 302231454903657293676543 %bf.set3 = or i96 %bf.clear2, -38383394772764476296921088 store i96 %bf.set3, i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 - %2 = load i32* %j, align 4 - %3 = load i32* %j, align 4 + %2 = load i32, i32* %j, align 4 + %3 = load i32, i32* %j, align 4 %inc11 = add nsw i32 %3, 1 store i32 %inc11, i32* %j, align 4 - %bf.load15 = load i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 + %bf.load15 = load i96, i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 %bf.clear16 = and i96 %bf.load15, -18446744069414584321 %bf.set17 = or i96 %bf.clear16, 18446743532543672320 store i96 %bf.set17, i96* bitcast (%struct.S1847* getelementptr inbounds ([5 x %struct.S1847]* @a1847, i32 0, i64 2) to i96*), align 8 diff --git a/test/CodeGen/PowerPC/loop-data-prefetch.ll b/test/CodeGen/PowerPC/loop-data-prefetch.ll index aa2512ae890..59b74e67251 100644 --- a/test/CodeGen/PowerPC/loop-data-prefetch.ll +++ b/test/CodeGen/PowerPC/loop-data-prefetch.ll @@ -10,7 +10,7 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds double, double* %b, i64 %indvars.iv - %0 = load double* %arrayidx, align 8 + %0 = load double, double* %arrayidx, align 8 %add = fadd double %0, 1.000000e+00 %arrayidx2 = getelementptr inbounds double, double* %a, i64 %indvars.iv store double %add, double* %arrayidx2, align 8 diff --git a/test/CodeGen/PowerPC/lsa.ll b/test/CodeGen/PowerPC/lsa.ll index 2811a0f5507..f4d61c014dd 100644 --- a/test/CodeGen/PowerPC/lsa.ll +++ b/test/CodeGen/PowerPC/lsa.ll @@ -17,9 +17,9 @@ entry: %arraydecay1 = getelementptr inbounds [8200 x i32], [8200 x i32]* %v, i64 0, i64 0 %arraydecay2 = getelementptr inbounds [8200 x i32], [8200 x i32]* %w, i64 0, i64 0 call void @bar(i32* %arraydecay, i32* %arraydecay1, i32* %arraydecay2) #0 - %3 = load i32* %arraydecay2, align 4 + %3 = load i32, i32* %arraydecay2, align 4 %arrayidx3 = getelementptr inbounds [8200 x i32], [8200 x i32]* %w, i64 0, i64 1 - %4 = load i32* %arrayidx3, align 4 + %4 = load i32, i32* %arrayidx3, align 4 ; CHECK: @foo ; CHECK-NOT: lwzx diff --git a/test/CodeGen/PowerPC/lsr-postinc-pos.ll b/test/CodeGen/PowerPC/lsr-postinc-pos.ll index ee16aa9554f..7831df15460 100644 --- a/test/CodeGen/PowerPC/lsr-postinc-pos.ll +++ b/test/CodeGen/PowerPC/lsr-postinc-pos.ll @@ -3,7 +3,7 @@ ; The icmp is a post-inc use, and the increment is in %bb11, but the ; scevgep needs to be inserted in %bb so that it is dominated by %t. -; CHECK: %t = load i8** undef +; CHECK: %t = load i8*, i8** undef ; CHECK: %scevgep = getelementptr i8, i8* %t, i32 %lsr.iv.next ; CHECK: %c1 = icmp ult i8* %scevgep, undef @@ -21,7 +21,7 @@ bb11: br i1 %c0, label %bb13, label %bb bb: - %t = load i8** undef, align 16 ; <i8*> [#uses=1] + %t = load i8*, i8** undef, align 16 ; <i8*> [#uses=1] %p = getelementptr i8, i8* %t, i32 %ii ; <i8*> [#uses=1] %c1 = icmp ult i8* %p, undef ; <i1> [#uses=1] %i.next = add i32 %i, 1 ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/mask64.ll b/test/CodeGen/PowerPC/mask64.ll index 139621af1f2..600cecd3fe7 100644 --- a/test/CodeGen/PowerPC/mask64.ll +++ b/test/CodeGen/PowerPC/mask64.ll @@ -9,8 +9,8 @@ entry: br i1 false, label %bb16, label %bb49 bb16: ; preds = %entry - %tmp19 = load i8** null, align 1 ; <i8*> [#uses=1] - %tmp21 = load i8* %tmp19, align 1 ; <i8> [#uses=1] + %tmp19 = load i8*, i8** null, align 1 ; <i8*> [#uses=1] + %tmp21 = load i8, i8* %tmp19, align 1 ; <i8> [#uses=1] switch i8 %tmp21, label %bb49 [ i8 0, label %bb45 i8 1, label %bb34 diff --git a/test/CodeGen/PowerPC/mcm-1.ll b/test/CodeGen/PowerPC/mcm-1.ll index 4e31550c40d..7ef4a8e957e 100644 --- a/test/CodeGen/PowerPC/mcm-1.ll +++ b/test/CodeGen/PowerPC/mcm-1.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_external() nounwind { entry: - %0 = load i32* @ei, align 4 + %0 = load i32, i32* @ei, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @ei, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-10.ll b/test/CodeGen/PowerPC/mcm-10.ll index 9565ebc780b..affa249e32b 100644 --- a/test/CodeGen/PowerPC/mcm-10.ll +++ b/test/CodeGen/PowerPC/mcm-10.ll @@ -10,7 +10,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_fn_static() nounwind { entry: - %0 = load i32* @test_fn_static.si, align 4 + %0 = load i32, i32* @test_fn_static.si, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @test_fn_static.si, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-11.ll b/test/CodeGen/PowerPC/mcm-11.ll index 033045c74c8..457c60afb57 100644 --- a/test/CodeGen/PowerPC/mcm-11.ll +++ b/test/CodeGen/PowerPC/mcm-11.ll @@ -10,7 +10,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_file_static() nounwind { entry: - %0 = load i32* @gi, align 4 + %0 = load i32, i32* @gi, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @gi, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-2.ll b/test/CodeGen/PowerPC/mcm-2.ll index 811600ecdbf..03ce1c65851 100644 --- a/test/CodeGen/PowerPC/mcm-2.ll +++ b/test/CodeGen/PowerPC/mcm-2.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_fn_static() nounwind { entry: - %0 = load i32* @test_fn_static.si, align 4 + %0 = load i32, i32* @test_fn_static.si, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @test_fn_static.si, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-3.ll b/test/CodeGen/PowerPC/mcm-3.ll index b6d681d580a..40188bcb5a0 100644 --- a/test/CodeGen/PowerPC/mcm-3.ll +++ b/test/CodeGen/PowerPC/mcm-3.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_file_static() nounwind { entry: - %0 = load i32* @gi, align 4 + %0 = load i32, i32* @gi, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @gi, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-5.ll b/test/CodeGen/PowerPC/mcm-5.ll index 92ddecaeb8c..0c258459c91 100644 --- a/test/CodeGen/PowerPC/mcm-5.ll +++ b/test/CodeGen/PowerPC/mcm-5.ll @@ -11,7 +11,7 @@ define signext i32 @test_jump_table(i32 signext %i) nounwind { entry: %i.addr = alloca i32, align 4 store i32 %i, i32* %i.addr, align 4 - %0 = load i32* %i.addr, align 4 + %0 = load i32, i32* %i.addr, align 4 switch i32 %0, label %sw.default [ i32 3, label %sw.bb i32 4, label %sw.bb1 @@ -23,31 +23,31 @@ sw.default: ; preds = %entry br label %sw.epilog sw.bb: ; preds = %entry - %1 = load i32* %i.addr, align 4 + %1 = load i32, i32* %i.addr, align 4 %mul = mul nsw i32 %1, 7 store i32 %mul, i32* %i.addr, align 4 br label %sw.bb1 sw.bb1: ; preds = %entry, %sw.bb - %2 = load i32* %i.addr, align 4 + %2 = load i32, i32* %i.addr, align 4 %dec = add nsw i32 %2, -1 store i32 %dec, i32* %i.addr, align 4 br label %sw.bb2 sw.bb2: ; preds = %entry, %sw.bb1 - %3 = load i32* %i.addr, align 4 + %3 = load i32, i32* %i.addr, align 4 %add = add nsw i32 %3, 3 store i32 %add, i32* %i.addr, align 4 br label %sw.bb3 sw.bb3: ; preds = %entry, %sw.bb2 - %4 = load i32* %i.addr, align 4 + %4 = load i32, i32* %i.addr, align 4 %shl = shl i32 %4, 1 store i32 %shl, i32* %i.addr, align 4 br label %sw.epilog sw.epilog: ; preds = %sw.bb3, %sw.default - %5 = load i32* %i.addr, align 4 + %5 = load i32, i32* %i.addr, align 4 ret i32 %5 } diff --git a/test/CodeGen/PowerPC/mcm-6.ll b/test/CodeGen/PowerPC/mcm-6.ll index f7838b4b252..6a50d126410 100644 --- a/test/CodeGen/PowerPC/mcm-6.ll +++ b/test/CodeGen/PowerPC/mcm-6.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_tentative() nounwind { entry: - %0 = load i32* @ti, align 4 + %0 = load i32, i32* @ti, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @ti, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-7.ll b/test/CodeGen/PowerPC/mcm-7.ll index 7caa13bcdcf..9c8158df77b 100644 --- a/test/CodeGen/PowerPC/mcm-7.ll +++ b/test/CodeGen/PowerPC/mcm-7.ll @@ -11,7 +11,7 @@ define i8* @test_fnaddr() nounwind { entry: %func = alloca i32 (i32)*, align 8 store i32 (i32)* @foo, i32 (i32)** %func, align 8 - %0 = load i32 (i32)** %func, align 8 + %0 = load i32 (i32)*, i32 (i32)** %func, align 8 %1 = bitcast i32 (i32)* %0 to i8* ret i8* %1 } diff --git a/test/CodeGen/PowerPC/mcm-8.ll b/test/CodeGen/PowerPC/mcm-8.ll index 8a388c67cb7..b265c77e2d3 100644 --- a/test/CodeGen/PowerPC/mcm-8.ll +++ b/test/CodeGen/PowerPC/mcm-8.ll @@ -12,7 +12,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i8 @test_avext() nounwind { entry: %0 = getelementptr inbounds [13 x i8], [13 x i8]* @x, i32 0, i32 0 - %1 = load i8* %0, align 1 + %1 = load i8, i8* %0, align 1 ret i8 %1 } diff --git a/test/CodeGen/PowerPC/mcm-9.ll b/test/CodeGen/PowerPC/mcm-9.ll index 7906b6abea6..45a4e699a3d 100644 --- a/test/CodeGen/PowerPC/mcm-9.ll +++ b/test/CodeGen/PowerPC/mcm-9.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_external() nounwind { entry: - %0 = load i32* @a, align 4 + %0 = load i32, i32* @a, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @a, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-default.ll b/test/CodeGen/PowerPC/mcm-default.ll index 8d4ff14118f..49e6513a7c1 100644 --- a/test/CodeGen/PowerPC/mcm-default.ll +++ b/test/CodeGen/PowerPC/mcm-default.ll @@ -10,7 +10,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_external() nounwind { entry: - %0 = load i32* @ei, align 4 + %0 = load i32, i32* @ei, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @ei, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-obj-2.ll b/test/CodeGen/PowerPC/mcm-obj-2.ll index c42cf0c36ea..f31d85282a5 100644 --- a/test/CodeGen/PowerPC/mcm-obj-2.ll +++ b/test/CodeGen/PowerPC/mcm-obj-2.ll @@ -10,7 +10,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_fn_static() nounwind { entry: - %0 = load i32* @test_fn_static.si, align 4 + %0 = load i32, i32* @test_fn_static.si, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @test_fn_static.si, align 4 ret i32 %0 @@ -29,7 +29,7 @@ entry: define signext i32 @test_file_static() nounwind { entry: - %0 = load i32* @gi, align 4 + %0 = load i32, i32* @gi, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @gi, align 4 ret i32 %0 diff --git a/test/CodeGen/PowerPC/mcm-obj.ll b/test/CodeGen/PowerPC/mcm-obj.ll index d3d05eb48d3..770ef35d91a 100644 --- a/test/CodeGen/PowerPC/mcm-obj.ll +++ b/test/CodeGen/PowerPC/mcm-obj.ll @@ -12,7 +12,7 @@ target triple = "powerpc64-unknown-linux-gnu" define signext i32 @test_external() nounwind { entry: - %0 = load i32* @ei, align 4 + %0 = load i32, i32* @ei, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @ei, align 4 ret i32 %0 @@ -35,7 +35,7 @@ entry: define signext i32 @test_fn_static() nounwind { entry: - %0 = load i32* @test_fn_static.si, align 4 + %0 = load i32, i32* @test_fn_static.si, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @test_fn_static.si, align 4 ret i32 %0 @@ -57,7 +57,7 @@ entry: define signext i32 @test_file_static() nounwind { entry: - %0 = load i32* @gi, align 4 + %0 = load i32, i32* @gi, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @gi, align 4 ret i32 %0 @@ -96,7 +96,7 @@ define signext i32 @test_jump_table(i32 signext %i) nounwind { entry: %i.addr = alloca i32, align 4 store i32 %i, i32* %i.addr, align 4 - %0 = load i32* %i.addr, align 4 + %0 = load i32, i32* %i.addr, align 4 switch i32 %0, label %sw.default [ i32 3, label %sw.bb i32 4, label %sw.bb1 @@ -108,31 +108,31 @@ sw.default: ; preds = %entry br label %sw.epilog sw.bb: ; preds = %entry - %1 = load i32* %i.addr, align 4 + %1 = load i32, i32* %i.addr, align 4 %mul = mul nsw i32 %1, 7 store i32 %mul, i32* %i.addr, align 4 br label %sw.bb1 sw.bb1: ; preds = %entry, %sw.bb - %2 = load i32* %i.addr, align 4 + %2 = load i32, i32* %i.addr, align 4 %dec = add nsw i32 %2, -1 store i32 %dec, i32* %i.addr, align 4 br label %sw.bb2 sw.bb2: ; preds = %entry, %sw.bb1 - %3 = load i32* %i.addr, align 4 + %3 = load i32, i32* %i.addr, align 4 %add = add nsw i32 %3, 3 store i32 %add, i32* %i.addr, align 4 br label %sw.bb3 sw.bb3: ; preds = %entry, %sw.bb2 - %4 = load i32* %i.addr, align 4 + %4 = load i32, i32* %i.addr, align 4 %shl = shl i32 %4, 1 store i32 %shl, i32* %i.addr, align 4 br label %sw.epilog sw.epilog: ; preds = %sw.bb3, %sw.default - %5 = load i32* %i.addr, align 4 + %5 = load i32, i32* %i.addr, align 4 ret i32 %5 } @@ -149,7 +149,7 @@ sw.epilog: ; preds = %sw.bb3, %sw.default define signext i32 @test_tentative() nounwind { entry: - %0 = load i32* @ti, align 4 + %0 = load i32, i32* @ti, align 4 %inc = add nsw i32 %0, 1 store i32 %inc, i32* @ti, align 4 ret i32 %0 @@ -168,7 +168,7 @@ define i8* @test_fnaddr() nounwind { entry: %func = alloca i32 (i32)*, align 8 store i32 (i32)* @foo, i32 (i32)** %func, align 8 - %0 = load i32 (i32)** %func, align 8 + %0 = load i32 (i32)*, i32 (i32)** %func, align 8 %1 = bitcast i32 (i32)* %0 to i8* ret i8* %1 } diff --git a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll index 57f65392ade..60a4bdba229 100644 --- a/test/CodeGen/PowerPC/mem-rr-addr-mode.ll +++ b/test/CodeGen/PowerPC/mem-rr-addr-mode.ll @@ -6,11 +6,11 @@ define void @func(<4 x float>* %a, <4 x float>* %b) { %tmp1 = getelementptr <4 x float>, <4 x float>* %b, i32 1 ; <<4 x float>*> [#uses=1] - %tmp = load <4 x float>* %tmp1 ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %tmp1 ; <<4 x float>> [#uses=1] %tmp3 = getelementptr <4 x float>, <4 x float>* %a, i32 1 ; <<4 x float>*> [#uses=1] - %tmp4 = load <4 x float>* %tmp3 ; <<4 x float>> [#uses=1] + %tmp4 = load <4 x float>, <4 x float>* %tmp3 ; <<4 x float>> [#uses=1] %tmp5 = fmul <4 x float> %tmp, %tmp4 ; <<4 x float>> [#uses=1] - %tmp8 = load <4 x float>* %b ; <<4 x float>> [#uses=1] + %tmp8 = load <4 x float>, <4 x float>* %b ; <<4 x float>> [#uses=1] %tmp9 = fadd <4 x float> %tmp5, %tmp8 ; <<4 x float>> [#uses=1] store <4 x float> %tmp9, <4 x float>* %a ret void diff --git a/test/CodeGen/PowerPC/mem_update.ll b/test/CodeGen/PowerPC/mem_update.ll index 47316f94e5e..2fa01402579 100644 --- a/test/CodeGen/PowerPC/mem_update.ll +++ b/test/CodeGen/PowerPC/mem_update.ll @@ -7,21 +7,21 @@ define i32* @test0(i32* %X, i32* %dest) nounwind { %Y = getelementptr i32, i32* %X, i32 4 - %A = load i32* %Y + %A = load i32, i32* %Y store i32 %A, i32* %dest ret i32* %Y } define i32* @test1(i32* %X, i32* %dest) nounwind { %Y = getelementptr i32, i32* %X, i32 4 - %A = load i32* %Y + %A = load i32, i32* %Y store i32 %A, i32* %dest ret i32* %Y } define i16* @test2(i16* %X, i32* %dest) nounwind { %Y = getelementptr i16, i16* %X, i32 4 - %A = load i16* %Y + %A = load i16, i16* %Y %B = sext i16 %A to i32 store i32 %B, i32* %dest ret i16* %Y @@ -29,7 +29,7 @@ define i16* @test2(i16* %X, i32* %dest) nounwind { define i16* @test3(i16* %X, i32* %dest) nounwind { %Y = getelementptr i16, i16* %X, i32 4 - %A = load i16* %Y + %A = load i16, i16* %Y %B = zext i16 %A to i32 store i32 %B, i32* %dest ret i16* %Y @@ -37,7 +37,7 @@ define i16* @test3(i16* %X, i32* %dest) nounwind { define i16* @test3a(i16* %X, i64* %dest) nounwind { %Y = getelementptr i16, i16* %X, i32 4 - %A = load i16* %Y + %A = load i16, i16* %Y %B = sext i16 %A to i64 store i64 %B, i64* %dest ret i16* %Y @@ -45,7 +45,7 @@ define i16* @test3a(i16* %X, i64* %dest) nounwind { define i64* @test4(i64* %X, i64* %dest) nounwind { %Y = getelementptr i64, i64* %X, i32 4 - %A = load i64* %Y + %A = load i64, i64* %Y store i64 %A, i64* %dest ret i64* %Y } diff --git a/test/CodeGen/PowerPC/misched-inorder-latency.ll b/test/CodeGen/PowerPC/misched-inorder-latency.ll index 638409d6b20..0f57e90abeb 100644 --- a/test/CodeGen/PowerPC/misched-inorder-latency.ll +++ b/test/CodeGen/PowerPC/misched-inorder-latency.ll @@ -15,13 +15,13 @@ target triple = "powerpc64-bgq-linux" define i32 @testload(i32 *%ptr, i32 %sumin) { entry: %sum1 = add i32 %sumin, 1 - %val1 = load i32* %ptr + %val1 = load i32, i32* %ptr %p = icmp eq i32 %sumin, 0 br i1 %p, label %true, label %end true: %sum2 = add i32 %sum1, 1 %ptr2 = getelementptr i32, i32* %ptr, i32 1 - %val = load i32* %ptr2 + %val = load i32, i32* %ptr2 %val2 = add i32 %val1, %val br label %end end: diff --git a/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll b/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll index 743cc62ddba..ae7f0d18a92 100644 --- a/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll +++ b/test/CodeGen/PowerPC/mult-alt-generic-powerpc.ll @@ -33,10 +33,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -48,10 +48,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -63,7 +63,7 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 ret void @@ -120,10 +120,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind @@ -137,10 +137,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind @@ -165,7 +165,7 @@ entry: define void @multi_m() nounwind { entry: - %tmp = load i32* @min1, align 4 + %tmp = load i32, i32* @min1, align 4 call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind ret void } @@ -190,10 +190,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -205,10 +205,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -220,7 +220,7 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 ret void @@ -277,10 +277,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind @@ -294,10 +294,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind diff --git a/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll b/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll index 29a57867f56..271b0634288 100644 --- a/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll +++ b/test/CodeGen/PowerPC/mult-alt-generic-powerpc64.ll @@ -33,10 +33,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -48,10 +48,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -63,7 +63,7 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 ret void @@ -120,10 +120,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind @@ -137,10 +137,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind @@ -165,7 +165,7 @@ entry: define void @multi_m() nounwind { entry: - %tmp = load i32* @min1, align 4 + %tmp = load i32, i32* @min1, align 4 call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind ret void } @@ -190,10 +190,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -205,10 +205,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* %in1, align 4 + %tmp1 = load i32, i32* %in1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 ret void @@ -220,7 +220,7 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 ret void @@ -277,10 +277,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind @@ -294,10 +294,10 @@ entry: %in1 = alloca i32, align 4 store i32 0, i32* %out0, align 4 store i32 1, i32* %in1, align 4 - %tmp = load i32* %in1, align 4 + %tmp = load i32, i32* %in1, align 4 %0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind store i32 %0, i32* %out0, align 4 - %tmp1 = load i32* @min1, align 4 + %tmp1 = load i32, i32* @min1, align 4 %1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind store i32 %1, i32* %out0, align 4 %2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind diff --git a/test/CodeGen/PowerPC/no-extra-fp-conv-ldst.ll b/test/CodeGen/PowerPC/no-extra-fp-conv-ldst.ll index 6beee253a2e..26739bf958b 100644 --- a/test/CodeGen/PowerPC/no-extra-fp-conv-ldst.ll +++ b/test/CodeGen/PowerPC/no-extra-fp-conv-ldst.ll @@ -5,7 +5,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: nounwind readonly define double @test1(i64* nocapture readonly %x) #0 { entry: - %0 = load i64* %x, align 8 + %0 = load i64, i64* %x, align 8 %conv = sitofp i64 %0 to double ret double %conv @@ -18,7 +18,7 @@ entry: ; Function Attrs: nounwind readonly define double @test2(i32* nocapture readonly %x) #0 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %conv = sitofp i32 %0 to double ret double %conv diff --git a/test/CodeGen/PowerPC/novrsave.ll b/test/CodeGen/PowerPC/novrsave.ll index a70576a291e..50be2a162ed 100644 --- a/test/CodeGen/PowerPC/novrsave.ll +++ b/test/CodeGen/PowerPC/novrsave.ll @@ -7,7 +7,7 @@ define <4 x float> @bar(<4 x float> %v) nounwind { entry: %v.addr = alloca <4 x float>, align 16 store <4 x float> %v, <4 x float>* %v.addr, align 16 - %0 = load <4 x float>* %v.addr, align 16 + %0 = load <4 x float>, <4 x float>* %v.addr, align 16 ret <4 x float> %0 } diff --git a/test/CodeGen/PowerPC/or-addressing-mode.ll b/test/CodeGen/PowerPC/or-addressing-mode.ll index e50374e3069..f98b34cfdb6 100644 --- a/test/CodeGen/PowerPC/or-addressing-mode.ll +++ b/test/CodeGen/PowerPC/or-addressing-mode.ll @@ -8,7 +8,7 @@ define i32 @test1(i8* %P) { %tmp.11.i = and i32 %tmp.10.i, 2040 ; <i32> [#uses=1] %tmp.13.i = or i32 %tmp.11.i, %tmp.4.i ; <i32> [#uses=1] %tmp.14.i = inttoptr i32 %tmp.13.i to i32* ; <i32*> [#uses=1] - %tmp.3 = load i32* %tmp.14.i ; <i32> [#uses=1] + %tmp.3 = load i32, i32* %tmp.14.i ; <i32> [#uses=1] ret i32 %tmp.3 } @@ -16,7 +16,7 @@ define i32 @test2(i32 %P) { %tmp.2 = shl i32 %P, 4 ; <i32> [#uses=1] %tmp.3 = or i32 %tmp.2, 2 ; <i32> [#uses=1] %tmp.4 = inttoptr i32 %tmp.3 to i32* ; <i32*> [#uses=1] - %tmp.5 = load i32* %tmp.4 ; <i32> [#uses=1] + %tmp.5 = load i32, i32* %tmp.4 ; <i32> [#uses=1] ret i32 %tmp.5 } diff --git a/test/CodeGen/PowerPC/post-ra-ec.ll b/test/CodeGen/PowerPC/post-ra-ec.ll index 935749721d0..e32441be90f 100644 --- a/test/CodeGen/PowerPC/post-ra-ec.ll +++ b/test/CodeGen/PowerPC/post-ra-ec.ll @@ -16,9 +16,9 @@ entry: br i1 undef, label %if.end, label %if.then if.then: ; preds = %entry - %0 = load i64* undef, align 8 + %0 = load i64, i64* undef, align 8 %conv.i = trunc i64 %0 to i32 - %1 = load i32* null, align 4 + %1 = load i32, i32* null, align 4 %add = add i32 %1, %conv.i store i32 %add, i32* null, align 4 %counter.i.i = getelementptr inbounds %struct.task_struct.4.16.124, %struct.task_struct.4.16.124* %call1.i, i64 0, i32 1, i32 0 diff --git a/test/CodeGen/PowerPC/ppc-prologue.ll b/test/CodeGen/PowerPC/ppc-prologue.ll index 553837121a3..c84e6fbd4b6 100644 --- a/test/CodeGen/PowerPC/ppc-prologue.ll +++ b/test/CodeGen/PowerPC/ppc-prologue.ll @@ -14,12 +14,12 @@ entry: store i32 %a, i32* %a_addr %1 = call i32 @_Z3barPi(i32* %a_addr) ; <i32> [#uses=1] store i32 %1, i32* %0, align 4 - %2 = load i32* %0, align 4 ; <i32> [#uses=1] + %2 = load i32, i32* %0, align 4 ; <i32> [#uses=1] store i32 %2, i32* %retval, align 4 br label %return return: ; preds = %entry - %retval1 = load i32* %retval ; <i32> [#uses=1] + %retval1 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval1 } diff --git a/test/CodeGen/PowerPC/ppc32-lshrti3.ll b/test/CodeGen/PowerPC/ppc32-lshrti3.ll index f773cce81be..a2a280f5168 100644 --- a/test/CodeGen/PowerPC/ppc32-lshrti3.ll +++ b/test/CodeGen/PowerPC/ppc32-lshrti3.ll @@ -9,7 +9,7 @@ target triple = "powerpc--netbsd" ; Function Attrs: nounwind uwtable define i32 @fn1() #0 { entry: - %.promoted = load i72* inttoptr (i32 1 to i72*), align 4 + %.promoted = load i72, i72* inttoptr (i32 1 to i72*), align 4 br label %while.cond while.cond: ; preds = %while.cond, %entry diff --git a/test/CodeGen/PowerPC/ppc32-pic-large.ll b/test/CodeGen/PowerPC/ppc32-pic-large.ll index bb906ec78d1..4c85ab968a6 100644 --- a/test/CodeGen/PowerPC/ppc32-pic-large.ll +++ b/test/CodeGen/PowerPC/ppc32-pic-large.ll @@ -5,7 +5,7 @@ declare i32 @call_foo(i32, ...) define i32 @foo() { entry: - %0 = load i32* @bar, align 4 + %0 = load i32, i32* @bar, align 4 %call = call i32 (i32, ...)* @call_foo(i32 %0, i32 0, i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64) ret i32 %0 } diff --git a/test/CodeGen/PowerPC/ppc32-pic.ll b/test/CodeGen/PowerPC/ppc32-pic.ll index abc13675717..74f93948283 100644 --- a/test/CodeGen/PowerPC/ppc32-pic.ll +++ b/test/CodeGen/PowerPC/ppc32-pic.ll @@ -5,7 +5,7 @@ declare i32 @call_foo(i32, ...) define i32 @foo() { entry: - %0 = load i32* @bar, align 4 + %0 = load i32, i32* @bar, align 4 %call = call i32 (i32, ...)* @call_foo(i32 %0, i32 0, i32 1, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64) ret i32 0 } diff --git a/test/CodeGen/PowerPC/ppc440-fp-basic.ll b/test/CodeGen/PowerPC/ppc440-fp-basic.ll index af0cef4aaac..95773570d33 100644 --- a/test/CodeGen/PowerPC/ppc440-fp-basic.ll +++ b/test/CodeGen/PowerPC/ppc440-fp-basic.ll @@ -5,13 +5,13 @@ define void @maybe_an_fma(%0* sret %agg.result, %0* byval %a, %0* byval %b, %0* byval %c) nounwind { entry: %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0 - %a.real = load double* %a.realp + %a.real = load double, double* %a.realp %a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1 - %a.imag = load double* %a.imagp + %a.imag = load double, double* %a.imagp %b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0 - %b.real = load double* %b.realp + %b.real = load double, double* %b.realp %b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1 - %b.imag = load double* %b.imagp + %b.imag = load double, double* %b.imagp %mul.rl = fmul double %a.real, %b.real %mul.rr = fmul double %a.imag, %b.imag %mul.r = fsub double %mul.rl, %mul.rr @@ -19,9 +19,9 @@ entry: %mul.ir = fmul double %a.real, %b.imag %mul.i = fadd double %mul.il, %mul.ir %c.realp = getelementptr inbounds %0, %0* %c, i32 0, i32 0 - %c.real = load double* %c.realp + %c.real = load double, double* %c.realp %c.imagp = getelementptr inbounds %0, %0* %c, i32 0, i32 1 - %c.imag = load double* %c.imagp + %c.imag = load double, double* %c.imagp %add.r = fadd double %mul.r, %c.real %add.i = fadd double %mul.i, %c.imag %real = getelementptr inbounds %0, %0* %agg.result, i32 0, i32 0 diff --git a/test/CodeGen/PowerPC/ppc64-abi-extend.ll b/test/CodeGen/PowerPC/ppc64-abi-extend.ll index 8baf1c613e7..f8e72e3a108 100644 --- a/test/CodeGen/PowerPC/ppc64-abi-extend.ll +++ b/test/CodeGen/PowerPC/ppc64-abi-extend.ll @@ -15,7 +15,7 @@ declare zeroext i32 @ret_ui() define void @pass_arg_si() nounwind { entry: - %0 = load i32* @si, align 4 + %0 = load i32, i32* @si, align 4 tail call void @arg_si(i32 signext %0) nounwind ret void } @@ -25,7 +25,7 @@ entry: define void @pass_arg_ui() nounwind { entry: - %0 = load i32* @ui, align 4 + %0 = load i32, i32* @ui, align 4 tail call void @arg_ui(i32 zeroext %0) nounwind ret void } @@ -53,7 +53,7 @@ entry: define signext i32 @pass_ret_si() nounwind readonly { entry: - %0 = load i32* @si, align 4 + %0 = load i32, i32* @si, align 4 ret i32 %0 } ; CHECK: @pass_ret_si @@ -62,7 +62,7 @@ entry: define zeroext i32 @pass_ret_ui() nounwind readonly { entry: - %0 = load i32* @ui, align 4 + %0 = load i32, i32* @ui, align 4 ret i32 %0 } ; CHECK: @pass_ret_ui diff --git a/test/CodeGen/PowerPC/ppc64-align-long-double.ll b/test/CodeGen/PowerPC/ppc64-align-long-double.ll index db50451a76c..b9fd6707f04 100644 --- a/test/CodeGen/PowerPC/ppc64-align-long-double.ll +++ b/test/CodeGen/PowerPC/ppc64-align-long-double.ll @@ -14,7 +14,7 @@ target triple = "powerpc64-unknown-linux-gnu" define ppc_fp128 @test(%struct.S* byval %x) nounwind { entry: %b = getelementptr inbounds %struct.S, %struct.S* %x, i32 0, i32 1 - %0 = load ppc_fp128* %b, align 16 + %0 = load ppc_fp128, ppc_fp128* %b, align 16 ret ppc_fp128 %0 } diff --git a/test/CodeGen/PowerPC/ppc64-byval-align.ll b/test/CodeGen/PowerPC/ppc64-byval-align.ll index be1c5022700..7170f590658 100644 --- a/test/CodeGen/PowerPC/ppc64-byval-align.ll +++ b/test/CodeGen/PowerPC/ppc64-byval-align.ll @@ -31,7 +31,7 @@ entry: define i64 @callee2(%struct.pad* byval nocapture readnone %x, i32 signext %y, %struct.test* byval align 16 nocapture readonly %z) { entry: %x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0 - %0 = load i64* %x1, align 16 + %0 = load i64, i64* %x1, align 16 ret i64 %0 } ; CHECK-LABEL: @callee2 diff --git a/test/CodeGen/PowerPC/ppc64-calls.ll b/test/CodeGen/PowerPC/ppc64-calls.ll index 707ba95235f..23a14e6687d 100644 --- a/test/CodeGen/PowerPC/ppc64-calls.ll +++ b/test/CodeGen/PowerPC/ppc64-calls.ll @@ -73,7 +73,7 @@ define double @test_external(double %x) nounwind { @g = external global void ()* declare void @h(i64) define void @test_indir_toc_reload(i64 %x) { - %1 = load void ()** @g + %1 = load void ()*, void ()** @g call void %1() call void @h(i64 %x) ret void diff --git a/test/CodeGen/PowerPC/ppc64-gep-opt.ll b/test/CodeGen/PowerPC/ppc64-gep-opt.ll index d2528964645..f238908fcaf 100644 --- a/test/CodeGen/PowerPC/ppc64-gep-opt.ll +++ b/test/CodeGen/PowerPC/ppc64-gep-opt.ll @@ -15,13 +15,13 @@ target triple = "powerpc64-unknown-linux-gnu" ; elimilate the common subexpression for the second use. define void @test_GEP_CSE([240 x %struct]* %string, i32* %adj, i32 %lib, i64 %idxprom) { %liberties = getelementptr [240 x %struct], [240 x %struct]* %string, i64 1, i64 %idxprom, i32 3 - %1 = load i32* %liberties, align 4 + %1 = load i32, i32* %liberties, align 4 %cmp = icmp eq i32 %1, %lib br i1 %cmp, label %if.then, label %if.end if.then: ; preds = %entry %origin = getelementptr [240 x %struct], [240 x %struct]* %string, i64 1, i64 %idxprom, i32 2 - %2 = load i32* %origin, align 4 + %2 = load i32, i32* %origin, align 4 store i32 %2, i32* %adj, align 4 br label %if.end @@ -60,9 +60,9 @@ if.end: ; preds = %if.then, %entry ; use. define void @test_GEP_across_BB(%class.my* %this, i64 %idx) { %1 = getelementptr %class.my, %class.my* %this, i64 0, i32 3, i64 %idx, i32 1 - %2 = load i32* %1, align 4 + %2 = load i32, i32* %1, align 4 %3 = getelementptr %class.my, %class.my* %this, i64 0, i32 3, i64 %idx, i32 2 - %4 = load i32* %3, align 4 + %4 = load i32, i32* %3, align 4 %5 = icmp eq i32 %2, %4 br i1 %5, label %if.true, label %exit diff --git a/test/CodeGen/PowerPC/ppc64-patchpoint.ll b/test/CodeGen/PowerPC/ppc64-patchpoint.ll index e2de70c3f9d..48ffb6a56a3 100644 --- a/test/CodeGen/PowerPC/ppc64-patchpoint.ll +++ b/test/CodeGen/PowerPC/ppc64-patchpoint.ll @@ -63,13 +63,13 @@ define i64 @testLowerConstant(i64 %arg, i64 %tmp2, i64 %tmp10, i64* %tmp33, i64 entry: %tmp80 = add i64 %tmp79, -16 %tmp81 = inttoptr i64 %tmp80 to i64* - %tmp82 = load i64* %tmp81, align 8 + %tmp82 = load i64, i64* %tmp81, align 8 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82) tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 15, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82) - %tmp83 = load i64* %tmp33, align 8 + %tmp83 = load i64, i64* %tmp33, align 8 %tmp84 = add i64 %tmp83, -24 %tmp85 = inttoptr i64 %tmp84 to i64* - %tmp86 = load i64* %tmp85, align 8 + %tmp86 = load i64, i64* %tmp85, align 8 tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86) tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 18, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86) ret i64 10 diff --git a/test/CodeGen/PowerPC/ppc64-smallarg.ll b/test/CodeGen/PowerPC/ppc64-smallarg.ll index 0d5b078e217..27aca1077cd 100644 --- a/test/CodeGen/PowerPC/ppc64-smallarg.ll +++ b/test/CodeGen/PowerPC/ppc64-smallarg.ll @@ -17,7 +17,7 @@ define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %str entry: %0 = bitcast %struct.small_arg* %x to i32* %1 = bitcast %struct.small_arg* %agg.result to i32* - %2 = load i32* %0, align 2 + %2 = load i32, i32* %0, align 2 store i32 %2, i32* %1, align 2 ret void } @@ -47,7 +47,7 @@ entry: define void @caller2() { entry: - %0 = load float* @gf, align 4 + %0 = load float, float* @gf, align 4 %call = tail call float @test2(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float %0) ret void } diff --git a/test/CodeGen/PowerPC/ppc64-toc.ll b/test/CodeGen/PowerPC/ppc64-toc.ll index 5ea2a32ab78..86bb9cedea2 100644 --- a/test/CodeGen/PowerPC/ppc64-toc.ll +++ b/test/CodeGen/PowerPC/ppc64-toc.ll @@ -14,7 +14,7 @@ entry: ; CHECK-NEXT: .quad .TOC.@tocbase ; CHECK-NEXT: .quad 0 ; CHECK-NEXT: .text - %0 = load i64* @number64, align 8 + %0 = load i64, i64* @number64, align 8 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2) %cmp = icmp eq i64 %0, %a %conv1 = zext i1 %cmp to i64 @@ -25,7 +25,7 @@ define i64 @internal_static_var(i64 %a) nounwind { entry: ; CHECK-LABEL: internal_static_var: ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2) - %0 = load i64* @internal_static_var.x, align 8 + %0 = load i64, i64* @internal_static_var.x, align 8 %cmp = icmp eq i64 %0, %a %conv1 = zext i1 %cmp to i64 ret i64 %conv1 @@ -46,7 +46,7 @@ entry: ; CHECK-LABEL: access_double_array: %idxprom = sext i32 %i to i64 %arrayidx = getelementptr inbounds [32 x double], [32 x double]* @double_array, i64 0, i64 %idxprom - %0 = load double* %arrayidx, align 8 + %0 = load double, double* %arrayidx, align 8 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2) %cmp = fcmp oeq double %0, %a %conv = zext i1 %cmp to i32 diff --git a/test/CodeGen/PowerPC/ppc64le-aggregates.ll b/test/CodeGen/PowerPC/ppc64le-aggregates.ll index 3fce36ec23b..ac8d0c23bdd 100644 --- a/test/CodeGen/PowerPC/ppc64le-aggregates.ll +++ b/test/CodeGen/PowerPC/ppc64le-aggregates.ll @@ -257,9 +257,9 @@ entry: define void @caller2() { entry: - %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 - %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 - %2 = load [2 x float]* getelementptr inbounds (%struct.float2* @g2, i64 0, i32 0), align 4 + %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 + %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 + %2 = load [2 x float], [2 x float]* getelementptr inbounds (%struct.float2* @g2, i64 0, i32 0), align 4 tail call void @test2([8 x float] %0, [5 x float] %1, [2 x float] %2) ret void } @@ -299,8 +299,8 @@ entry: define void @caller3(double %d) { entry: - %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 - %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 + %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 + %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 tail call void @test3([8 x float] %0, [5 x float] %1, double %d) ret void } @@ -322,8 +322,8 @@ entry: define void @caller4(float %f) { entry: - %0 = load [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 - %1 = load [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 + %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8* @g8, i64 0, i32 0), align 4 + %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5* @g5, i64 0, i32 0), align 4 tail call void @test4([8 x float] %0, [5 x float] %1, float %f) ret void } diff --git a/test/CodeGen/PowerPC/ppc64le-localentry.ll b/test/CodeGen/PowerPC/ppc64le-localentry.ll index d9995de9b72..73697b24ace 100644 --- a/test/CodeGen/PowerPC/ppc64le-localentry.ll +++ b/test/CodeGen/PowerPC/ppc64le-localentry.ll @@ -22,7 +22,7 @@ entry: ; CHECK-NEXT: .Ltmp[[TMP2:[0-9]+]]: ; CHECK-NEXT: .localentry use_toc, .Ltmp[[TMP2]]-.Ltmp[[TMP1]] ; CHECK-NEXT: %entry - %0 = load i64* @number64, align 8 + %0 = load i64, i64* @number64, align 8 %cmp = icmp eq i64 %0, %a %conv1 = zext i1 %cmp to i64 ret i64 %conv1 diff --git a/test/CodeGen/PowerPC/ppc64le-smallarg.ll b/test/CodeGen/PowerPC/ppc64le-smallarg.ll index 120c14039f9..77d066363cd 100644 --- a/test/CodeGen/PowerPC/ppc64le-smallarg.ll +++ b/test/CodeGen/PowerPC/ppc64le-smallarg.ll @@ -17,7 +17,7 @@ define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %str entry: %0 = bitcast %struct.small_arg* %x to i32* %1 = bitcast %struct.small_arg* %agg.result to i32* - %2 = load i32* %0, align 2 + %2 = load i32, i32* %0, align 2 store i32 %2, i32* %1, align 2 ret void } @@ -47,7 +47,7 @@ entry: define void @caller2() { entry: - %0 = load float* @gf, align 4 + %0 = load float, float* @gf, align 4 %call = tail call float @test2(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float %0) ret void } diff --git a/test/CodeGen/PowerPC/ppcf128-1.ll b/test/CodeGen/PowerPC/ppcf128-1.ll index 2cec934c66f..f0e58f61a86 100644 --- a/test/CodeGen/PowerPC/ppcf128-1.ll +++ b/test/CodeGen/PowerPC/ppcf128-1.ll @@ -12,16 +12,16 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store ppc_fp128 %x, ppc_fp128* %x_addr store ppc_fp128 %y, ppc_fp128* %y_addr - %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] - %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp1 = load ppc_fp128, ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp2 = load ppc_fp128, ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] %tmp3 = fadd ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16 - %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] + %tmp4 = load ppc_fp128, ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16 br label %return return: ; preds = %entry - %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1] + %retval5 = load ppc_fp128, ppc_fp128* %retval ; <ppc_fp128> [#uses=1] ret ppc_fp128 %retval5 } @@ -34,16 +34,16 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store ppc_fp128 %x, ppc_fp128* %x_addr store ppc_fp128 %y, ppc_fp128* %y_addr - %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] - %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp1 = load ppc_fp128, ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp2 = load ppc_fp128, ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] %tmp3 = fsub ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16 - %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] + %tmp4 = load ppc_fp128, ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16 br label %return return: ; preds = %entry - %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1] + %retval5 = load ppc_fp128, ppc_fp128* %retval ; <ppc_fp128> [#uses=1] ret ppc_fp128 %retval5 } @@ -56,16 +56,16 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store ppc_fp128 %x, ppc_fp128* %x_addr store ppc_fp128 %y, ppc_fp128* %y_addr - %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] - %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp1 = load ppc_fp128, ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp2 = load ppc_fp128, ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] %tmp3 = fmul ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16 - %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] + %tmp4 = load ppc_fp128, ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16 br label %return return: ; preds = %entry - %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1] + %retval5 = load ppc_fp128, ppc_fp128* %retval ; <ppc_fp128> [#uses=1] ret ppc_fp128 %retval5 } @@ -78,15 +78,15 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store ppc_fp128 %x, ppc_fp128* %x_addr store ppc_fp128 %y, ppc_fp128* %y_addr - %tmp1 = load ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] - %tmp2 = load ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp1 = load ppc_fp128, ppc_fp128* %x_addr, align 16 ; <ppc_fp128> [#uses=1] + %tmp2 = load ppc_fp128, ppc_fp128* %y_addr, align 16 ; <ppc_fp128> [#uses=1] %tmp3 = fdiv ppc_fp128 %tmp1, %tmp2 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp3, ppc_fp128* %tmp, align 16 - %tmp4 = load ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] + %tmp4 = load ppc_fp128, ppc_fp128* %tmp, align 16 ; <ppc_fp128> [#uses=1] store ppc_fp128 %tmp4, ppc_fp128* %retval, align 16 br label %return return: ; preds = %entry - %retval5 = load ppc_fp128* %retval ; <ppc_fp128> [#uses=1] + %retval5 = load ppc_fp128, ppc_fp128* %retval ; <ppc_fp128> [#uses=1] ret ppc_fp128 %retval5 } diff --git a/test/CodeGen/PowerPC/ppcf128-endian.ll b/test/CodeGen/PowerPC/ppcf128-endian.ll index 180fedf5c9f..ee314c1db58 100644 --- a/test/CodeGen/PowerPC/ppcf128-endian.ll +++ b/test/CodeGen/PowerPC/ppcf128-endian.ll @@ -9,7 +9,7 @@ define void @callee(ppc_fp128 %x) { entry: %x.addr = alloca ppc_fp128, align 16 store ppc_fp128 %x, ppc_fp128* %x.addr, align 16 - %0 = load ppc_fp128* %x.addr, align 16 + %0 = load ppc_fp128, ppc_fp128* %x.addr, align 16 store ppc_fp128 %0, ppc_fp128* @g, align 16 ret void } @@ -21,7 +21,7 @@ entry: define void @caller() { entry: - %0 = load ppc_fp128* @g, align 16 + %0 = load ppc_fp128, ppc_fp128* @g, align 16 call void @test(ppc_fp128 %0) ret void } @@ -51,7 +51,7 @@ entry: define ppc_fp128 @result() { entry: - %0 = load ppc_fp128* @g, align 16 + %0 = load ppc_fp128, ppc_fp128* @g, align 16 ret ppc_fp128 %0 } ; CHECK: @result diff --git a/test/CodeGen/PowerPC/pr13891.ll b/test/CodeGen/PowerPC/pr13891.ll index 4be65dd43d6..5b695eb9f0d 100644 --- a/test/CodeGen/PowerPC/pr13891.ll +++ b/test/CodeGen/PowerPC/pr13891.ll @@ -10,7 +10,7 @@ define void @_Z5check3foos(%struct.foo* nocapture byval %f, i16 signext %i) noin ; CHECK: lha {{[0-9]+}}, {{[0-9]+}}(1) entry: %0 = bitcast %struct.foo* %f to i16* - %1 = load i16* %0, align 2 + %1 = load i16, i16* %0, align 2 %bf.val.sext = ashr i16 %1, 8 %cmp = icmp eq i16 %bf.val.sext, %i br i1 %cmp, label %if.end, label %if.then diff --git a/test/CodeGen/PowerPC/pr15031.ll b/test/CodeGen/PowerPC/pr15031.ll index f22c2d1013e..d1b9932ca22 100644 --- a/test/CodeGen/PowerPC/pr15031.ll +++ b/test/CodeGen/PowerPC/pr15031.ll @@ -300,7 +300,7 @@ define void @_ZN4llvm14MachineOperand12substPhysRegEjRKNS_18TargetRegisterInfoE( entry: %SubReg_TargetFlags.i = getelementptr inbounds %"class.llvm::MachineOperand", %"class.llvm::MachineOperand"* %this, i64 0, i32 1 %0 = bitcast [3 x i8]* %SubReg_TargetFlags.i to i24* - %bf.load.i = load i24* %0, align 1 + %bf.load.i = load i24, i24* %0, align 1 %bf.lshr.i = lshr i24 %bf.load.i, 12 %tobool = icmp eq i24 %bf.lshr.i, 0 br i1 %tobool, label %if.end, label %if.then @@ -309,7 +309,7 @@ if.then: ; preds = %entry %bf.cast.i = zext i24 %bf.lshr.i to i32 %add.ptr = getelementptr inbounds %"class.llvm::TargetRegisterInfo", %"class.llvm::TargetRegisterInfo"* %TRI, i64 0, i32 1 %call3 = tail call zeroext i32 @_ZNK4llvm14MCRegisterInfo9getSubRegEjj(%"class.llvm::MCRegisterInfo"* %add.ptr, i32 zeroext %Reg, i32 zeroext %bf.cast.i) - %bf.load.i10 = load i24* %0, align 1 + %bf.load.i10 = load i24, i24* %0, align 1 %bf.clear.i = and i24 %bf.load.i10, 4095 store i24 %bf.clear.i, i24* %0, align 1 br label %if.end @@ -317,31 +317,31 @@ if.then: ; preds = %entry if.end: ; preds = %entry, %if.then %Reg.addr.0 = phi i32 [ %call3, %if.then ], [ %Reg, %entry ] %RegNo.i.i = getelementptr inbounds %"class.llvm::MachineOperand", %"class.llvm::MachineOperand"* %this, i64 0, i32 2, i32 0 - %1 = load i32* %RegNo.i.i, align 4 + %1 = load i32, i32* %RegNo.i.i, align 4 %cmp.i = icmp eq i32 %1, %Reg.addr.0 br i1 %cmp.i, label %_ZN4llvm14MachineOperand6setRegEj.exit, label %if.end.i if.end.i: ; preds = %if.end %ParentMI.i.i = getelementptr inbounds %"class.llvm::MachineOperand", %"class.llvm::MachineOperand"* %this, i64 0, i32 3 - %2 = load %"class.llvm::MachineInstr"** %ParentMI.i.i, align 8 + %2 = load %"class.llvm::MachineInstr"*, %"class.llvm::MachineInstr"** %ParentMI.i.i, align 8 %tobool.i = icmp eq %"class.llvm::MachineInstr"* %2, null br i1 %tobool.i, label %if.end13.i, label %if.then3.i if.then3.i: ; preds = %if.end.i %Parent.i.i = getelementptr inbounds %"class.llvm::MachineInstr", %"class.llvm::MachineInstr"* %2, i64 0, i32 2 - %3 = load %"class.llvm::MachineBasicBlock"** %Parent.i.i, align 8 + %3 = load %"class.llvm::MachineBasicBlock"*, %"class.llvm::MachineBasicBlock"** %Parent.i.i, align 8 %tobool5.i = icmp eq %"class.llvm::MachineBasicBlock"* %3, null br i1 %tobool5.i, label %if.end13.i, label %if.then6.i if.then6.i: ; preds = %if.then3.i %xParent.i.i = getelementptr inbounds %"class.llvm::MachineBasicBlock", %"class.llvm::MachineBasicBlock"* %3, i64 0, i32 4 - %4 = load %"class.llvm::MachineFunction"** %xParent.i.i, align 8 + %4 = load %"class.llvm::MachineFunction"*, %"class.llvm::MachineFunction"** %xParent.i.i, align 8 %tobool8.i = icmp eq %"class.llvm::MachineFunction"* %4, null br i1 %tobool8.i, label %if.end13.i, label %if.then9.i if.then9.i: ; preds = %if.then6.i %RegInfo.i.i = getelementptr inbounds %"class.llvm::MachineFunction", %"class.llvm::MachineFunction"* %4, i64 0, i32 5 - %5 = load %"class.llvm::MachineRegisterInfo"** %RegInfo.i.i, align 8 + %5 = load %"class.llvm::MachineRegisterInfo"*, %"class.llvm::MachineRegisterInfo"** %RegInfo.i.i, align 8 tail call void @_ZN4llvm19MachineRegisterInfo27removeRegOperandFromUseListEPNS_14MachineOperandE(%"class.llvm::MachineRegisterInfo"* %5, %"class.llvm::MachineOperand"* %this) store i32 %Reg.addr.0, i32* %RegNo.i.i, align 4 tail call void @_ZN4llvm19MachineRegisterInfo22addRegOperandToUseListEPNS_14MachineOperandE(%"class.llvm::MachineRegisterInfo"* %5, %"class.llvm::MachineOperand"* %this) diff --git a/test/CodeGen/PowerPC/pr15630.ll b/test/CodeGen/PowerPC/pr15630.ll index 3c1b604f009..54a1b36868e 100644 --- a/test/CodeGen/PowerPC/pr15630.ll +++ b/test/CodeGen/PowerPC/pr15630.ll @@ -8,7 +8,7 @@ entry: %newval = alloca i8 %ordering = alloca i32, align 4 store i8 %newval_arg, i8* %newval - %tmp = load i8* %newval + %tmp = load i8, i8* %newval store atomic volatile i8 %tmp, i8* %val_arg seq_cst, align 1 ret void } diff --git a/test/CodeGen/PowerPC/pr16556-2.ll b/test/CodeGen/PowerPC/pr16556-2.ll index ee38b5e363e..82dec67b67d 100644 --- a/test/CodeGen/PowerPC/pr16556-2.ll +++ b/test/CodeGen/PowerPC/pr16556-2.ll @@ -23,15 +23,15 @@ entry: br i1 %tmp, label %noassert, label %assert assert: ; preds = %entry - %tmp1 = load { i32, i8* }* @.modulefilename + %tmp1 = load { i32, i8* }, { i32, i8* }* @.modulefilename %0 = call i8* @_d_assert_msg({ i32, i8* } { i32 9, i8* getelementptr inbounds ([10 x i8]* @.str83, i32 0, i32 0) }, { i32, i8* } %tmp1, i32 1586) unreachable noassert: ; preds = %entry %tmp2 = getelementptr %core.time.TickDuration, %core.time.TickDuration* %.this_arg, i32 0, i32 0 - %tmp3 = load i64* %tmp2 + %tmp3 = load i64, i64* %tmp2 %tmp4 = sitofp i64 %tmp3 to ppc_fp128 - %tmp5 = load i64* @_D4core4time12TickDuration11ticksPerSecyl + %tmp5 = load i64, i64* @_D4core4time12TickDuration11ticksPerSecyl %tmp6 = sitofp i64 %tmp5 to ppc_fp128 %tmp7 = fdiv ppc_fp128 %tmp6, 0xM80000000000000000000000000000000 %tmp8 = fdiv ppc_fp128 %tmp4, %tmp7 diff --git a/test/CodeGen/PowerPC/pr17168.ll b/test/CodeGen/PowerPC/pr17168.ll index 62a9ede0200..af507037ed6 100644 --- a/test/CodeGen/PowerPC/pr17168.ll +++ b/test/CodeGen/PowerPC/pr17168.ll @@ -24,7 +24,7 @@ for.cond968.preheader: ; preds = %for.cond968.prehead for.end1042: ; preds = %for.cond968.preheader, %for.cond964.preheader, %entry %0 = phi i32 [ undef, %for.cond964.preheader ], [ undef, %for.cond968.preheader ], [ undef, %entry ] - %1 = load i32* getelementptr inbounds ([3 x i32]* @grid_points, i64 0, i64 0), align 4, !dbg !443, !tbaa !444 + %1 = load i32, i32* getelementptr inbounds ([3 x i32]* @grid_points, i64 0, i64 0), align 4, !dbg !443, !tbaa !444 tail call void @llvm.dbg.value(metadata i32 1, i64 0, metadata !119, metadata !{!"0x102"}), !dbg !448 %sub10454270 = add nsw i32 %0, -1, !dbg !448 %cmp10464271 = icmp sgt i32 %sub10454270, 1, !dbg !448 diff --git a/test/CodeGen/PowerPC/pr18663.ll b/test/CodeGen/PowerPC/pr18663.ll index 1b85223aa09..04bc39276f9 100644 --- a/test/CodeGen/PowerPC/pr18663.ll +++ b/test/CodeGen/PowerPC/pr18663.ll @@ -61,21 +61,21 @@ define void @_ZNK18TriaObjectAccessorILi3ELi3EE10barycenterEv(%class.Point.1* noalias nocapture sret %agg.result, %class.TriaObjectAccessor.57* %this) #0 align 2 { entry: - %0 = load double* null, align 8 - %1 = load double* undef, align 8 + %0 = load double, double* null, align 8 + %1 = load double, double* undef, align 8 %call18 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 6) - %2 = load double* undef, align 8 + %2 = load double, double* undef, align 8 %call21 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 7) - %3 = load double* undef, align 8 + %3 = load double, double* undef, align 8 %call33 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 3) - %4 = load double* null, align 8 - %5 = load double* undef, align 8 + %4 = load double, double* null, align 8 + %5 = load double, double* undef, align 8 %call45 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 7) - %6 = load double* undef, align 8 + %6 = load double, double* undef, align 8 %call48 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 0) - %7 = load double* undef, align 8 + %7 = load double, double* undef, align 8 %call66 = tail call dereferenceable(24) %class.Point.1* @_ZNK18TriaObjectAccessorILi3ELi3EE6vertexEj(%class.TriaObjectAccessor.57* %this, i32 zeroext 6) - %8 = load double* undef, align 8 + %8 = load double, double* undef, align 8 %mul334 = fmul double undef, 2.000000e+00 %mul579 = fmul double %2, %5 %mul597 = fmul double undef, %mul579 diff --git a/test/CodeGen/PowerPC/pr20442.ll b/test/CodeGen/PowerPC/pr20442.ll index 167ff3d998b..555c3dae1f4 100644 --- a/test/CodeGen/PowerPC/pr20442.ll +++ b/test/CodeGen/PowerPC/pr20442.ll @@ -20,15 +20,15 @@ target triple = "powerpc-unknown-linux-gnu" ; Function Attrs: nounwind readonly uwtable define i32 @fn1() #0 { entry: - %0 = load %struct.anon** @b, align 4 + %0 = load %struct.anon*, %struct.anon** @b, align 4 %1 = ptrtoint %struct.anon* %0 to i32 %cmp = icmp sgt %struct.anon* %0, null - %2 = load %struct.anon.0** @a, align 4 + %2 = load %struct.anon.0*, %struct.anon.0** @a, align 4 br i1 %cmp, label %for.bodythread-pre-split, label %if.end8 for.bodythread-pre-split: ; preds = %entry %aclass = getelementptr inbounds %struct.anon.0, %struct.anon.0* %2, i32 0, i32 0 - %.pr = load i32* %aclass, align 4 + %.pr = load i32, i32* %aclass, align 4 br label %for.body for.body: ; preds = %for.bodythread-pre-split, %for.body @@ -52,9 +52,9 @@ while.cond: ; preds = %while.body while.body: ; preds = %while.body.lr.ph, %while.cond %j.110 = phi i32 [ %j.1.ph13, %while.body.lr.ph ], [ %inc7, %while.cond ] %aclass_index = getelementptr inbounds %struct.anon, %struct.anon* %0, i32 %j.110, i32 0 - %3 = load i32* %aclass_index, align 4 + %3 = load i32, i32* %aclass_index, align 4 %aclass5 = getelementptr inbounds %struct.anon.0, %struct.anon.0* %2, i32 %3, i32 0 - %4 = load i32* %aclass5, align 4 + %4 = load i32, i32* %aclass5, align 4 %tobool = icmp eq i32 %4, 0 %inc7 = add nsw i32 %j.110, 1 br i1 %tobool, label %while.cond, label %if.then6 diff --git a/test/CodeGen/PowerPC/preincprep-invoke.ll b/test/CodeGen/PowerPC/preincprep-invoke.ll index fcfec40c4c8..0e09ff1b774 100644 --- a/test/CodeGen/PowerPC/preincprep-invoke.ll +++ b/test/CodeGen/PowerPC/preincprep-invoke.ll @@ -36,7 +36,7 @@ invoke.cont4: ; preds = %invoke.cont for.cond.i.i30: ; preds = %for.cond.i.i30, %invoke.cont4 %indvars.iv.i.i26 = phi i64 [ %indvars.iv.next.i.i29, %for.cond.i.i30 ], [ 0, %invoke.cont4 ] %arrayidx.i.i27 = getelementptr inbounds i8, i8* %call7, i64 %indvars.iv.i.i26 - %0 = load i8* %arrayidx.i.i27, align 1 + %0 = load i8, i8* %arrayidx.i.i27, align 1 %indvars.iv.next.i.i29 = add nuw nsw i64 %indvars.iv.i.i26, 1 br label %for.cond.i.i30 diff --git a/test/CodeGen/PowerPC/private.ll b/test/CodeGen/PowerPC/private.ll index 633fa651037..4665fd246f3 100644 --- a/test/CodeGen/PowerPC/private.ll +++ b/test/CodeGen/PowerPC/private.ll @@ -19,7 +19,7 @@ define i32 @bar() nounwind { ; LINUX: lis{{.*}}.Lbaz ; OSX: lis{{.*}}l_baz - %1 = load i32* @baz, align 4 + %1 = load i32, i32* @baz, align 4 ret i32 %1 } diff --git a/test/CodeGen/PowerPC/pwr7-gt-nop.ll b/test/CodeGen/PowerPC/pwr7-gt-nop.ll index 8c8545d60df..70f6dad362b 100644 --- a/test/CodeGen/PowerPC/pwr7-gt-nop.ll +++ b/test/CodeGen/PowerPC/pwr7-gt-nop.ll @@ -8,11 +8,11 @@ define void @foo(float* nocapture %a, float* nocapture %b, float* nocapture read ; CHECK-LABEL: @foo entry: - %0 = load float* %b, align 4 + %0 = load float, float* %b, align 4 store float %0, float* %a, align 4 - %1 = load float* %c, align 4 + %1 = load float, float* %c, align 4 store float %1, float* %b, align 4 - %2 = load float* %a, align 4 + %2 = load float, float* %a, align 4 store float %2, float* %d, align 4 ret void diff --git a/test/CodeGen/PowerPC/qpx-load.ll b/test/CodeGen/PowerPC/qpx-load.ll index bea34774b34..7637c43850c 100644 --- a/test/CodeGen/PowerPC/qpx-load.ll +++ b/test/CodeGen/PowerPC/qpx-load.ll @@ -3,7 +3,7 @@ target triple = "powerpc64-bgq-linux" define <4 x double> @foo(<4 x double>* %p) { entry: - %v = load <4 x double>* %p, align 8 + %v = load <4 x double>, <4 x double>* %p, align 8 ret <4 x double> %v } @@ -17,7 +17,7 @@ entry: define <4 x double> @bar(<4 x double>* %p) { entry: - %v = load <4 x double>* %p, align 32 + %v = load <4 x double>, <4 x double>* %p, align 32 ret <4 x double> %v } diff --git a/test/CodeGen/PowerPC/qpx-s-load.ll b/test/CodeGen/PowerPC/qpx-s-load.ll index 1ca0ae6cfa6..db147126c1e 100644 --- a/test/CodeGen/PowerPC/qpx-s-load.ll +++ b/test/CodeGen/PowerPC/qpx-s-load.ll @@ -3,7 +3,7 @@ target triple = "powerpc64-bgq-linux" define <4 x float> @foo(<4 x float>* %p) { entry: - %v = load <4 x float>* %p, align 4 + %v = load <4 x float>, <4 x float>* %p, align 4 ret <4 x float> %v } @@ -17,7 +17,7 @@ entry: define <4 x float> @bar(<4 x float>* %p) { entry: - %v = load <4 x float>* %p, align 16 + %v = load <4 x float>, <4 x float>* %p, align 16 ret <4 x float> %v } diff --git a/test/CodeGen/PowerPC/qpx-s-sel.ll b/test/CodeGen/PowerPC/qpx-s-sel.ll index e3a2dd940a7..09a615c4597 100644 --- a/test/CodeGen/PowerPC/qpx-s-sel.ll +++ b/test/CodeGen/PowerPC/qpx-s-sel.ll @@ -46,7 +46,7 @@ entry: define <4 x i1> @test4(<4 x i1> %a) nounwind { entry: - %q = load <4 x i1>* @Q, align 16 + %q = load <4 x i1>, <4 x i1>* @Q, align 16 %v = and <4 x i1> %a, %q ret <4 x i1> %v diff --git a/test/CodeGen/PowerPC/qpx-sel.ll b/test/CodeGen/PowerPC/qpx-sel.ll index 68227355b7a..a375e6effba 100644 --- a/test/CodeGen/PowerPC/qpx-sel.ll +++ b/test/CodeGen/PowerPC/qpx-sel.ll @@ -50,7 +50,7 @@ entry: define <4 x i1> @test4(<4 x i1> %a) nounwind { entry: - %q = load <4 x i1>* @Q, align 16 + %q = load <4 x i1>, <4 x i1>* @Q, align 16 %v = and <4 x i1> %a, %q ret <4 x i1> %v diff --git a/test/CodeGen/PowerPC/qpx-unalperm.ll b/test/CodeGen/PowerPC/qpx-unalperm.ll index b074535c7be..51b340c5835 100644 --- a/test/CodeGen/PowerPC/qpx-unalperm.ll +++ b/test/CodeGen/PowerPC/qpx-unalperm.ll @@ -4,7 +4,7 @@ target triple = "powerpc64-bgq-linux" define <4 x double> @foo(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 32 + %r = load <4 x double>, <4 x double>* %a, align 32 ret <4 x double> %r ; CHECK: qvlfdx ; CHECK: blr @@ -12,9 +12,9 @@ entry: define <4 x double> @bar(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 8 + %r = load <4 x double>, <4 x double>* %a, align 8 %b = getelementptr <4 x double>, <4 x double>* %a, i32 16 - %s = load <4 x double>* %b, align 32 + %s = load <4 x double>, <4 x double>* %b, align 32 %t = fadd <4 x double> %r, %s ret <4 x double> %t ; CHECK: qvlpcldx @@ -25,38 +25,38 @@ entry: define <4 x double> @bar1(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 8 + %r = load <4 x double>, <4 x double>* %a, align 8 %b = getelementptr <4 x double>, <4 x double>* %a, i32 16 - %s = load <4 x double>* %b, align 8 + %s = load <4 x double>, <4 x double>* %b, align 8 %t = fadd <4 x double> %r, %s ret <4 x double> %t } define <4 x double> @bar2(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 8 + %r = load <4 x double>, <4 x double>* %a, align 8 %b = getelementptr <4 x double>, <4 x double>* %a, i32 1 - %s = load <4 x double>* %b, align 32 + %s = load <4 x double>, <4 x double>* %b, align 32 %t = fadd <4 x double> %r, %s ret <4 x double> %t } define <4 x double> @bar3(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 8 + %r = load <4 x double>, <4 x double>* %a, align 8 %b = getelementptr <4 x double>, <4 x double>* %a, i32 1 - %s = load <4 x double>* %b, align 8 + %s = load <4 x double>, <4 x double>* %b, align 8 %t = fadd <4 x double> %r, %s ret <4 x double> %t } define <4 x double> @bar4(<4 x double>* %a) { entry: - %r = load <4 x double>* %a, align 8 + %r = load <4 x double>, <4 x double>* %a, align 8 %b = getelementptr <4 x double>, <4 x double>* %a, i32 1 - %s = load <4 x double>* %b, align 8 + %s = load <4 x double>, <4 x double>* %b, align 8 %c = getelementptr <4 x double>, <4 x double>* %b, i32 1 - %t = load <4 x double>* %c, align 8 + %t = load <4 x double>, <4 x double>* %c, align 8 %u = fadd <4 x double> %r, %s %v = fadd <4 x double> %u, %t ret <4 x double> %v diff --git a/test/CodeGen/PowerPC/quadint-return.ll b/test/CodeGen/PowerPC/quadint-return.ll index 03499915e78..0743ce4a95c 100644 --- a/test/CodeGen/PowerPC/quadint-return.ll +++ b/test/CodeGen/PowerPC/quadint-return.ll @@ -8,7 +8,7 @@ define i128 @foo() nounwind { entry: %x = alloca i128, align 16 store i128 27, i128* %x, align 16 - %0 = load i128* %x, align 16 + %0 = load i128, i128* %x, align 16 ret i128 %0 } diff --git a/test/CodeGen/PowerPC/reg-coalesce-simple.ll b/test/CodeGen/PowerPC/reg-coalesce-simple.ll index 3d144985513..3f9cb8a7427 100644 --- a/test/CodeGen/PowerPC/reg-coalesce-simple.ll +++ b/test/CodeGen/PowerPC/reg-coalesce-simple.ll @@ -4,7 +4,7 @@ define i32 @test(%struct.foo* %X) nounwind { %tmp1 = getelementptr %struct.foo, %struct.foo* %X, i32 0, i32 2, i32 100 ; <i8*> [#uses=1] - %tmp = load i8* %tmp1 ; <i8> [#uses=1] + %tmp = load i8, i8* %tmp1 ; <i8> [#uses=1] %tmp2 = zext i8 %tmp to i32 ; <i32> [#uses=1] ret i32 %tmp2 } diff --git a/test/CodeGen/PowerPC/reloc-align.ll b/test/CodeGen/PowerPC/reloc-align.ll index 13d6adadfca..754997bccbd 100644 --- a/test/CodeGen/PowerPC/reloc-align.ll +++ b/test/CodeGen/PowerPC/reloc-align.ll @@ -24,7 +24,7 @@ entry: define internal fastcc signext i32 @func_90(%struct.S1* byval nocapture %p_91) #0 { entry: %0 = bitcast %struct.S1* %p_91 to i64* - %bf.load = load i64* %0, align 1 + %bf.load = load i64, i64* %0, align 1 %bf.shl = shl i64 %bf.load, 26 %bf.ashr = ashr i64 %bf.shl, 54 %bf.cast = trunc i64 %bf.ashr to i32 diff --git a/test/CodeGen/PowerPC/resolvefi-basereg.ll b/test/CodeGen/PowerPC/resolvefi-basereg.ll index 83199eeb7b5..0b173e9fbbb 100644 --- a/test/CodeGen/PowerPC/resolvefi-basereg.ll +++ b/test/CodeGen/PowerPC/resolvefi-basereg.ll @@ -42,14 +42,14 @@ entry: store i64 16, i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 8), align 8 store i64 16, i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 9), align 8 store i64 16, i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 10), align 8 - %0 = load i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 8), align 8 + %0 = load i64, i64* getelementptr inbounds (%struct.Info* @info, i32 0, i32 8), align 8 %sub = sub i64 %0, 1 %and = and i64 ptrtoint (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 3) to i64), %sub %tobool = icmp ne i64 %and, 0 br i1 %tobool, label %if.then, label %if.end if.then: ; preds = %entry - %1 = load i32* @fails, align 4 + %1 = load i32, i32* @fails, align 4 %inc = add nsw i32 %1, 1 store i32 %inc, i32* @fails, align 4 br label %if.end @@ -57,276 +57,276 @@ if.then: ; preds = %entry if.end: ; preds = %if.then, %entry store i32 0, i32* %i, align 4 store i32 0, i32* %j, align 4 - %2 = load i32* %i, align 4 + %2 = load i32, i32* %i, align 4 %idxprom = sext i32 %2 to i64 %arrayidx = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom store i8* bitcast (i32** getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 0, i64 1) to i8*), i8** %arrayidx, align 8 - %3 = load i32* %i, align 4 + %3 = load i32, i32* %i, align 4 %idxprom1 = sext i32 %3 to i64 %arrayidx2 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom1 store i64 8, i64* %arrayidx2, align 8 - %4 = load i32* %i, align 4 + %4 = load i32, i32* %i, align 4 %idxprom3 = sext i32 %4 to i64 %arrayidx4 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom3 store i64 8, i64* %arrayidx4, align 8 store i32* getelementptr inbounds ([256 x i32]* @intarray, i32 0, i64 190), i32** getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 0, i64 1), align 8 store i32* getelementptr inbounds ([256 x i32]* @intarray, i32 0, i64 241), i32** getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 0, i64 1), align 8 - %5 = load i32* %i, align 4 + %5 = load i32, i32* %i, align 4 %inc5 = add nsw i32 %5, 1 store i32 %inc5, i32* %i, align 4 - %6 = load i32* %i, align 4 + %6 = load i32, i32* %i, align 4 %idxprom6 = sext i32 %6 to i64 %arrayidx7 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom6 store i8* bitcast (i64* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 1) to i8*), i8** %arrayidx7, align 8 - %7 = load i32* %i, align 4 + %7 = load i32, i32* %i, align 4 %idxprom8 = sext i32 %7 to i64 %arrayidx9 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom8 store i64 8, i64* %arrayidx9, align 8 - %8 = load i32* %i, align 4 + %8 = load i32, i32* %i, align 4 %idxprom10 = sext i32 %8 to i64 %arrayidx11 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom10 store i64 8, i64* %arrayidx11, align 8 store i64 -3866974208859106459, i64* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 1), align 8 store i64 -185376695371304091, i64* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 1), align 8 - %9 = load i32* %i, align 4 + %9 = load i32, i32* %i, align 4 %inc12 = add nsw i32 %9, 1 store i32 %inc12, i32* %i, align 4 - %10 = load i32* %i, align 4 + %10 = load i32, i32* %i, align 4 %idxprom13 = sext i32 %10 to i64 %arrayidx14 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom13 store i8* bitcast (i64* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 2) to i8*), i8** %arrayidx14, align 8 - %11 = load i32* %i, align 4 + %11 = load i32, i32* %i, align 4 %idxprom15 = sext i32 %11 to i64 %arrayidx16 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom15 store i64 8, i64* %arrayidx16, align 8 - %12 = load i32* %i, align 4 + %12 = load i32, i32* %i, align 4 %idxprom17 = sext i32 %12 to i64 %arrayidx18 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom17 store i64 8, i64* %arrayidx18, align 8 store i64 -963638028680427187, i64* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 2), align 8 store i64 7510542175772455554, i64* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 2), align 8 - %13 = load i32* %i, align 4 + %13 = load i32, i32* %i, align 4 %inc19 = add nsw i32 %13, 1 store i32 %inc19, i32* %i, align 4 - %14 = load i32* %i, align 4 + %14 = load i32, i32* %i, align 4 %idxprom20 = sext i32 %14 to i64 %arrayidx21 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom20 store i8* bitcast (double* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 3) to i8*), i8** %arrayidx21, align 8 - %15 = load i32* %i, align 4 + %15 = load i32, i32* %i, align 4 %idxprom22 = sext i32 %15 to i64 %arrayidx23 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom22 store i64 8, i64* %arrayidx23, align 8 - %16 = load i32* %i, align 4 + %16 = load i32, i32* %i, align 4 %idxprom24 = sext i32 %16 to i64 %arrayidx25 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom24 store i64 16, i64* %arrayidx25, align 8 store double 0xC0F8783300000000, double* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 3), align 16 store double 0xC10DF3CCC0000000, double* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 3), align 16 - %17 = load i32* %i, align 4 + %17 = load i32, i32* %i, align 4 %inc26 = add nsw i32 %17, 1 store i32 %inc26, i32* %i, align 4 - %18 = load i32* %i, align 4 + %18 = load i32, i32* %i, align 4 %idxprom27 = sext i32 %18 to i64 %arrayidx28 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom27 store i8* bitcast (i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 4) to i8*), i8** %arrayidx28, align 8 - %19 = load i32* %i, align 4 + %19 = load i32, i32* %i, align 4 %idxprom29 = sext i32 %19 to i64 %arrayidx30 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom29 store i64 2, i64* %arrayidx30, align 8 - %20 = load i32* %i, align 4 + %20 = load i32, i32* %i, align 4 %idxprom31 = sext i32 %20 to i64 %arrayidx32 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom31 store i64 2, i64* %arrayidx32, align 8 store i16 -15897, i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 4), align 2 store i16 30935, i16* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 4), align 2 - %21 = load i32* %i, align 4 + %21 = load i32, i32* %i, align 4 %inc33 = add nsw i32 %21, 1 store i32 %inc33, i32* %i, align 4 store i32 -419541644, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 5), align 4 store i32 2125926812, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 5), align 4 - %22 = load i32* %j, align 4 + %22 = load i32, i32* %j, align 4 %inc34 = add nsw i32 %22, 1 store i32 %inc34, i32* %j, align 4 - %23 = load i32* %i, align 4 + %23 = load i32, i32* %i, align 4 %idxprom35 = sext i32 %23 to i64 %arrayidx36 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom35 store i8* bitcast (double* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 0, i64 0) to i8*), i8** %arrayidx36, align 8 - %24 = load i32* %i, align 4 + %24 = load i32, i32* %i, align 4 %idxprom37 = sext i32 %24 to i64 %arrayidx38 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom37 store i64 8, i64* %arrayidx38, align 8 - %25 = load i32* %i, align 4 + %25 = load i32, i32* %i, align 4 %idxprom39 = sext i32 %25 to i64 %arrayidx40 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom39 store i64 8, i64* %arrayidx40, align 8 store double 0xC0FC765780000000, double* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 0, i64 0), align 8 store double 0xC1025CD7A0000000, double* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 0, i64 0), align 8 - %26 = load i32* %i, align 4 + %26 = load i32, i32* %i, align 4 %inc41 = add nsw i32 %26, 1 store i32 %inc41, i32* %i, align 4 - %bf.load = load i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 1), align 8 + %bf.load = load i32, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 1), align 8 %bf.clear = and i32 %bf.load, 7 %bf.set = or i32 %bf.clear, 16 store i32 %bf.set, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 1), align 8 - %bf.load42 = load i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 1), align 8 + %bf.load42 = load i32, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 1), align 8 %bf.clear43 = and i32 %bf.load42, 7 %bf.set44 = or i32 %bf.clear43, 24 store i32 %bf.set44, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 1), align 8 - %27 = load i32* %j, align 4 + %27 = load i32, i32* %j, align 4 %inc45 = add nsw i32 %27, 1 store i32 %inc45, i32* %j, align 4 - %bf.load46 = load i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 2), align 4 + %bf.load46 = load i16, i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 2), align 4 %bf.clear47 = and i16 %bf.load46, 127 store i16 %bf.clear47, i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 2), align 4 - %bf.load48 = load i16* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 2), align 4 + %bf.load48 = load i16, i16* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 2), align 4 %bf.clear49 = and i16 %bf.load48, 127 store i16 %bf.clear49, i16* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 2), align 4 - %28 = load i32* %j, align 4 + %28 = load i32, i32* %j, align 4 %inc50 = add nsw i32 %28, 1 store i32 %inc50, i32* %j, align 4 - %bf.load51 = load i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 3), align 8 + %bf.load51 = load i32, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 3), align 8 %bf.clear52 = and i32 %bf.load51, 63 store i32 %bf.clear52, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 3), align 8 - %bf.load53 = load i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 3), align 8 + %bf.load53 = load i32, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 3), align 8 %bf.clear54 = and i32 %bf.load53, 63 %bf.set55 = or i32 %bf.clear54, 64 store i32 %bf.set55, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 3), align 8 - %29 = load i32* %j, align 4 + %29 = load i32, i32* %j, align 4 %inc56 = add nsw i32 %29, 1 store i32 %inc56, i32* %j, align 4 - %bf.load57 = load i24* bitcast ([3 x i8]* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 4) to i24*), align 4 + %bf.load57 = load i24, i24* bitcast ([3 x i8]* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 4) to i24*), align 4 %bf.clear58 = and i24 %bf.load57, 63 store i24 %bf.clear58, i24* bitcast ([3 x i8]* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 4) to i24*), align 4 - %bf.load59 = load i24* bitcast ([3 x i8]* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 4) to i24*), align 4 + %bf.load59 = load i24, i24* bitcast ([3 x i8]* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 4) to i24*), align 4 %bf.clear60 = and i24 %bf.load59, 63 store i24 %bf.clear60, i24* bitcast ([3 x i8]* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 4) to i24*), align 4 - %30 = load i32* %j, align 4 + %30 = load i32, i32* %j, align 4 %inc61 = add nsw i32 %30, 1 store i32 %inc61, i32* %j, align 4 - %31 = load i32* %i, align 4 + %31 = load i32, i32* %i, align 4 %idxprom62 = sext i32 %31 to i64 %arrayidx63 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom62 store i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 5, i64 5), i8** %arrayidx63, align 8 - %32 = load i32* %i, align 4 + %32 = load i32, i32* %i, align 4 %idxprom64 = sext i32 %32 to i64 %arrayidx65 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom64 store i64 1, i64* %arrayidx65, align 8 - %33 = load i32* %i, align 4 + %33 = load i32, i32* %i, align 4 %idxprom66 = sext i32 %33 to i64 %arrayidx67 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom66 store i64 1, i64* %arrayidx67, align 8 store i8 -83, i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 5, i64 5), align 1 store i8 -67, i8* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 5, i64 5), align 1 - %34 = load i32* %i, align 4 + %34 = load i32, i32* %i, align 4 %inc68 = add nsw i32 %34, 1 store i32 %inc68, i32* %i, align 4 - %35 = load i32* %i, align 4 + %35 = load i32, i32* %i, align 4 %idxprom69 = sext i32 %35 to i64 %arrayidx70 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom69 store i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 5, i64 1), i8** %arrayidx70, align 8 - %36 = load i32* %i, align 4 + %36 = load i32, i32* %i, align 4 %idxprom71 = sext i32 %36 to i64 %arrayidx72 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom71 store i64 1, i64* %arrayidx72, align 8 - %37 = load i32* %i, align 4 + %37 = load i32, i32* %i, align 4 %idxprom73 = sext i32 %37 to i64 %arrayidx74 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom73 store i64 1, i64* %arrayidx74, align 8 store i8 34, i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 5, i64 1), align 1 store i8 64, i8* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 5, i64 1), align 1 - %38 = load i32* %i, align 4 + %38 = load i32, i32* %i, align 4 %inc75 = add nsw i32 %38, 1 store i32 %inc75, i32* %i, align 4 - %39 = load i32* %i, align 4 + %39 = load i32, i32* %i, align 4 %idxprom76 = sext i32 %39 to i64 %arrayidx77 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom76 store i8* bitcast (i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 6, i64 3) to i8*), i8** %arrayidx77, align 8 - %40 = load i32* %i, align 4 + %40 = load i32, i32* %i, align 4 %idxprom78 = sext i32 %40 to i64 %arrayidx79 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom78 store i64 4, i64* %arrayidx79, align 8 - %41 = load i32* %i, align 4 + %41 = load i32, i32* %i, align 4 %idxprom80 = sext i32 %41 to i64 %arrayidx81 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom80 store i64 4, i64* %arrayidx81, align 8 store i32 -3, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 6, i64 3), align 4 store i32 -3, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 6, i64 3), align 4 - %42 = load i32* %i, align 4 + %42 = load i32, i32* %i, align 4 %inc82 = add nsw i32 %42, 1 store i32 %inc82, i32* %i, align 4 - %43 = load i32* %i, align 4 + %43 = load i32, i32* %i, align 4 %idxprom83 = sext i32 %43 to i64 %arrayidx84 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom83 store i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 7), i8** %arrayidx84, align 8 - %44 = load i32* %i, align 4 + %44 = load i32, i32* %i, align 4 %idxprom85 = sext i32 %44 to i64 %arrayidx86 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom85 store i64 1, i64* %arrayidx86, align 8 - %45 = load i32* %i, align 4 + %45 = load i32, i32* %i, align 4 %idxprom87 = sext i32 %45 to i64 %arrayidx88 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom87 store i64 1, i64* %arrayidx88, align 8 store i8 106, i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 6, i64 4, i32 7), align 1 store i8 -102, i8* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 6, i64 4, i32 7), align 1 - %46 = load i32* %i, align 4 + %46 = load i32, i32* %i, align 4 %inc89 = add nsw i32 %46, 1 store i32 %inc89, i32* %i, align 4 - %47 = load i32* %i, align 4 + %47 = load i32, i32* %i, align 4 %idxprom90 = sext i32 %47 to i64 %arrayidx91 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom90 store i8* bitcast (i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 7) to i8*), i8** %arrayidx91, align 8 - %48 = load i32* %i, align 4 + %48 = load i32, i32* %i, align 4 %idxprom92 = sext i32 %48 to i64 %arrayidx93 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom92 store i64 2, i64* %arrayidx93, align 8 - %49 = load i32* %i, align 4 + %49 = load i32, i32* %i, align 4 %idxprom94 = sext i32 %49 to i64 %arrayidx95 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom94 store i64 2, i64* %arrayidx95, align 8 store i16 29665, i16* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 7), align 2 store i16 7107, i16* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 7), align 2 - %50 = load i32* %i, align 4 + %50 = load i32, i32* %i, align 4 %inc96 = add nsw i32 %50, 1 store i32 %inc96, i32* %i, align 4 - %51 = load i32* %i, align 4 + %51 = load i32, i32* %i, align 4 %idxprom97 = sext i32 %51 to i64 %arrayidx98 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom97 store i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 8), i8** %arrayidx98, align 8 - %52 = load i32* %i, align 4 + %52 = load i32, i32* %i, align 4 %idxprom99 = sext i32 %52 to i64 %arrayidx100 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom99 store i64 1, i64* %arrayidx100, align 8 - %53 = load i32* %i, align 4 + %53 = load i32, i32* %i, align 4 %idxprom101 = sext i32 %53 to i64 %arrayidx102 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom101 store i64 1, i64* %arrayidx102, align 8 store i8 52, i8* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 8), align 1 store i8 -86, i8* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 8), align 1 - %54 = load i32* %i, align 4 + %54 = load i32, i32* %i, align 4 %inc103 = add nsw i32 %54, 1 store i32 %inc103, i32* %i, align 4 - %55 = load i32* %i, align 4 + %55 = load i32, i32* %i, align 4 %idxprom104 = sext i32 %55 to i64 %arrayidx105 = getelementptr inbounds [32 x i8*], [32 x i8*]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 5), i32 0, i64 %idxprom104 store i8* bitcast (i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 9) to i8*), i8** %arrayidx105, align 8 - %56 = load i32* %i, align 4 + %56 = load i32, i32* %i, align 4 %idxprom106 = sext i32 %56 to i64 %arrayidx107 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 7), i32 0, i64 %idxprom106 store i64 4, i64* %arrayidx107, align 8 - %57 = load i32* %i, align 4 + %57 = load i32, i32* %i, align 4 %idxprom108 = sext i32 %57 to i64 %arrayidx109 = getelementptr inbounds [32 x i64], [32 x i64]* getelementptr inbounds (%struct.Info* @info, i32 0, i32 11), i32 0, i64 %idxprom108 store i64 4, i64* %arrayidx109, align 8 store i32 -54118453, i32* getelementptr inbounds (%struct.S1998* @s1998, i32 0, i32 9), align 4 store i32 1668755823, i32* getelementptr inbounds ([5 x %struct.S1998]* @a1998, i32 0, i64 2, i32 9), align 4 - %58 = load i32* %i, align 4 + %58 = load i32, i32* %i, align 4 %inc110 = add nsw i32 %58, 1 store i32 %inc110, i32* %i, align 4 store i32 %inc110, i32* %tmp - %59 = load i32* %tmp - %60 = load i32* %i, align 4 + %59 = load i32, i32* %tmp + %60 = load i32, i32* %i, align 4 store i32 %60, i32* getelementptr inbounds (%struct.Info* @info, i32 0, i32 0), align 4 - %61 = load i32* %j, align 4 + %61 = load i32, i32* %j, align 4 store i32 %61, i32* getelementptr inbounds (%struct.Info* @info, i32 0, i32 1), align 4 %62 = bitcast %struct.S1998* %agg.tmp111 to i8* call void @llvm.memcpy.p0i8.p0i8.i64(i8* %62, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) diff --git a/test/CodeGen/PowerPC/resolvefi-disp.ll b/test/CodeGen/PowerPC/resolvefi-disp.ll index e91d720c3b4..62b70b04755 100644 --- a/test/CodeGen/PowerPC/resolvefi-disp.ll +++ b/test/CodeGen/PowerPC/resolvefi-disp.ll @@ -43,19 +43,19 @@ entry: call void @llvm.memset.p0i8.i64(i8* %8, i8 0, i64 11104, i32 32, i1 false) %b = getelementptr inbounds %struct.S2760, %struct.S2760* %arg0, i32 0, i32 1 %g = getelementptr inbounds %struct.anon, %struct.anon* %b, i32 0, i32 1 - %9 = load i64* %g, align 8 - %10 = load i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8 + %9 = load i64, i64* %g, align 8 + %10 = load i64, i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8 %cmp = icmp ne i64 %9, %10 br i1 %cmp, label %if.then, label %if.end if.then: ; preds = %entry - %11 = load i32* @fails, align 4 + %11 = load i32, i32* @fails, align 4 %inc = add nsw i32 %11, 1 store i32 %inc, i32* @fails, align 4 br label %if.end if.end: ; preds = %if.then, %entry - %12 = load i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8 + %12 = load i64, i64* getelementptr inbounds (%struct.S2760* @s2760, i32 0, i32 1, i32 1), align 8 %b3 = getelementptr inbounds %struct.S2760, %struct.S2760* %ret, i32 0, i32 1 %g4 = getelementptr inbounds %struct.anon, %struct.anon* %b3, i32 0, i32 1 store i64 %12, i64* %g4, align 8 diff --git a/test/CodeGen/PowerPC/return-val-i128.ll b/test/CodeGen/PowerPC/return-val-i128.ll index e14a43809a7..2f924096661 100644 --- a/test/CodeGen/PowerPC/return-val-i128.ll +++ b/test/CodeGen/PowerPC/return-val-i128.ll @@ -7,29 +7,29 @@ entry: %tmp = alloca i128, align 16 ; <i128*> [#uses=3] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store float %a, float* %a_addr - %tmp1 = load float* %a_addr, align 4 ; <float> [#uses=1] + %tmp1 = load float, float* %a_addr, align 4 ; <float> [#uses=1] %tmp2 = fcmp olt float %tmp1, 0.000000e+00 ; <i1> [#uses=1] %tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1] %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1] br i1 %toBool, label %bb, label %bb8 bb: ; preds = %entry - %tmp4 = load float* %a_addr, align 4 ; <float> [#uses=1] + %tmp4 = load float, float* %a_addr, align 4 ; <float> [#uses=1] %tmp5 = fsub float -0.000000e+00, %tmp4 ; <float> [#uses=1] %tmp6 = call i128 @__fixunssfDI( float %tmp5 ) nounwind ; <i128> [#uses=1] %tmp7 = sub i128 0, %tmp6 ; <i128> [#uses=1] store i128 %tmp7, i128* %tmp, align 16 br label %bb11 bb8: ; preds = %entry - %tmp9 = load float* %a_addr, align 4 ; <float> [#uses=1] + %tmp9 = load float, float* %a_addr, align 4 ; <float> [#uses=1] %tmp10 = call i128 @__fixunssfDI( float %tmp9 ) nounwind ; <i128> [#uses=1] store i128 %tmp10, i128* %tmp, align 16 br label %bb11 bb11: ; preds = %bb8, %bb - %tmp12 = load i128* %tmp, align 16 ; <i128> [#uses=1] + %tmp12 = load i128, i128* %tmp, align 16 ; <i128> [#uses=1] store i128 %tmp12, i128* %retval, align 16 br label %return return: ; preds = %bb11 - %retval13 = load i128* %retval ; <i128> [#uses=1] + %retval13 = load i128, i128* %retval ; <i128> [#uses=1] ret i128 %retval13 } diff --git a/test/CodeGen/PowerPC/rlwimi-and.ll b/test/CodeGen/PowerPC/rlwimi-and.ll index 9433f8e3dee..b9b0c915a1d 100644 --- a/test/CodeGen/PowerPC/rlwimi-and.ll +++ b/test/CodeGen/PowerPC/rlwimi-and.ll @@ -16,11 +16,11 @@ codeRepl12: ; preds = %codeRepl4 unreachable codeRepl17: ; preds = %codeRepl4 - %0 = load i8* undef, align 2 + %0 = load i8, i8* undef, align 2 %1 = and i8 %0, 1 %not.tobool.i.i.i = icmp eq i8 %1, 0 %2 = select i1 %not.tobool.i.i.i, i16 0, i16 256 - %3 = load i8* undef, align 1 + %3 = load i8, i8* undef, align 1 %4 = and i8 %3, 1 %not.tobool.i.1.i.i = icmp eq i8 %4, 0 %rvml38.sroa.1.1.insert.ext = select i1 %not.tobool.i.1.i.i, i16 0, i16 1 diff --git a/test/CodeGen/PowerPC/rlwimi-commute.ll b/test/CodeGen/PowerPC/rlwimi-commute.ll index 3f90008c006..cd0f49ed780 100644 --- a/test/CodeGen/PowerPC/rlwimi-commute.ll +++ b/test/CodeGen/PowerPC/rlwimi-commute.ll @@ -4,8 +4,8 @@ ; Make sure there is no register-register copies here. define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) { - %A.upgrd.1 = load i32* %A ; <i32> [#uses=2] - %B.upgrd.2 = load i32* %B ; <i32> [#uses=1] + %A.upgrd.1 = load i32, i32* %A ; <i32> [#uses=2] + %B.upgrd.2 = load i32, i32* %B ; <i32> [#uses=1] %X = and i32 %A.upgrd.1, 15 ; <i32> [#uses=1] %Y = and i32 %B.upgrd.2, -16 ; <i32> [#uses=1] %Z = or i32 %X, %Y ; <i32> [#uses=1] @@ -15,8 +15,8 @@ define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) { } define void @test2(i32* %A, i32* %B, i32* %D, i32* %E) { - %A.upgrd.3 = load i32* %A ; <i32> [#uses=1] - %B.upgrd.4 = load i32* %B ; <i32> [#uses=2] + %A.upgrd.3 = load i32, i32* %A ; <i32> [#uses=1] + %B.upgrd.4 = load i32, i32* %B ; <i32> [#uses=2] %X = and i32 %A.upgrd.3, 15 ; <i32> [#uses=1] %Y = and i32 %B.upgrd.4, -16 ; <i32> [#uses=1] %Z = or i32 %X, %Y ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/rlwimi-dyn-and.ll b/test/CodeGen/PowerPC/rlwimi-dyn-and.ll index e02801fafbf..76f3da66dd0 100644 --- a/test/CodeGen/PowerPC/rlwimi-dyn-and.ll +++ b/test/CodeGen/PowerPC/rlwimi-dyn-and.ll @@ -4,13 +4,13 @@ target triple = "powerpc64-unknown-linux-gnu" define i32 @test1() #0 { entry: - %conv67.reload = load i32* undef + %conv67.reload = load i32, i32* undef %const = bitcast i32 65535 to i32 br label %next next: %shl161 = shl nuw nsw i32 %conv67.reload, 15 - %0 = load i8* undef, align 1 + %0 = load i8, i8* undef, align 1 %conv169 = zext i8 %0 to i32 %shl170 = shl nuw nsw i32 %conv169, 7 %const_mat = add i32 %const, -32767 @@ -25,13 +25,13 @@ next: define i32 @test2() #0 { entry: - %conv67.reload = load i32* undef + %conv67.reload = load i32, i32* undef %const = bitcast i32 65535 to i32 br label %next next: %shl161 = shl nuw nsw i32 %conv67.reload, 15 - %0 = load i8* undef, align 1 + %0 = load i8, i8* undef, align 1 %conv169 = zext i8 %0 to i32 %shl170 = shl nuw nsw i32 %conv169, 7 %shl161.masked = and i32 %shl161, 32768 diff --git a/test/CodeGen/PowerPC/rm-zext.ll b/test/CodeGen/PowerPC/rm-zext.ll index 33995e114d2..97c546c0145 100644 --- a/test/CodeGen/PowerPC/rm-zext.ll +++ b/test/CodeGen/PowerPC/rm-zext.ll @@ -45,7 +45,7 @@ declare i32 @llvm.bswap.i32(i32) #0 ; Function Attrs: nounwind readonly define zeroext i32 @bs32(i32* nocapture readonly %x) #1 { entry: - %0 = load i32* %x, align 4 + %0 = load i32, i32* %x, align 4 %1 = tail call i32 @llvm.bswap.i32(i32 %0) ret i32 %1 @@ -57,7 +57,7 @@ entry: ; Function Attrs: nounwind readonly define zeroext i16 @bs16(i16* nocapture readonly %x) #1 { entry: - %0 = load i16* %x, align 2 + %0 = load i16, i16* %x, align 2 %1 = tail call i16 @llvm.bswap.i16(i16 %0) ret i16 %1 diff --git a/test/CodeGen/PowerPC/rs-undef-use.ll b/test/CodeGen/PowerPC/rs-undef-use.ll index 24dd5fd9da9..007931e7407 100644 --- a/test/CodeGen/PowerPC/rs-undef-use.ll +++ b/test/CodeGen/PowerPC/rs-undef-use.ll @@ -15,7 +15,7 @@ CF82.critedge: ; preds = %CF br label %CF82 CF82: ; preds = %CF82, %CF82.critedge - %L17 = load i8* %0 + %L17 = load i8, i8* %0 %E18 = extractelement <2 x i64> undef, i32 0 %PC = bitcast <2 x i1>* %A3 to i64* br i1 undef, label %CF82, label %CF84.critedge @@ -25,13 +25,13 @@ CF84.critedge: ; preds = %CF82 br label %CF84 CF84: ; preds = %CF84, %CF84.critedge - %L40 = load i64* %PC + %L40 = load i64, i64* %PC store i64 -1, i64* %PC %Sl46 = select i1 undef, i1 undef, i1 false br i1 %Sl46, label %CF84, label %CF85 CF85: ; preds = %CF84 - %L47 = load i64* %PC + %L47 = load i64, i64* %PC store i64 %E18, i64* %PC %PC52 = bitcast <8 x i32>* %A2 to ppc_fp128* store ppc_fp128 0xM4D436562A0416DE00000000000000000, ppc_fp128* %PC52 diff --git a/test/CodeGen/PowerPC/s000-alias-misched.ll b/test/CodeGen/PowerPC/s000-alias-misched.ll index f67b9f20827..8e29635c51d 100644 --- a/test/CodeGen/PowerPC/s000-alias-misched.ll +++ b/test/CodeGen/PowerPC/s000-alias-misched.ll @@ -37,7 +37,7 @@ for.body4: ; preds = %for.body4, %for.con %arrayidx = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv %arrayidx6 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv %0 = bitcast double* %arrayidx to <1 x double>* - %1 = load <1 x double>* %0, align 32 + %1 = load <1 x double>, <1 x double>* %0, align 32 %add = fadd <1 x double> %1, <double 1.000000e+00> %2 = bitcast double* %arrayidx6 to <1 x double>* store <1 x double> %add, <1 x double>* %2, align 32 @@ -45,7 +45,7 @@ for.body4: ; preds = %for.body4, %for.con %arrayidx.4 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.322 %arrayidx6.4 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.322 %3 = bitcast double* %arrayidx.4 to <1 x double>* - %4 = load <1 x double>* %3, align 32 + %4 = load <1 x double>, <1 x double>* %3, align 32 %add.4 = fadd <1 x double> %4, <double 1.000000e+00> %5 = bitcast double* %arrayidx6.4 to <1 x double>* store <1 x double> %add.4, <1 x double>* %5, align 32 @@ -53,7 +53,7 @@ for.body4: ; preds = %for.body4, %for.con %arrayidx.8 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.726 %arrayidx6.8 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.726 %6 = bitcast double* %arrayidx.8 to <1 x double>* - %7 = load <1 x double>* %6, align 32 + %7 = load <1 x double>, <1 x double>* %6, align 32 %add.8 = fadd <1 x double> %7, <double 1.000000e+00> %8 = bitcast double* %arrayidx6.8 to <1 x double>* store <1 x double> %add.8, <1 x double>* %8, align 32 @@ -61,7 +61,7 @@ for.body4: ; preds = %for.body4, %for.con %arrayidx.12 = getelementptr inbounds [16000 x double], [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1130 %arrayidx6.12 = getelementptr inbounds [16000 x double], [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1130 %9 = bitcast double* %arrayidx.12 to <1 x double>* - %10 = load <1 x double>* %9, align 32 + %10 = load <1 x double>, <1 x double>* %9, align 32 %add.12 = fadd <1 x double> %10, <double 1.000000e+00> %11 = bitcast double* %arrayidx6.12 to <1 x double>* store <1 x double> %add.12, <1 x double>* %11, align 32 diff --git a/test/CodeGen/PowerPC/sjlj.ll b/test/CodeGen/PowerPC/sjlj.ll index f9f887af31f..682cee467d5 100644 --- a/test/CodeGen/PowerPC/sjlj.ll +++ b/test/CodeGen/PowerPC/sjlj.ll @@ -55,7 +55,7 @@ if.end: ; preds = %if.else br label %return return: ; preds = %if.end, %if.then - %3 = load i32* %retval + %3 = load i32, i32* %retval ret i32 %3 ; FIXME: We should be saving VRSAVE on Darwin, but we're not! @@ -128,7 +128,7 @@ if.end: ; preds = %if.else br label %return return: ; preds = %if.end, %if.then - %3 = load i32* %retval + %3 = load i32, i32* %retval ret i32 %3 ; CHECK: @main2 diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll index 19ca0985eef..3cef817689b 100644 --- a/test/CodeGen/PowerPC/small-arguments.ll +++ b/test/CodeGen/PowerPC/small-arguments.ll @@ -26,14 +26,14 @@ UnifiedReturnBlock: } define i32 @test4(i16* %P) { - %tmp.1 = load i16* %P + %tmp.1 = load i16, i16* %P %tmp.2 = zext i16 %tmp.1 to i32 %tmp.3 = and i32 %tmp.2, 255 ret i32 %tmp.3 } define i32 @test5(i16* %P) { - %tmp.1 = load i16* %P + %tmp.1 = load i16, i16* %P %tmp.2 = bitcast i16 %tmp.1 to i16 %tmp.3 = zext i16 %tmp.2 to i32 %tmp.4 = and i32 %tmp.3, 255 @@ -41,7 +41,7 @@ define i32 @test5(i16* %P) { } define i32 @test6(i32* %P) { - %tmp.1 = load i32* %P + %tmp.1 = load i32, i32* %P %tmp.2 = and i32 %tmp.1, 255 ret i32 %tmp.2 } diff --git a/test/CodeGen/PowerPC/split-index-tc.ll b/test/CodeGen/PowerPC/split-index-tc.ll index 1b27be7cf26..38be93f28a8 100644 --- a/test/CodeGen/PowerPC/split-index-tc.ll +++ b/test/CodeGen/PowerPC/split-index-tc.ll @@ -13,7 +13,7 @@ define void @_ZN4llvm17ScheduleDAGInstrs14addPhysRegDepsEPNS_5SUnitEj() #0 align ; CHECK-NOT: lhzu entry: - %0 = load %"class.llvm::MachineOperand"** undef, align 8 + %0 = load %"class.llvm::MachineOperand"*, %"class.llvm::MachineOperand"** undef, align 8 br i1 undef, label %_ZNK4llvm14MachineOperand6getRegEv.exit, label %cond.false.i123 cond.false.i123: ; preds = %_ZN4llvm12MachineInstr10getOperandEj.exit @@ -22,7 +22,7 @@ cond.false.i123: ; preds = %_ZN4llvm12MachineIn _ZNK4llvm14MachineOperand6getRegEv.exit: ; preds = %_ZN4llvm12MachineInstr10getOperandEj.exit %IsDef.i = getelementptr inbounds %"class.llvm::MachineOperand", %"class.llvm::MachineOperand"* %0, i64 undef, i32 1 %1 = bitcast [3 x i8]* %IsDef.i to i24* - %bf.load.i = load i24* %1, align 1 + %bf.load.i = load i24, i24* %1, align 1 %2 = and i24 %bf.load.i, 128 br i1 undef, label %for.cond.cleanup, label %for.body.lr.ph @@ -61,7 +61,7 @@ cond.false.i257: ; preds = %if.end55 unreachable _ZNK4llvm14MachineOperand6isDeadEv.exit262: ; preds = %if.end55 - %bf.load.i259 = load i24* %1, align 1 + %bf.load.i259 = load i24, i24* %1, align 1 br i1 undef, label %if.then57, label %if.else59 if.then57: ; preds = %_ZNK4llvm14MachineOperand6isDeadEv.exit262 diff --git a/test/CodeGen/PowerPC/stack-protector.ll b/test/CodeGen/PowerPC/stack-protector.ll index b81d94181cd..bb59ac470f7 100644 --- a/test/CodeGen/PowerPC/stack-protector.ll +++ b/test/CodeGen/PowerPC/stack-protector.ll @@ -11,7 +11,7 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i8* %a, i8** %a_addr %buf1 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1] - %0 = load i8** %a_addr, align 4 ; <i8*> [#uses=1] + %0 = load i8*, i8** %a_addr, align 4 ; <i8*> [#uses=1] %1 = call i8* @strcpy(i8* %buf1, i8* %0) nounwind ; <i8*> [#uses=0] %buf2 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1] %2 = call i32 (i8*, ...)* @printf(i8* getelementptr ([11 x i8]* @"\01LC", i32 0, i32 0), i8* %buf2) nounwind ; <i32> [#uses=0] diff --git a/test/CodeGen/PowerPC/stack-realign.ll b/test/CodeGen/PowerPC/stack-realign.ll index bc668a14e4a..00aee56199b 100644 --- a/test/CodeGen/PowerPC/stack-realign.ll +++ b/test/CodeGen/PowerPC/stack-realign.ll @@ -15,12 +15,12 @@ define void @goo(%struct.s* byval nocapture readonly %a) { entry: %x = alloca [2 x i32], align 32 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 - %0 = load i32* %a1, align 4 + %0 = load i32, i32* %a1, align 4 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 store i32 %0, i32* %arrayidx, align 32 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 - %1 = load i32* %b, align 4 - %2 = load i32* @barbaz, align 4 + %1 = load i32, i32* %b, align 4 + %2 = load i32, i32* @barbaz, align 4 %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1 store i32 %2, i32* %arrayidx2, align 4 call void @bar(i32* %arrayidx) @@ -99,11 +99,11 @@ define void @hoo(%struct.s* byval nocapture readonly %a) { entry: %x = alloca [200000 x i32], align 32 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 - %0 = load i32* %a1, align 4 + %0 = load i32, i32* %a1, align 4 %arrayidx = getelementptr inbounds [200000 x i32], [200000 x i32]* %x, i64 0, i64 0 store i32 %0, i32* %arrayidx, align 32 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 - %1 = load i32* %b, align 4 + %1 = load i32, i32* %b, align 4 %arrayidx2 = getelementptr inbounds [200000 x i32], [200000 x i32]* %x, i64 0, i64 1 store i32 %1, i32* %arrayidx2, align 4 call void @bar(i32* %arrayidx) @@ -160,11 +160,11 @@ define void @loo(%struct.s* byval nocapture readonly %a) { entry: %x = alloca [2 x i32], align 32 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 - %0 = load i32* %a1, align 4 + %0 = load i32, i32* %a1, align 4 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 store i32 %0, i32* %arrayidx, align 32 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 - %1 = load i32* %b, align 4 + %1 = load i32, i32* %b, align 4 %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1 store i32 %1, i32* %arrayidx2, align 4 call void @bar(i32* %arrayidx) diff --git a/test/CodeGen/PowerPC/std-unal-fi.ll b/test/CodeGen/PowerPC/std-unal-fi.ll index 8b9606e1624..74ea8cd373b 100644 --- a/test/CodeGen/PowerPC/std-unal-fi.ll +++ b/test/CodeGen/PowerPC/std-unal-fi.ll @@ -9,7 +9,7 @@ BB: br label %CF CF: ; preds = %CF80, %CF, %BB - %L5 = load i64* undef + %L5 = load i64, i64* undef store i8 %0, i8* %A4 %Shuff7 = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 undef, i32 20, i32 22, i32 24, i32 26> %PC10 = bitcast i8* %A4 to ppc_fp128* @@ -19,13 +19,13 @@ CF77: ; preds = %CF81, %CF83, %CF77, br i1 undef, label %CF77, label %CF82 CF82: ; preds = %CF82, %CF77 - %L19 = load i64* undef + %L19 = load i64, i64* undef store <1 x ppc_fp128> zeroinitializer, <1 x ppc_fp128>* %A store i8 -65, i8* %A4 br i1 undef, label %CF82, label %CF83 CF83: ; preds = %CF82 - %L34 = load i64* undef + %L34 = load i64, i64* undef br i1 undef, label %CF77, label %CF81 CF81: ; preds = %CF83 @@ -54,7 +54,7 @@ define void @autogen_SD88042(i8*, i32*, i8) { BB: %A4 = alloca <2 x i1> %A = alloca <16 x float> - %L = load i8* %0 + %L = load i8, i8* %0 %Sl = select i1 false, <16 x float>* %A, <16 x float>* %A %PC = bitcast <2 x i1>* %A4 to i64* %Sl27 = select i1 false, i8 undef, i8 %L @@ -66,7 +66,7 @@ CF: ; preds = %CF78, %CF, %BB CF77: ; preds = %CF80, %CF77, %CF store <16 x float> zeroinitializer, <16 x float>* %Sl - %L58 = load i32* %PC33 + %L58 = load i32, i32* %PC33 store i8 0, i8* %0 br i1 undef, label %CF77, label %CF80 @@ -90,7 +90,7 @@ BB: %A1 = alloca i1 %I8 = insertelement <1 x i32> <i32 -1>, i32 454855, i32 0 %Cmp = icmp ult <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, undef - %L10 = load i64* %2 + %L10 = load i64, i64* %2 %E11 = extractelement <4 x i1> %Cmp, i32 2 br label %CF72 @@ -103,7 +103,7 @@ CF72: ; preds = %CF74, %CF72, %BB CF74: ; preds = %CF72 store i8 0, i8* %0 %PC = bitcast i1* %A1 to i64* - %L31 = load i64* %PC + %L31 = load i64, i64* %PC store i64 477323, i64* %PC %Sl37 = select i1 false, i32* undef, i32* %1 %Cmp38 = icmp ugt i1 undef, undef diff --git a/test/CodeGen/PowerPC/store-load-fwd.ll b/test/CodeGen/PowerPC/store-load-fwd.ll index 25663c1ac68..62dd79ec18a 100644 --- a/test/CodeGen/PowerPC/store-load-fwd.ll +++ b/test/CodeGen/PowerPC/store-load-fwd.ll @@ -2,7 +2,7 @@ define i32 @test(i32* %P) { store i32 1, i32* %P - %V = load i32* %P ; <i32> [#uses=1] + %V = load i32, i32* %P ; <i32> [#uses=1] ret i32 %V } diff --git a/test/CodeGen/PowerPC/structsinmem.ll b/test/CodeGen/PowerPC/structsinmem.ll index 5d94e5ab017..4b51e3a2642 100644 --- a/test/CodeGen/PowerPC/structsinmem.ll +++ b/test/CodeGen/PowerPC/structsinmem.ll @@ -89,27 +89,27 @@ entry: store i32 %z7, i32* %z7.addr, align 4 store i32 %z8, i32* %z8.addr, align 4 %a = getelementptr inbounds %struct.s1, %struct.s1* %v1, i32 0, i32 0 - %0 = load i8* %a, align 1 + %0 = load i8, i8* %a, align 1 %conv = zext i8 %0 to i32 %a1 = getelementptr inbounds %struct.s2, %struct.s2* %v2, i32 0, i32 0 - %1 = load i16* %a1, align 2 + %1 = load i16, i16* %a1, align 2 %conv2 = sext i16 %1 to i32 %add = add nsw i32 %conv, %conv2 %a3 = getelementptr inbounds %struct.s3, %struct.s3* %v3, i32 0, i32 0 - %2 = load i16* %a3, align 2 + %2 = load i16, i16* %a3, align 2 %conv4 = sext i16 %2 to i32 %add5 = add nsw i32 %add, %conv4 %a6 = getelementptr inbounds %struct.s4, %struct.s4* %v4, i32 0, i32 0 - %3 = load i32* %a6, align 4 + %3 = load i32, i32* %a6, align 4 %add7 = add nsw i32 %add5, %3 %a8 = getelementptr inbounds %struct.s5, %struct.s5* %v5, i32 0, i32 0 - %4 = load i32* %a8, align 4 + %4 = load i32, i32* %a8, align 4 %add9 = add nsw i32 %add7, %4 %a10 = getelementptr inbounds %struct.s6, %struct.s6* %v6, i32 0, i32 0 - %5 = load i32* %a10, align 4 + %5 = load i32, i32* %a10, align 4 %add11 = add nsw i32 %add9, %5 %a12 = getelementptr inbounds %struct.s7, %struct.s7* %v7, i32 0, i32 0 - %6 = load i32* %a12, align 4 + %6 = load i32, i32* %a12, align 4 %add13 = add nsw i32 %add11, %6 ret i32 %add13 @@ -181,27 +181,27 @@ entry: store i32 %z7, i32* %z7.addr, align 4 store i32 %z8, i32* %z8.addr, align 4 %a = getelementptr inbounds %struct.t1, %struct.t1* %v1, i32 0, i32 0 - %0 = load i8* %a, align 1 + %0 = load i8, i8* %a, align 1 %conv = zext i8 %0 to i32 %a1 = getelementptr inbounds %struct.t2, %struct.t2* %v2, i32 0, i32 0 - %1 = load i16* %a1, align 1 + %1 = load i16, i16* %a1, align 1 %conv2 = sext i16 %1 to i32 %add = add nsw i32 %conv, %conv2 %a3 = getelementptr inbounds %struct.t3, %struct.t3* %v3, i32 0, i32 0 - %2 = load i16* %a3, align 1 + %2 = load i16, i16* %a3, align 1 %conv4 = sext i16 %2 to i32 %add5 = add nsw i32 %add, %conv4 %a6 = getelementptr inbounds %struct.t4, %struct.t4* %v4, i32 0, i32 0 - %3 = load i32* %a6, align 1 + %3 = load i32, i32* %a6, align 1 %add7 = add nsw i32 %add5, %3 %a8 = getelementptr inbounds %struct.t5, %struct.t5* %v5, i32 0, i32 0 - %4 = load i32* %a8, align 1 + %4 = load i32, i32* %a8, align 1 %add9 = add nsw i32 %add7, %4 %a10 = getelementptr inbounds %struct.t6, %struct.t6* %v6, i32 0, i32 0 - %5 = load i32* %a10, align 1 + %5 = load i32, i32* %a10, align 1 %add11 = add nsw i32 %add9, %5 %a12 = getelementptr inbounds %struct.t7, %struct.t7* %v7, i32 0, i32 0 - %6 = load i32* %a12, align 1 + %6 = load i32, i32* %a12, align 1 %add13 = add nsw i32 %add11, %6 ret i32 %add13 diff --git a/test/CodeGen/PowerPC/structsinregs.ll b/test/CodeGen/PowerPC/structsinregs.ll index 1eea3111b18..a5a4b2a3cee 100644 --- a/test/CodeGen/PowerPC/structsinregs.ll +++ b/test/CodeGen/PowerPC/structsinregs.ll @@ -73,27 +73,27 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, define internal i32 @callee1(%struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind { entry: %a = getelementptr inbounds %struct.s1, %struct.s1* %v1, i32 0, i32 0 - %0 = load i8* %a, align 1 + %0 = load i8, i8* %a, align 1 %conv = zext i8 %0 to i32 %a1 = getelementptr inbounds %struct.s2, %struct.s2* %v2, i32 0, i32 0 - %1 = load i16* %a1, align 2 + %1 = load i16, i16* %a1, align 2 %conv2 = sext i16 %1 to i32 %add = add nsw i32 %conv, %conv2 %a3 = getelementptr inbounds %struct.s3, %struct.s3* %v3, i32 0, i32 0 - %2 = load i16* %a3, align 2 + %2 = load i16, i16* %a3, align 2 %conv4 = sext i16 %2 to i32 %add5 = add nsw i32 %add, %conv4 %a6 = getelementptr inbounds %struct.s4, %struct.s4* %v4, i32 0, i32 0 - %3 = load i32* %a6, align 4 + %3 = load i32, i32* %a6, align 4 %add7 = add nsw i32 %add5, %3 %a8 = getelementptr inbounds %struct.s5, %struct.s5* %v5, i32 0, i32 0 - %4 = load i32* %a8, align 4 + %4 = load i32, i32* %a8, align 4 %add9 = add nsw i32 %add7, %4 %a10 = getelementptr inbounds %struct.s6, %struct.s6* %v6, i32 0, i32 0 - %5 = load i32* %a10, align 4 + %5 = load i32, i32* %a10, align 4 %add11 = add nsw i32 %add9, %5 %a12 = getelementptr inbounds %struct.s7, %struct.s7* %v7, i32 0, i32 0 - %6 = load i32* %a12, align 4 + %6 = load i32, i32* %a12, align 4 %add13 = add nsw i32 %add11, %6 ret i32 %add13 @@ -160,27 +160,27 @@ entry: define internal i32 @callee2(%struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind { entry: %a = getelementptr inbounds %struct.t1, %struct.t1* %v1, i32 0, i32 0 - %0 = load i8* %a, align 1 + %0 = load i8, i8* %a, align 1 %conv = zext i8 %0 to i32 %a1 = getelementptr inbounds %struct.t2, %struct.t2* %v2, i32 0, i32 0 - %1 = load i16* %a1, align 1 + %1 = load i16, i16* %a1, align 1 %conv2 = sext i16 %1 to i32 %add = add nsw i32 %conv, %conv2 %a3 = getelementptr inbounds %struct.t3, %struct.t3* %v3, i32 0, i32 0 - %2 = load i16* %a3, align 1 + %2 = load i16, i16* %a3, align 1 %conv4 = sext i16 %2 to i32 %add5 = add nsw i32 %add, %conv4 %a6 = getelementptr inbounds %struct.t4, %struct.t4* %v4, i32 0, i32 0 - %3 = load i32* %a6, align 1 + %3 = load i32, i32* %a6, align 1 %add7 = add nsw i32 %add5, %3 %a8 = getelementptr inbounds %struct.t5, %struct.t5* %v5, i32 0, i32 0 - %4 = load i32* %a8, align 1 + %4 = load i32, i32* %a8, align 1 %add9 = add nsw i32 %add7, %4 %a10 = getelementptr inbounds %struct.t6, %struct.t6* %v6, i32 0, i32 0 - %5 = load i32* %a10, align 1 + %5 = load i32, i32* %a10, align 1 %add11 = add nsw i32 %add9, %5 %a12 = getelementptr inbounds %struct.t7, %struct.t7* %v7, i32 0, i32 0 - %6 = load i32* %a12, align 1 + %6 = load i32, i32* %a12, align 1 %add13 = add nsw i32 %add11, %6 ret i32 %add13 diff --git a/test/CodeGen/PowerPC/subreg-postra-2.ll b/test/CodeGen/PowerPC/subreg-postra-2.ll index 105a84595c6..893e4b9e8ae 100644 --- a/test/CodeGen/PowerPC/subreg-postra-2.ll +++ b/test/CodeGen/PowerPC/subreg-postra-2.ll @@ -134,7 +134,7 @@ while.body392.lr.ph: ; preds = %do.body378 br label %while.body392 while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph - %0 = load i8** undef, align 8 + %0 = load i8*, i8** undef, align 8 %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* %tobool.i1316 = icmp eq i64 undef, 0 @@ -144,7 +144,7 @@ if.then.i1317: ; preds = %while.body392 unreachable wait_on_buffer.exit1319: ; preds = %while.body392 - %1 = load volatile i64* %b_state.i.i1314, align 8 + %1 = load volatile i64, i64* %b_state.i.i1314, align 8 %conv.i.i1322 = and i64 %1, 1 %lnot404 = icmp eq i64 %conv.i.i1322, 0 %.err.4 = select i1 %lnot404, i32 -5, i32 undef diff --git a/test/CodeGen/PowerPC/subreg-postra.ll b/test/CodeGen/PowerPC/subreg-postra.ll index 9a97fb1b48b..fa5fd7e1c76 100644 --- a/test/CodeGen/PowerPC/subreg-postra.ll +++ b/test/CodeGen/PowerPC/subreg-postra.ll @@ -120,7 +120,7 @@ while.body392.lr.ph: ; preds = %do.body378 br label %while.body392 while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph - %0 = load i8** undef, align 8 + %0 = load i8*, i8** undef, align 8 %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* %tobool.i1316 = icmp eq i64 undef, 0 @@ -130,13 +130,13 @@ if.then.i1317: ; preds = %while.body392 unreachable wait_on_buffer.exit1319: ; preds = %while.body392 - %1 = load volatile i64* %b_state.i.i1314, align 8 + %1 = load volatile i64, i64* %b_state.i.i1314, align 8 %conv.i.i1322 = and i64 %1, 1 %lnot404 = icmp eq i64 %conv.i.i1322, 0 %.err.4 = select i1 %lnot404, i32 -5, i32 undef %2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #1 %prev.i.i.i1325 = getelementptr inbounds i8, i8* %0, i64 8 - %3 = load i32** null, align 8 + %3 = load i32*, i32** null, align 8 store i32* %3, i32** undef, align 8 call void @__brelse(i32* undef) #1 br i1 undef, label %while.end418, label %while.body392 diff --git a/test/CodeGen/PowerPC/subsumes-pred-regs.ll b/test/CodeGen/PowerPC/subsumes-pred-regs.ll index c510e36cb41..5389c131844 100644 --- a/test/CodeGen/PowerPC/subsumes-pred-regs.ll +++ b/test/CodeGen/PowerPC/subsumes-pred-regs.ll @@ -20,7 +20,7 @@ if.then: ; preds = %lor.end br i1 undef, label %return, label %if.end.i24 if.end.i24: ; preds = %if.then - %0 = load i32* undef, align 4 + %0 = load i32, i32* undef, align 4 %lnot.i.i16.i23 = icmp eq i32 %0, 0 br i1 %lnot.i.i16.i23, label %if.end7.i37, label %test.exit27.i34 diff --git a/test/CodeGen/PowerPC/tls-cse.ll b/test/CodeGen/PowerPC/tls-cse.ll index aaa9591fc45..43bf94888cb 100644 --- a/test/CodeGen/PowerPC/tls-cse.ll +++ b/test/CodeGen/PowerPC/tls-cse.ll @@ -25,7 +25,7 @@ define void @_ZN4llvm21PrettyStackTraceEntryD0Ev(%"class.llvm::PrettyStackTraceE entry: %0 = getelementptr inbounds %"class.llvm::PrettyStackTraceEntry", %"class.llvm::PrettyStackTraceEntry"* %this, i64 0, i32 0 store i32 (...)** bitcast (i8** getelementptr inbounds ([5 x i8*]* @_ZTVN4llvm21PrettyStackTraceEntryE, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, align 8 - %1 = load %"class.llvm::PrettyStackTraceEntry"** @_ZL20PrettyStackTraceHead, align 8 + %1 = load %"class.llvm::PrettyStackTraceEntry"*, %"class.llvm::PrettyStackTraceEntry"** @_ZL20PrettyStackTraceHead, align 8 %cmp.i = icmp eq %"class.llvm::PrettyStackTraceEntry"* %1, %this br i1 %cmp.i, label %_ZN4llvm21PrettyStackTraceEntryD2Ev.exit, label %cond.false.i @@ -36,7 +36,7 @@ cond.false.i: ; preds = %entry _ZN4llvm21PrettyStackTraceEntryD2Ev.exit: ; preds = %entry %NextEntry.i.i = getelementptr inbounds %"class.llvm::PrettyStackTraceEntry", %"class.llvm::PrettyStackTraceEntry"* %this, i64 0, i32 1 %2 = bitcast %"class.llvm::PrettyStackTraceEntry"** %NextEntry.i.i to i64* - %3 = load i64* %2, align 8 + %3 = load i64, i64* %2, align 8 store i64 %3, i64* bitcast (%"class.llvm::PrettyStackTraceEntry"** @_ZL20PrettyStackTraceHead to i64*), align 8 %4 = bitcast %"class.llvm::PrettyStackTraceEntry"* %this to i8* tail call void @_ZdlPv(i8* %4) diff --git a/test/CodeGen/PowerPC/tls-pic.ll b/test/CodeGen/PowerPC/tls-pic.ll index 6c671b07e75..b7d9298685d 100644 --- a/test/CodeGen/PowerPC/tls-pic.ll +++ b/test/CodeGen/PowerPC/tls-pic.ll @@ -13,7 +13,7 @@ define signext i32 @main() nounwind { entry: %retval = alloca i32, align 4 store i32 0, i32* %retval - %0 = load i32* @a, align 4 + %0 = load i32, i32* @a, align 4 ret i32 %0 } @@ -55,7 +55,7 @@ define signext i32 @main2() nounwind { entry: %retval = alloca i32, align 4 store i32 0, i32* %retval - %0 = load i32* @a2, align 4 + %0 = load i32, i32* @a2, align 4 ret i32 %0 } diff --git a/test/CodeGen/PowerPC/tls.ll b/test/CodeGen/PowerPC/tls.ll index 59b4de75598..c96e444e02c 100644 --- a/test/CodeGen/PowerPC/tls.ll +++ b/test/CodeGen/PowerPC/tls.ll @@ -30,7 +30,7 @@ define signext i32 @main2() nounwind { entry: %retval = alloca i32, align 4 store i32 0, i32* %retval - %0 = load i32* @a2, align 4 + %0 = load i32, i32* @a2, align 4 ret i32 %0 } diff --git a/test/CodeGen/PowerPC/toc-load-sched-bug.ll b/test/CodeGen/PowerPC/toc-load-sched-bug.ll index 2dd9b1cb543..2437fd47a46 100644 --- a/test/CodeGen/PowerPC/toc-load-sched-bug.ll +++ b/test/CodeGen/PowerPC/toc-load-sched-bug.ll @@ -177,48 +177,48 @@ entry: %ref.tmp = alloca %"class.llvm::SMDiagnostic", align 8 %ref.tmp5 = alloca %"class.std::basic_string", align 8 %_M_p.i.i.i = getelementptr inbounds %"class.std::basic_string", %"class.std::basic_string"* %Filename, i64 0, i32 0, i32 0 - %0 = load i8** %_M_p.i.i.i, align 8, !tbaa !1 + %0 = load i8*, i8** %_M_p.i.i.i, align 8, !tbaa !1 %1 = ptrtoint i8* %0 to i64 %arrayidx.i.i.i = getelementptr inbounds i8, i8* %0, i64 -24 %_M_length.i.i = bitcast i8* %arrayidx.i.i.i to i64* - %2 = load i64* %_M_length.i.i, align 8, !tbaa !7 + %2 = load i64, i64* %_M_length.i.i, align 8, !tbaa !7 %.fca.0.insert18 = insertvalue [2 x i64] undef, i64 %1, 0 %.fca.1.insert21 = insertvalue [2 x i64] %.fca.0.insert18, i64 %2, 1 call void @_ZN4llvm12MemoryBuffer14getFileOrSTDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1) #3 %HasError.i24 = getelementptr inbounds %"class.llvm::ErrorOr", %"class.llvm::ErrorOr"* %FileOrErr, i64 0, i32 1 - %bf.load.i25 = load i8* %HasError.i24, align 8 + %bf.load.i25 = load i8, i8* %HasError.i24, align 8 %3 = and i8 %bf.load.i25, 1 %bf.cast.i26 = icmp eq i8 %3, 0 br i1 %bf.cast.i26, label %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE3getEv.exit, label %_ZNK4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE8getErrorEv.exit _ZNK4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE8getErrorEv.exit: ; preds = %entry %retval.sroa.0.0..sroa_cast.i = bitcast %"class.llvm::ErrorOr"* %FileOrErr to i64* - %retval.sroa.0.0.copyload.i = load i64* %retval.sroa.0.0..sroa_cast.i, align 8 + %retval.sroa.0.0.copyload.i = load i64, i64* %retval.sroa.0.0..sroa_cast.i, align 8 %retval.sroa.3.0..sroa_idx.i = getelementptr inbounds %"class.llvm::ErrorOr", %"class.llvm::ErrorOr"* %FileOrErr, i64 0, i32 0, i32 0, i32 0, i32 0, i64 8 %retval.sroa.3.0..sroa_cast.i = bitcast i8* %retval.sroa.3.0..sroa_idx.i to i64* - %retval.sroa.3.0.copyload.i = load i64* %retval.sroa.3.0..sroa_cast.i, align 8 + %retval.sroa.3.0.copyload.i = load i64, i64* %retval.sroa.3.0..sroa_cast.i, align 8 %phitmp = trunc i64 %retval.sroa.0.0.copyload.i to i32 %cmp.i = icmp eq i32 %phitmp, 0 br i1 %cmp.i, label %cond.false.i.i, label %if.then if.then: ; preds = %_ZNK4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE8getErrorEv.exit %.c = inttoptr i64 %retval.sroa.3.0.copyload.i to %"class.std::error_category"* - %4 = load i8** %_M_p.i.i.i, align 8, !tbaa !1 + %4 = load i8*, i8** %_M_p.i.i.i, align 8, !tbaa !1 %arrayidx.i.i.i30 = getelementptr inbounds i8, i8* %4, i64 -24 %_M_length.i.i31 = bitcast i8* %arrayidx.i.i.i30 to i64* - %5 = load i64* %_M_length.i.i31, align 8, !tbaa !7 + %5 = load i64, i64* %_M_length.i.i31, align 8, !tbaa !7 %6 = inttoptr i64 %retval.sroa.3.0.copyload.i to void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*** - %vtable.i = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*** %6, align 8, !tbaa !11 + %vtable.i = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)**, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*** %6, align 8, !tbaa !11 %vfn.i = getelementptr inbounds void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vtable.i, i64 3 - %7 = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vfn.i, align 8 + %7 = load void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)*, void (%"class.std::basic_string"*, %"class.std::error_category"*, i32)** %vfn.i, align 8 call void %7(%"class.std::basic_string"* sret %ref.tmp5, %"class.std::error_category"* %.c, i32 signext %phitmp) #3 %call2.i.i = call dereferenceable(8) %"class.std::basic_string"* @_ZNSs6insertEmPKcm(%"class.std::basic_string"* %ref.tmp5, i64 0, i8* getelementptr inbounds ([28 x i8]* @.str, i64 0, i64 0), i64 27) #3 %_M_p2.i.i.i.i = getelementptr inbounds %"class.std::basic_string", %"class.std::basic_string"* %call2.i.i, i64 0, i32 0, i32 0 - %8 = load i8** %_M_p2.i.i.i.i, align 8, !tbaa !13 + %8 = load i8*, i8** %_M_p2.i.i.i.i, align 8, !tbaa !13 store i8* bitcast (i64* getelementptr inbounds ([0 x i64]* @_ZNSs4_Rep20_S_empty_rep_storageE, i64 0, i64 3) to i8*), i8** %_M_p2.i.i.i.i, align 8, !tbaa !1 %arrayidx.i.i.i36 = getelementptr inbounds i8, i8* %8, i64 -24 %_M_length.i.i37 = bitcast i8* %arrayidx.i.i.i36 to i64* - %9 = load i64* %_M_length.i.i37, align 8, !tbaa !7 + %9 = load i64, i64* %_M_length.i.i37, align 8, !tbaa !7 %Filename.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %ref.tmp, i64 0, i32 2 %10 = getelementptr inbounds %"class.std::allocator", %"class.std::allocator"* %ref.tmp.i.i2.i, i64 0, i32 0 %11 = bitcast %"class.llvm::SMDiagnostic"* %ref.tmp to i8* @@ -289,21 +289,21 @@ _ZN4llvm12SMDiagnosticC2ENS_9StringRefENS_9SourceMgr8DiagKindES1_.exit: ; preds call void @_ZNSs4swapERSs(%"class.std::basic_string"* %LineContents.i, %"class.std::basic_string"* dereferenceable(8) %LineContents7.i) #3 %Ranges.i41 = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %Err, i64 0, i32 8 %_M_start.i7.i.i.i = getelementptr inbounds %"class.std::vector.79", %"class.std::vector.79"* %Ranges.i41, i64 0, i32 0, i32 0, i32 0 - %18 = load %"struct.std::pair"** %_M_start.i7.i.i.i, align 8, !tbaa !27 + %18 = load %"struct.std::pair"*, %"struct.std::pair"** %_M_start.i7.i.i.i, align 8, !tbaa !27 %_M_finish.i9.i.i.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %Err, i64 0, i32 8, i32 0, i32 0, i32 1 %_M_end_of_storage.i11.i.i.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %Err, i64 0, i32 8, i32 0, i32 0, i32 2 %_M_start2.i.i.i.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %ref.tmp, i64 0, i32 8, i32 0, i32 0, i32 0 %19 = bitcast %"class.std::vector.79"* %Ranges.i41 to i8* call void @llvm.memset.p0i8.i64(i8* %19, i8 0, i64 16, i32 8, i1 false) #3 - %20 = load %"struct.std::pair"** %_M_start2.i.i.i.i, align 8, !tbaa !27 + %20 = load %"struct.std::pair"*, %"struct.std::pair"** %_M_start2.i.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* %20, %"struct.std::pair"** %_M_start.i7.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* null, %"struct.std::pair"** %_M_start2.i.i.i.i, align 8, !tbaa !27 %_M_finish3.i.i.i.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %ref.tmp, i64 0, i32 8, i32 0, i32 0, i32 1 - %21 = load %"struct.std::pair"** %_M_finish3.i.i.i.i, align 8, !tbaa !27 + %21 = load %"struct.std::pair"*, %"struct.std::pair"** %_M_finish3.i.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* %21, %"struct.std::pair"** %_M_finish.i9.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* null, %"struct.std::pair"** %_M_finish3.i.i.i.i, align 8, !tbaa !27 %_M_end_of_storage4.i.i.i.i = getelementptr inbounds %"class.llvm::SMDiagnostic", %"class.llvm::SMDiagnostic"* %ref.tmp, i64 0, i32 8, i32 0, i32 0, i32 2 - %22 = load %"struct.std::pair"** %_M_end_of_storage4.i.i.i.i, align 8, !tbaa !27 + %22 = load %"struct.std::pair"*, %"struct.std::pair"** %_M_end_of_storage4.i.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* %22, %"struct.std::pair"** %_M_end_of_storage.i11.i.i.i, align 8, !tbaa !27 store %"struct.std::pair"* null, %"struct.std::pair"** %_M_end_of_storage4.i.i.i.i, align 8, !tbaa !27 %tobool.i.i.i.i.i.i = icmp eq %"struct.std::pair"* %18, null @@ -335,12 +335,12 @@ if.then.i.i.i.i: ; preds = %if.then.i.i.i45 call void @llvm.lifetime.start(i64 4, i8* %.atomicdst.i.i.i.i.i.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..sroa_cast) %29 = atomicrmw volatile add i32* %28, i32 -1 acq_rel store i32 %29, i32* %.atomicdst.i.i.i.i.i, align 4 - %.atomicdst.i.i.i.i.i.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..atomicdst.0..atomicdst.0..i.i.i.i.i = load volatile i32* %.atomicdst.i.i.i.i.i, align 4 + %.atomicdst.i.i.i.i.i.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..atomicdst.0..atomicdst.0..i.i.i.i.i = load volatile i32, i32* %.atomicdst.i.i.i.i.i, align 4 call void @llvm.lifetime.end(i64 4, i8* %.atomicdst.i.i.i.i.i.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..sroa_cast) br label %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i.i if.else.i.i.i.i: ; preds = %if.then.i.i.i45 - %30 = load i32* %28, align 4, !tbaa !29 + %30 = load i32, i32* %28, align 4, !tbaa !29 %add.i.i.i.i.i = add nsw i32 %30, -1 store i32 %add.i.i.i.i.i, i32* %28, align 4, !tbaa !29 br label %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i.i @@ -359,7 +359,7 @@ _ZNSsD1Ev.exit: ; preds = %_ZN4llvm12SMDiagnos %31 = getelementptr inbounds %"class.std::allocator", %"class.std::allocator"* %ref.tmp.i.i47, i64 0, i32 0 call void @llvm.lifetime.start(i64 1, i8* %31) #3 %_M_p.i.i.i.i48 = getelementptr inbounds %"class.std::basic_string", %"class.std::basic_string"* %ref.tmp5, i64 0, i32 0, i32 0 - %32 = load i8** %_M_p.i.i.i.i48, align 8, !tbaa !1 + %32 = load i8*, i8** %_M_p.i.i.i.i48, align 8, !tbaa !1 %arrayidx.i.i.i49 = getelementptr inbounds i8, i8* %32, i64 -24 %33 = bitcast i8* %arrayidx.i.i.i49 to %"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Rep"* %cmp.i.i.i50 = icmp eq i8* %arrayidx.i.i.i49, bitcast ([0 x i64]* @_ZNSs4_Rep20_S_empty_rep_storageE to i8*) @@ -375,12 +375,12 @@ if.then.i.i.i.i55: ; preds = %if.then.i.i.i52 call void @llvm.lifetime.start(i64 4, i8* %.atomicdst.i.i.i.i.i46.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..sroa_cast) %35 = atomicrmw volatile add i32* %34, i32 -1 acq_rel store i32 %35, i32* %.atomicdst.i.i.i.i.i46, align 4 - %.atomicdst.i.i.i.i.i46.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..atomicdst.0..atomicdst.0..i.i.i.i.i54 = load volatile i32* %.atomicdst.i.i.i.i.i46, align 4 + %.atomicdst.i.i.i.i.i46.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..atomicdst.0..atomicdst.0..i.i.i.i.i54 = load volatile i32, i32* %.atomicdst.i.i.i.i.i46, align 4 call void @llvm.lifetime.end(i64 4, i8* %.atomicdst.i.i.i.i.i46.0..atomicdst.i.i.i.i.0..atomicdst.i.i.i.0..atomicdst.i.i.0..atomicdst.i.0..sroa_cast) br label %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i.i60 if.else.i.i.i.i57: ; preds = %if.then.i.i.i52 - %36 = load i32* %34, align 4, !tbaa !29 + %36 = load i32, i32* %34, align 4, !tbaa !29 %add.i.i.i.i.i56 = add nsw i32 %36, -1 store i32 %add.i.i.i.i.i56, i32* %34, align 4, !tbaa !29 br label %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i.i60 @@ -404,28 +404,28 @@ cond.false.i.i: ; preds = %_ZNK4llvm7ErrorOrIS _ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE3getEv.exit: ; preds = %entry %_M_head_impl.i.i.i.i.i = bitcast %"class.llvm::ErrorOr"* %FileOrErr to %"class.llvm::MemoryBuffer"** - %37 = load %"class.llvm::MemoryBuffer"** %_M_head_impl.i.i.i.i.i, align 8, !tbaa !27 + %37 = load %"class.llvm::MemoryBuffer"*, %"class.llvm::MemoryBuffer"** %_M_head_impl.i.i.i.i.i, align 8, !tbaa !27 %call9 = call %"class.llvm::Module"* @_ZN4llvm7ParseIREPNS_12MemoryBufferERNS_12SMDiagnosticERNS_11LLVMContextE(%"class.llvm::MemoryBuffer"* %37, %"class.llvm::SMDiagnostic"* dereferenceable(200) %Err, %"class.llvm::LLVMContext"* dereferenceable(8) %Context) br label %cleanup cleanup: ; preds = %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE3getEv.exit, %_ZNSsD1Ev.exit62 %retval.0 = phi %"class.llvm::Module"* [ null, %_ZNSsD1Ev.exit62 ], [ %call9, %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE3getEv.exit ] - %bf.load.i = load i8* %HasError.i24, align 8 + %bf.load.i = load i8, i8* %HasError.i24, align 8 %38 = and i8 %bf.load.i, 1 %bf.cast.i = icmp eq i8 %38, 0 br i1 %bf.cast.i, label %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE10getStorageEv.exit.i, label %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEED2Ev.exit _ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE10getStorageEv.exit.i: ; preds = %cleanup %_M_head_impl.i.i.i.i.i.i = bitcast %"class.llvm::ErrorOr"* %FileOrErr to %"class.llvm::MemoryBuffer"** - %39 = load %"class.llvm::MemoryBuffer"** %_M_head_impl.i.i.i.i.i.i, align 8, !tbaa !27 + %39 = load %"class.llvm::MemoryBuffer"*, %"class.llvm::MemoryBuffer"** %_M_head_impl.i.i.i.i.i.i, align 8, !tbaa !27 %cmp.i.i = icmp eq %"class.llvm::MemoryBuffer"* %39, null br i1 %cmp.i.i, label %_ZNSt10unique_ptrIN4llvm12MemoryBufferESt14default_deleteIS1_EED2Ev.exit.i, label %_ZNKSt14default_deleteIN4llvm12MemoryBufferEEclEPS1_.exit.i.i _ZNKSt14default_deleteIN4llvm12MemoryBufferEEclEPS1_.exit.i.i: ; preds = %_ZN4llvm7ErrorOrISt10unique_ptrINS_12MemoryBufferESt14default_deleteIS2_EEE10getStorageEv.exit.i %40 = bitcast %"class.llvm::MemoryBuffer"* %39 to void (%"class.llvm::MemoryBuffer"*)*** - %vtable.i.i.i = load void (%"class.llvm::MemoryBuffer"*)*** %40, align 8, !tbaa !11 + %vtable.i.i.i = load void (%"class.llvm::MemoryBuffer"*)**, void (%"class.llvm::MemoryBuffer"*)*** %40, align 8, !tbaa !11 %vfn.i.i.i = getelementptr inbounds void (%"class.llvm::MemoryBuffer"*)*, void (%"class.llvm::MemoryBuffer"*)** %vtable.i.i.i, i64 1 - %41 = load void (%"class.llvm::MemoryBuffer"*)** %vfn.i.i.i, align 8 + %41 = load void (%"class.llvm::MemoryBuffer"*)*, void (%"class.llvm::MemoryBuffer"*)** %vfn.i.i.i, align 8 call void %41(%"class.llvm::MemoryBuffer"* %39) #3 br label %_ZNSt10unique_ptrIN4llvm12MemoryBufferESt14default_deleteIS1_EED2Ev.exit.i diff --git a/test/CodeGen/PowerPC/trampoline.ll b/test/CodeGen/PowerPC/trampoline.ll index fdc426b499c..f6269e19bd5 100644 --- a/test/CodeGen/PowerPC/trampoline.ll +++ b/test/CodeGen/PowerPC/trampoline.ll @@ -63,7 +63,7 @@ entry: store %struct.objc_selector* %_cmd, %struct.objc_selector** %_cmd_addr store %struct.NSZone* %zone, %struct.NSZone** %zone_addr %3 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]", %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1] - %4 = load %struct.NSBitmapImageRep** %self_addr, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] + %4 = load %struct.NSBitmapImageRep*, %struct.NSBitmapImageRep** %self_addr, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] store %struct.NSBitmapImageRep* %4, %struct.NSBitmapImageRep** %3, align 4 %TRAMP.91 = bitcast %struct.__builtin_trampoline* %TRAMP.9 to i8* ; <i8*> [#uses=1] %FRAME.72 = bitcast %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7 to i8* ; <i8*> [#uses=1] @@ -71,7 +71,7 @@ entry: %tramp = call i8* @llvm.adjust.trampoline(i8* %TRAMP.91) store i8* %tramp, i8** %0, align 4 %5 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]", %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 1 ; <void (%struct.__block_1*, %struct.CGImage*)**> [#uses=1] - %6 = load i8** %0, align 4 ; <i8*> [#uses=1] + %6 = load i8*, i8** %0, align 4 ; <i8*> [#uses=1] %7 = bitcast i8* %6 to void (%struct.__block_1*, %struct.CGImage*)* ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1] store void (%struct.__block_1*, %struct.CGImage*)* %7, void (%struct.__block_1*, %struct.CGImage*)** %5, align 4 store %struct.NSBitmapImageRep* null, %struct.NSBitmapImageRep** %new, align 4 @@ -85,32 +85,32 @@ entry: %13 = getelementptr %struct.__invoke_impl, %struct.__invoke_impl* %12, i32 0, i32 2 ; <i32*> [#uses=1] store i32 24, i32* %13, align 4 %14 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]", %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 1 ; <void (%struct.__block_1*, %struct.CGImage*)**> [#uses=1] - %15 = load void (%struct.__block_1*, %struct.CGImage*)** %14, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1] + %15 = load void (%struct.__block_1*, %struct.CGImage*)*, void (%struct.__block_1*, %struct.CGImage*)** %14, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1] store void (%struct.__block_1*, %struct.CGImage*)* %15, void (%struct.__block_1*, %struct.CGImage*)** %1, align 4 %16 = getelementptr %struct.__block_1, %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 0 ; <%struct.__invoke_impl*> [#uses=1] %17 = getelementptr %struct.__invoke_impl, %struct.__invoke_impl* %16, i32 0, i32 3 ; <i8**> [#uses=1] - %18 = load void (%struct.__block_1*, %struct.CGImage*)** %1, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1] + %18 = load void (%struct.__block_1*, %struct.CGImage*)*, void (%struct.__block_1*, %struct.CGImage*)** %1, align 4 ; <void (%struct.__block_1*, %struct.CGImage*)*> [#uses=1] %19 = bitcast void (%struct.__block_1*, %struct.CGImage*)* %18 to i8* ; <i8*> [#uses=1] store i8* %19, i8** %17, align 4 %20 = getelementptr %struct.__block_1, %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 1 ; <%struct.NSZone**> [#uses=1] - %21 = load %struct.NSZone** %zone_addr, align 4 ; <%struct.NSZone*> [#uses=1] + %21 = load %struct.NSZone*, %struct.NSZone** %zone_addr, align 4 ; <%struct.NSZone*> [#uses=1] store %struct.NSZone* %21, %struct.NSZone** %20, align 4 %22 = getelementptr %struct.__block_1, %struct.__block_1* %__block_holder_tmp_1.0, i32 0, i32 2 ; <%struct.NSBitmapImageRep***> [#uses=1] store %struct.NSBitmapImageRep** %new, %struct.NSBitmapImageRep*** %22, align 4 %23 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]", %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %FRAME.7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1] - %24 = load %struct.NSBitmapImageRep** %23, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] + %24 = load %struct.NSBitmapImageRep*, %struct.NSBitmapImageRep** %23, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] store %struct.NSBitmapImageRep* %24, %struct.NSBitmapImageRep** %2, align 4 - %25 = load %struct.NSBitmapImageRep** %2, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] + %25 = load %struct.NSBitmapImageRep*, %struct.NSBitmapImageRep** %2, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] %26 = bitcast %struct.NSBitmapImageRep* %25 to %struct.objc_object* ; <%struct.objc_object*> [#uses=1] store %struct.objc_object* %26, %struct.objc_object** %self.1, align 4 - %27 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_1", align 4 ; <%struct.objc_selector*> [#uses=1] + %27 = load %struct.objc_selector*, %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_1", align 4 ; <%struct.objc_selector*> [#uses=1] %__block_holder_tmp_1.03 = bitcast %struct.__block_1* %__block_holder_tmp_1.0 to void (%struct.CGImage*)* ; <void (%struct.CGImage*)*> [#uses=1] - %28 = load %struct.objc_object** %self.1, align 4 ; <%struct.objc_object*> [#uses=1] + %28 = load %struct.objc_object*, %struct.objc_object** %self.1, align 4 ; <%struct.objc_object*> [#uses=1] %29 = call %struct.objc_object* (%struct.objc_object*, %struct.objc_selector*, ...)* inttoptr (i64 4294901504 to %struct.objc_object* (%struct.objc_object*, %struct.objc_selector*, ...)*)(%struct.objc_object* %28, %struct.objc_selector* %27, void (%struct.CGImage*)* %__block_holder_tmp_1.03) nounwind ; <%struct.objc_object*> [#uses=0] br label %return return: ; preds = %entry - %retval5 = load %struct.objc_object** %retval ; <%struct.objc_object*> [#uses=1] + %retval5 = load %struct.objc_object*, %struct.objc_object** %retval ; <%struct.objc_object*> [#uses=1] ret %struct.objc_object* %retval5 } @@ -131,33 +131,33 @@ entry: store %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %CHAIN.8, %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"** %CHAIN.8_addr store %struct.__block_1* %_self, %struct.__block_1** %_self_addr store %struct.CGImage* %cgImage, %struct.CGImage** %cgImage_addr - %1 = load %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1] + %1 = load %struct.__block_1*, %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1] %2 = getelementptr %struct.__block_1, %struct.__block_1* %1, i32 0, i32 2 ; <%struct.NSBitmapImageRep***> [#uses=1] - %3 = load %struct.NSBitmapImageRep*** %2, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1] + %3 = load %struct.NSBitmapImageRep**, %struct.NSBitmapImageRep*** %2, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1] store %struct.NSBitmapImageRep** %3, %struct.NSBitmapImageRep*** %new, align 4 - %4 = load %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1] + %4 = load %struct.__block_1*, %struct.__block_1** %_self_addr, align 4 ; <%struct.__block_1*> [#uses=1] %5 = getelementptr %struct.__block_1, %struct.__block_1* %4, i32 0, i32 1 ; <%struct.NSZone**> [#uses=1] - %6 = load %struct.NSZone** %5, align 4 ; <%struct.NSZone*> [#uses=1] + %6 = load %struct.NSZone*, %struct.NSZone** %5, align 4 ; <%struct.NSZone*> [#uses=1] store %struct.NSZone* %6, %struct.NSZone** %zone, align 4 - %7 = load %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"** %CHAIN.8_addr, align 4 ; <%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*> [#uses=1] + %7 = load %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*, %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"** %CHAIN.8_addr, align 4 ; <%"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"*> [#uses=1] %8 = getelementptr %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]", %"struct.FRAME.-[NSBitmapImageRep copyWithZone:]"* %7, i32 0, i32 0 ; <%struct.NSBitmapImageRep**> [#uses=1] - %9 = load %struct.NSBitmapImageRep** %8, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] + %9 = load %struct.NSBitmapImageRep*, %struct.NSBitmapImageRep** %8, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] store %struct.NSBitmapImageRep* %9, %struct.NSBitmapImageRep** %0, align 4 - %10 = load %struct.NSBitmapImageRep** %0, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] + %10 = load %struct.NSBitmapImageRep*, %struct.NSBitmapImageRep** %0, align 4 ; <%struct.NSBitmapImageRep*> [#uses=1] %11 = bitcast %struct.NSBitmapImageRep* %10 to %struct.objc_object* ; <%struct.objc_object*> [#uses=1] %12 = getelementptr %struct._objc_super, %struct._objc_super* %objc_super, i32 0, i32 0 ; <%struct.objc_object**> [#uses=1] store %struct.objc_object* %11, %struct.objc_object** %12, align 4 - %13 = load %struct._objc_class** getelementptr (%struct._objc_class* @"\01L_OBJC_CLASS_NSBitmapImageRep", i32 0, i32 1), align 4 ; <%struct._objc_class*> [#uses=1] + %13 = load %struct._objc_class*, %struct._objc_class** getelementptr (%struct._objc_class* @"\01L_OBJC_CLASS_NSBitmapImageRep", i32 0, i32 1), align 4 ; <%struct._objc_class*> [#uses=1] %14 = getelementptr %struct._objc_super, %struct._objc_super* %objc_super, i32 0, i32 1 ; <%struct._objc_class**> [#uses=1] store %struct._objc_class* %13, %struct._objc_class** %14, align 4 %objc_super1 = bitcast %struct._objc_super* %objc_super to %struct.objc_super* ; <%struct.objc_super*> [#uses=1] store %struct.objc_super* %objc_super1, %struct.objc_super** %objc_super.5, align 4 - %15 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0", align 4 ; <%struct.objc_selector*> [#uses=1] - %16 = load %struct.objc_super** %objc_super.5, align 4 ; <%struct.objc_super*> [#uses=1] - %17 = load %struct.NSZone** %zone, align 4 ; <%struct.NSZone*> [#uses=1] + %15 = load %struct.objc_selector*, %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0", align 4 ; <%struct.objc_selector*> [#uses=1] + %16 = load %struct.objc_super*, %struct.objc_super** %objc_super.5, align 4 ; <%struct.objc_super*> [#uses=1] + %17 = load %struct.NSZone*, %struct.NSZone** %zone, align 4 ; <%struct.NSZone*> [#uses=1] %18 = call %struct.objc_object* (%struct.objc_super*, %struct.objc_selector*, ...)* @objc_msgSendSuper(%struct.objc_super* %16, %struct.objc_selector* %15, %struct.NSZone* %17) nounwind ; <%struct.objc_object*> [#uses=1] %19 = bitcast %struct.objc_object* %18 to %struct.NSBitmapImageRep* ; <%struct.NSBitmapImageRep*> [#uses=1] - %20 = load %struct.NSBitmapImageRep*** %new, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1] + %20 = load %struct.NSBitmapImageRep**, %struct.NSBitmapImageRep*** %new, align 4 ; <%struct.NSBitmapImageRep**> [#uses=1] store %struct.NSBitmapImageRep* %19, %struct.NSBitmapImageRep** %20, align 4 br label %return diff --git a/test/CodeGen/PowerPC/unal-altivec-wint.ll b/test/CodeGen/PowerPC/unal-altivec-wint.ll index 7d5dd6080bd..b71a98bc83b 100644 --- a/test/CodeGen/PowerPC/unal-altivec-wint.ll +++ b/test/CodeGen/PowerPC/unal-altivec-wint.ll @@ -10,7 +10,7 @@ entry: %hv = bitcast <4 x i32>* %h1 to i8* %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv) - %v0 = load <4 x i32>* %h, align 8 + %v0 = load <4 x i32>, <4 x i32>* %h, align 8 %a = add <4 x i32> %v0, %vl ret <4 x i32> %a @@ -31,7 +31,7 @@ entry: %hv = bitcast <4 x i32>* %h1 to i8* call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv) - %v0 = load <4 x i32>* %h, align 8 + %v0 = load <4 x i32>, <4 x i32>* %h, align 8 ret <4 x i32> %v0 diff --git a/test/CodeGen/PowerPC/unal-altivec.ll b/test/CodeGen/PowerPC/unal-altivec.ll index 70c1f53d758..02f7ab40f04 100644 --- a/test/CodeGen/PowerPC/unal-altivec.ll +++ b/test/CodeGen/PowerPC/unal-altivec.ll @@ -10,11 +10,11 @@ vector.body: ; preds = %vector.body, %vecto %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ] %0 = getelementptr inbounds float, float* %b, i64 %index %1 = bitcast float* %0 to <4 x float>* - %wide.load = load <4 x float>* %1, align 4 + %wide.load = load <4 x float>, <4 x float>* %1, align 4 %.sum11 = or i64 %index, 4 %2 = getelementptr float, float* %b, i64 %.sum11 %3 = bitcast float* %2 to <4 x float>* - %wide.load8 = load <4 x float>* %3, align 4 + %wide.load8 = load <4 x float>, <4 x float>* %3, align 4 %4 = fadd <4 x float> %wide.load, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %5 = fadd <4 x float> %wide.load8, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %6 = getelementptr inbounds float, float* %a, i64 %index diff --git a/test/CodeGen/PowerPC/unal-altivec2.ll b/test/CodeGen/PowerPC/unal-altivec2.ll index 579009606e8..0d15b977ca1 100644 --- a/test/CodeGen/PowerPC/unal-altivec2.ll +++ b/test/CodeGen/PowerPC/unal-altivec2.ll @@ -14,7 +14,7 @@ vector.body: ; preds = %vector.body, %entry %index = phi i64 [ 0, %entry ], [ %index.next.15, %vector.body ] %0 = getelementptr inbounds float, float* %y, i64 %index %1 = bitcast float* %0 to <4 x float>* - %wide.load = load <4 x float>* %1, align 4 + %wide.load = load <4 x float>, <4 x float>* %1, align 4 %2 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load) %3 = getelementptr inbounds float, float* %x, i64 %index %4 = bitcast float* %3 to <4 x float>* @@ -22,7 +22,7 @@ vector.body: ; preds = %vector.body, %entry %index.next = add i64 %index, 4 %5 = getelementptr inbounds float, float* %y, i64 %index.next %6 = bitcast float* %5 to <4 x float>* - %wide.load.1 = load <4 x float>* %6, align 4 + %wide.load.1 = load <4 x float>, <4 x float>* %6, align 4 %7 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.1) %8 = getelementptr inbounds float, float* %x, i64 %index.next %9 = bitcast float* %8 to <4 x float>* @@ -30,7 +30,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.1 = add i64 %index.next, 4 %10 = getelementptr inbounds float, float* %y, i64 %index.next.1 %11 = bitcast float* %10 to <4 x float>* - %wide.load.2 = load <4 x float>* %11, align 4 + %wide.load.2 = load <4 x float>, <4 x float>* %11, align 4 %12 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.2) %13 = getelementptr inbounds float, float* %x, i64 %index.next.1 %14 = bitcast float* %13 to <4 x float>* @@ -38,7 +38,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.2 = add i64 %index.next.1, 4 %15 = getelementptr inbounds float, float* %y, i64 %index.next.2 %16 = bitcast float* %15 to <4 x float>* - %wide.load.3 = load <4 x float>* %16, align 4 + %wide.load.3 = load <4 x float>, <4 x float>* %16, align 4 %17 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.3) %18 = getelementptr inbounds float, float* %x, i64 %index.next.2 %19 = bitcast float* %18 to <4 x float>* @@ -46,7 +46,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.3 = add i64 %index.next.2, 4 %20 = getelementptr inbounds float, float* %y, i64 %index.next.3 %21 = bitcast float* %20 to <4 x float>* - %wide.load.4 = load <4 x float>* %21, align 4 + %wide.load.4 = load <4 x float>, <4 x float>* %21, align 4 %22 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.4) %23 = getelementptr inbounds float, float* %x, i64 %index.next.3 %24 = bitcast float* %23 to <4 x float>* @@ -54,7 +54,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.4 = add i64 %index.next.3, 4 %25 = getelementptr inbounds float, float* %y, i64 %index.next.4 %26 = bitcast float* %25 to <4 x float>* - %wide.load.5 = load <4 x float>* %26, align 4 + %wide.load.5 = load <4 x float>, <4 x float>* %26, align 4 %27 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.5) %28 = getelementptr inbounds float, float* %x, i64 %index.next.4 %29 = bitcast float* %28 to <4 x float>* @@ -62,7 +62,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.5 = add i64 %index.next.4, 4 %30 = getelementptr inbounds float, float* %y, i64 %index.next.5 %31 = bitcast float* %30 to <4 x float>* - %wide.load.6 = load <4 x float>* %31, align 4 + %wide.load.6 = load <4 x float>, <4 x float>* %31, align 4 %32 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.6) %33 = getelementptr inbounds float, float* %x, i64 %index.next.5 %34 = bitcast float* %33 to <4 x float>* @@ -70,7 +70,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.6 = add i64 %index.next.5, 4 %35 = getelementptr inbounds float, float* %y, i64 %index.next.6 %36 = bitcast float* %35 to <4 x float>* - %wide.load.7 = load <4 x float>* %36, align 4 + %wide.load.7 = load <4 x float>, <4 x float>* %36, align 4 %37 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.7) %38 = getelementptr inbounds float, float* %x, i64 %index.next.6 %39 = bitcast float* %38 to <4 x float>* @@ -78,7 +78,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.7 = add i64 %index.next.6, 4 %40 = getelementptr inbounds float, float* %y, i64 %index.next.7 %41 = bitcast float* %40 to <4 x float>* - %wide.load.8 = load <4 x float>* %41, align 4 + %wide.load.8 = load <4 x float>, <4 x float>* %41, align 4 %42 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.8) %43 = getelementptr inbounds float, float* %x, i64 %index.next.7 %44 = bitcast float* %43 to <4 x float>* @@ -86,7 +86,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.8 = add i64 %index.next.7, 4 %45 = getelementptr inbounds float, float* %y, i64 %index.next.8 %46 = bitcast float* %45 to <4 x float>* - %wide.load.9 = load <4 x float>* %46, align 4 + %wide.load.9 = load <4 x float>, <4 x float>* %46, align 4 %47 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.9) %48 = getelementptr inbounds float, float* %x, i64 %index.next.8 %49 = bitcast float* %48 to <4 x float>* @@ -94,7 +94,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.9 = add i64 %index.next.8, 4 %50 = getelementptr inbounds float, float* %y, i64 %index.next.9 %51 = bitcast float* %50 to <4 x float>* - %wide.load.10 = load <4 x float>* %51, align 4 + %wide.load.10 = load <4 x float>, <4 x float>* %51, align 4 %52 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.10) %53 = getelementptr inbounds float, float* %x, i64 %index.next.9 %54 = bitcast float* %53 to <4 x float>* @@ -102,7 +102,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.10 = add i64 %index.next.9, 4 %55 = getelementptr inbounds float, float* %y, i64 %index.next.10 %56 = bitcast float* %55 to <4 x float>* - %wide.load.11 = load <4 x float>* %56, align 4 + %wide.load.11 = load <4 x float>, <4 x float>* %56, align 4 %57 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.11) %58 = getelementptr inbounds float, float* %x, i64 %index.next.10 %59 = bitcast float* %58 to <4 x float>* @@ -110,7 +110,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.11 = add i64 %index.next.10, 4 %60 = getelementptr inbounds float, float* %y, i64 %index.next.11 %61 = bitcast float* %60 to <4 x float>* - %wide.load.12 = load <4 x float>* %61, align 4 + %wide.load.12 = load <4 x float>, <4 x float>* %61, align 4 %62 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.12) %63 = getelementptr inbounds float, float* %x, i64 %index.next.11 %64 = bitcast float* %63 to <4 x float>* @@ -118,7 +118,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.12 = add i64 %index.next.11, 4 %65 = getelementptr inbounds float, float* %y, i64 %index.next.12 %66 = bitcast float* %65 to <4 x float>* - %wide.load.13 = load <4 x float>* %66, align 4 + %wide.load.13 = load <4 x float>, <4 x float>* %66, align 4 %67 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.13) %68 = getelementptr inbounds float, float* %x, i64 %index.next.12 %69 = bitcast float* %68 to <4 x float>* @@ -126,7 +126,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.13 = add i64 %index.next.12, 4 %70 = getelementptr inbounds float, float* %y, i64 %index.next.13 %71 = bitcast float* %70 to <4 x float>* - %wide.load.14 = load <4 x float>* %71, align 4 + %wide.load.14 = load <4 x float>, <4 x float>* %71, align 4 %72 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.14) %73 = getelementptr inbounds float, float* %x, i64 %index.next.13 %74 = bitcast float* %73 to <4 x float>* @@ -134,7 +134,7 @@ vector.body: ; preds = %vector.body, %entry %index.next.14 = add i64 %index.next.13, 4 %75 = getelementptr inbounds float, float* %y, i64 %index.next.14 %76 = bitcast float* %75 to <4 x float>* - %wide.load.15 = load <4 x float>* %76, align 4 + %wide.load.15 = load <4 x float>, <4 x float>* %76, align 4 %77 = call <4 x float> @llvm_cos_v4f32(<4 x float> %wide.load.15) %78 = getelementptr inbounds float, float* %x, i64 %index.next.14 %79 = bitcast float* %78 to <4 x float>* @@ -153,7 +153,7 @@ declare <4 x float> @llvm_cos_v4f32(<4 x float>) #1 define <2 x double> @bar(double* %x) { entry: %p = bitcast double* %x to <2 x double>* - %r = load <2 x double>* %p, align 8 + %r = load <2 x double>, <2 x double>* %p, align 8 ; CHECK-LABEL: @bar ; CHECK-NOT: lvsl diff --git a/test/CodeGen/PowerPC/unaligned.ll b/test/CodeGen/PowerPC/unaligned.ll index 64c03cdda35..6b23b18762d 100644 --- a/test/CodeGen/PowerPC/unaligned.ll +++ b/test/CodeGen/PowerPC/unaligned.ll @@ -5,7 +5,7 @@ target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 define void @foo1(i16* %p, i16* %r) nounwind { entry: - %v = load i16* %p, align 1 + %v = load i16, i16* %p, align 1 store i16 %v, i16* %r, align 1 ret void @@ -20,7 +20,7 @@ entry: define void @foo2(i32* %p, i32* %r) nounwind { entry: - %v = load i32* %p, align 1 + %v = load i32, i32* %p, align 1 store i32 %v, i32* %r, align 1 ret void @@ -35,7 +35,7 @@ entry: define void @foo3(i64* %p, i64* %r) nounwind { entry: - %v = load i64* %p, align 1 + %v = load i64, i64* %p, align 1 store i64 %v, i64* %r, align 1 ret void @@ -50,7 +50,7 @@ entry: define void @foo4(float* %p, float* %r) nounwind { entry: - %v = load float* %p, align 1 + %v = load float, float* %p, align 1 store float %v, float* %r, align 1 ret void @@ -65,7 +65,7 @@ entry: define void @foo5(double* %p, double* %r) nounwind { entry: - %v = load double* %p, align 1 + %v = load double, double* %p, align 1 store double %v, double* %r, align 1 ret void @@ -80,7 +80,7 @@ entry: define void @foo6(<4 x float>* %p, <4 x float>* %r) nounwind { entry: - %v = load <4 x float>* %p, align 1 + %v = load <4 x float>, <4 x float>* %p, align 1 store <4 x float> %v, <4 x float>* %r, align 1 ret void diff --git a/test/CodeGen/PowerPC/vaddsplat.ll b/test/CodeGen/PowerPC/vaddsplat.ll index 4236fabea0a..70a7ea0c553 100644 --- a/test/CodeGen/PowerPC/vaddsplat.ll +++ b/test/CodeGen/PowerPC/vaddsplat.ll @@ -10,7 +10,7 @@ target triple = "powerpc64-unknown-linux-gnu" %v16i8 = type <16 x i8> define void @test_v4i32_pos_even(%v4i32* %P, %v4i32* %S) { - %p = load %v4i32* %P + %p = load %v4i32, %v4i32* %P %r = add %v4i32 %p, < i32 18, i32 18, i32 18, i32 18 > store %v4i32 %r, %v4i32* %S ret void @@ -21,7 +21,7 @@ define void @test_v4i32_pos_even(%v4i32* %P, %v4i32* %S) { ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v4i32_neg_even(%v4i32* %P, %v4i32* %S) { - %p = load %v4i32* %P + %p = load %v4i32, %v4i32* %P %r = add %v4i32 %p, < i32 -28, i32 -28, i32 -28, i32 -28 > store %v4i32 %r, %v4i32* %S ret void @@ -32,7 +32,7 @@ define void @test_v4i32_neg_even(%v4i32* %P, %v4i32* %S) { ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v8i16_pos_even(%v8i16* %P, %v8i16* %S) { - %p = load %v8i16* %P + %p = load %v8i16, %v8i16* %P %r = add %v8i16 %p, < i16 30, i16 30, i16 30, i16 30, i16 30, i16 30, i16 30, i16 30 > store %v8i16 %r, %v8i16* %S ret void @@ -43,7 +43,7 @@ define void @test_v8i16_pos_even(%v8i16* %P, %v8i16* %S) { ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v8i16_neg_even(%v8i16* %P, %v8i16* %S) { - %p = load %v8i16* %P + %p = load %v8i16, %v8i16* %P %r = add %v8i16 %p, < i16 -32, i16 -32, i16 -32, i16 -32, i16 -32, i16 -32, i16 -32, i16 -32 > store %v8i16 %r, %v8i16* %S ret void @@ -54,7 +54,7 @@ define void @test_v8i16_neg_even(%v8i16* %P, %v8i16* %S) { ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v16i8_pos_even(%v16i8* %P, %v16i8* %S) { - %p = load %v16i8* %P + %p = load %v16i8, %v16i8* %P %r = add %v16i8 %p, < i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16 > store %v16i8 %r, %v16i8* %S ret void @@ -65,7 +65,7 @@ define void @test_v16i8_pos_even(%v16i8* %P, %v16i8* %S) { ; CHECK: vaddubm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v16i8_neg_even(%v16i8* %P, %v16i8* %S) { - %p = load %v16i8* %P + %p = load %v16i8, %v16i8* %P %r = add %v16i8 %p, < i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18, i8 -18 > store %v16i8 %r, %v16i8* %S ret void @@ -76,7 +76,7 @@ define void @test_v16i8_neg_even(%v16i8* %P, %v16i8* %S) { ; CHECK: vaddubm {{[0-9]+}}, [[REG1]], [[REG1]] define void @test_v4i32_pos_odd(%v4i32* %P, %v4i32* %S) { - %p = load %v4i32* %P + %p = load %v4i32, %v4i32* %P %r = add %v4i32 %p, < i32 27, i32 27, i32 27, i32 27 > store %v4i32 %r, %v4i32* %S ret void @@ -88,7 +88,7 @@ define void @test_v4i32_pos_odd(%v4i32* %P, %v4i32* %S) { ; CHECK: vsubuwm {{[0-9]+}}, [[REG1]], [[REG2]] define void @test_v4i32_neg_odd(%v4i32* %P, %v4i32* %S) { - %p = load %v4i32* %P + %p = load %v4i32, %v4i32* %P %r = add %v4i32 %p, < i32 -27, i32 -27, i32 -27, i32 -27 > store %v4i32 %r, %v4i32* %S ret void @@ -100,7 +100,7 @@ define void @test_v4i32_neg_odd(%v4i32* %P, %v4i32* %S) { ; CHECK: vadduwm {{[0-9]+}}, [[REG1]], [[REG2]] define void @test_v8i16_pos_odd(%v8i16* %P, %v8i16* %S) { - %p = load %v8i16* %P + %p = load %v8i16, %v8i16* %P %r = add %v8i16 %p, < i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31 > store %v8i16 %r, %v8i16* %S ret void @@ -112,7 +112,7 @@ define void @test_v8i16_pos_odd(%v8i16* %P, %v8i16* %S) { ; CHECK: vsubuhm {{[0-9]+}}, [[REG1]], [[REG2]] define void @test_v8i16_neg_odd(%v8i16* %P, %v8i16* %S) { - %p = load %v8i16* %P + %p = load %v8i16, %v8i16* %P %r = add %v8i16 %p, < i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31 > store %v8i16 %r, %v8i16* %S ret void @@ -124,7 +124,7 @@ define void @test_v8i16_neg_odd(%v8i16* %P, %v8i16* %S) { ; CHECK: vadduhm {{[0-9]+}}, [[REG1]], [[REG2]] define void @test_v16i8_pos_odd(%v16i8* %P, %v16i8* %S) { - %p = load %v16i8* %P + %p = load %v16i8, %v16i8* %P %r = add %v16i8 %p, < i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17 > store %v16i8 %r, %v16i8* %S ret void @@ -136,7 +136,7 @@ define void @test_v16i8_pos_odd(%v16i8* %P, %v16i8* %S) { ; CHECK: vsububm {{[0-9]+}}, [[REG1]], [[REG2]] define void @test_v16i8_neg_odd(%v16i8* %P, %v16i8* %S) { - %p = load %v16i8* %P + %p = load %v16i8, %v16i8* %P %r = add %v16i8 %p, < i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17, i8 -17 > store %v16i8 %r, %v16i8* %S ret void diff --git a/test/CodeGen/PowerPC/varargs-struct-float.ll b/test/CodeGen/PowerPC/varargs-struct-float.ll index 13bff73b41a..dbdda05c592 100644 --- a/test/CodeGen/PowerPC/varargs-struct-float.ll +++ b/test/CodeGen/PowerPC/varargs-struct-float.ll @@ -11,7 +11,7 @@ entry: %coerce.dive = getelementptr %struct.Sf1, %struct.Sf1* %s, i32 0, i32 0 store float %s.coerce, float* %coerce.dive, align 1 %coerce.dive1 = getelementptr %struct.Sf1, %struct.Sf1* %s, i32 0, i32 0 - %0 = load float* %coerce.dive1, align 1 + %0 = load float, float* %coerce.dive1, align 1 call void (i32, ...)* @testvaSf1(i32 1, float inreg %0) ret void } diff --git a/test/CodeGen/PowerPC/vcmp-fold.ll b/test/CodeGen/PowerPC/vcmp-fold.ll index 7a42c27d2b4..ee167083d4d 100644 --- a/test/CodeGen/PowerPC/vcmp-fold.ll +++ b/test/CodeGen/PowerPC/vcmp-fold.ll @@ -5,11 +5,11 @@ define void @test(<4 x float>* %x, <4 x float>* %y, i32* %P) { entry: - %tmp = load <4 x float>* %x ; <<4 x float>> [#uses=1] - %tmp2 = load <4 x float>* %y ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %x ; <<4 x float>> [#uses=1] + %tmp2 = load <4 x float>, <4 x float>* %y ; <<4 x float>> [#uses=1] %tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) ; <i32> [#uses=1] - %tmp4 = load <4 x float>* %x ; <<4 x float>> [#uses=1] - %tmp6 = load <4 x float>* %y ; <<4 x float>> [#uses=1] + %tmp4 = load <4 x float>, <4 x float>* %x ; <<4 x float>> [#uses=1] + %tmp6 = load <4 x float>, <4 x float>* %y ; <<4 x float>> [#uses=1] %tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ; <<4 x i32>> [#uses=1] %tmp7 = bitcast <4 x i32> %tmp.upgrd.2 to <4 x float> ; <<4 x float>> [#uses=1] store <4 x float> %tmp7, <4 x float>* %x diff --git a/test/CodeGen/PowerPC/vec-abi-align.ll b/test/CodeGen/PowerPC/vec-abi-align.ll index 04f12e2e747..48f1adbe5e5 100644 --- a/test/CodeGen/PowerPC/vec-abi-align.ll +++ b/test/CodeGen/PowerPC/vec-abi-align.ll @@ -27,10 +27,10 @@ entry: define void @test2(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, %struct.s2* byval nocapture readonly %vs) #0 { entry: %m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0 - %0 = load i64* %m, align 8 + %0 = load i64, i64* %m, align 8 store i64 %0, i64* @n, align 8 %v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1 - %1 = load <4 x float>* %v, align 16 + %1 = load <4 x float>, <4 x float>* %v, align 16 store <4 x float> %1, <4 x float>* @ve, align 16 ret void @@ -53,10 +53,10 @@ entry: define void @test3(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, %struct.s2* byval nocapture readonly %vs) #0 { entry: %m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0 - %0 = load i64* %m, align 8 + %0 = load i64, i64* %m, align 8 store i64 %0, i64* @n, align 8 %v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1 - %1 = load <4 x float>* %v, align 16 + %1 = load <4 x float>, <4 x float>* %v, align 16 store <4 x float> %1, <4 x float>* @ve, align 16 ret void diff --git a/test/CodeGen/PowerPC/vec_auto_constant.ll b/test/CodeGen/PowerPC/vec_auto_constant.ll index 973f0890b13..ba8ef531014 100644 --- a/test/CodeGen/PowerPC/vec_auto_constant.ll +++ b/test/CodeGen/PowerPC/vec_auto_constant.ll @@ -25,8 +25,8 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store <16 x i8> %x, <16 x i8>* %x_addr store <16 x i8> <i8 22, i8 21, i8 20, i8 3, i8 25, i8 24, i8 23, i8 3, i8 28, i8 27, i8 26, i8 3, i8 31, i8 30, i8 29, i8 3>, <16 x i8>* %temp, align 16 - %0 = load <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1] - %1 = load <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1] + %0 = load <16 x i8>, <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1] + %1 = load <16 x i8>, <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1] %tmp = add <16 x i8> %0, %1 ; <<16 x i8>> [#uses=1] store <16 x i8> %tmp, <16 x i8>* @baz, align 16 br label %return diff --git a/test/CodeGen/PowerPC/vec_br_cmp.ll b/test/CodeGen/PowerPC/vec_br_cmp.ll index c34d850c0ac..14c9620143a 100644 --- a/test/CodeGen/PowerPC/vec_br_cmp.ll +++ b/test/CodeGen/PowerPC/vec_br_cmp.ll @@ -5,8 +5,8 @@ ; A predicate compare used immediately by a branch should not generate an mfcr. define void @test(<4 x float>* %A, <4 x float>* %B) { - %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] - %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1] + %tmp = load <4 x float>, <4 x float>* %A ; <<4 x float>> [#uses=1] + %tmp3 = load <4 x float>, <4 x float>* %B ; <<4 x float>> [#uses=1] %tmp.upgrd.1 = tail call i32 @llvm.ppc.altivec.vcmpeqfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp3 ) ; <i32> [#uses=1] %tmp.upgrd.2 = icmp eq i32 %tmp.upgrd.1, 0 ; <i1> [#uses=1] br i1 %tmp.upgrd.2, label %cond_true, label %UnifiedReturnBlock diff --git a/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll b/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll index 7e58ec0bdef..3b8507728ae 100644 --- a/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll +++ b/test/CodeGen/PowerPC/vec_buildvector_loadstore.ll @@ -8,7 +8,7 @@ define void @foo() nounwind ssp { ; CHECK: _foo: ; CHECK-NOT: stw entry: - %tmp0 = load <16 x i8>* @a, align 16 + %tmp0 = load <16 x i8>, <16 x i8>* @a, align 16 %tmp180.i = extractelement <16 x i8> %tmp0, i32 0 ; <i8> [#uses=1] %tmp181.i = insertelement <16 x i8> <i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, i8 %tmp180.i, i32 2 ; <<16 x i8>> [#uses=1] %tmp182.i = extractelement <16 x i8> %tmp0, i32 1 ; <i8> [#uses=1] diff --git a/test/CodeGen/PowerPC/vec_constants.ll b/test/CodeGen/PowerPC/vec_constants.ll index f16b9f511f5..45df814365e 100644 --- a/test/CodeGen/PowerPC/vec_constants.ll +++ b/test/CodeGen/PowerPC/vec_constants.ll @@ -4,13 +4,13 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "powerpc64-unknown-linux-gnu" define void @test1(<4 x i32>* %P1, <4 x i32>* %P2, <4 x float>* %P3) nounwind { - %tmp = load <4 x i32>* %P1 ; <<4 x i32>> [#uses=1] + %tmp = load <4 x i32>, <4 x i32>* %P1 ; <<4 x i32>> [#uses=1] %tmp4 = and <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1] store <4 x i32> %tmp4, <4 x i32>* %P1 - %tmp7 = load <4 x i32>* %P2 ; <<4 x i32>> [#uses=1] + %tmp7 = load <4 x i32>, <4 x i32>* %P2 ; <<4 x i32>> [#uses=1] %tmp9 = and <4 x i32> %tmp7, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1] store <4 x i32> %tmp9, <4 x i32>* %P2 - %tmp.upgrd.1 = load <4 x float>* %P3 ; <<4 x float>> [#uses=1] + %tmp.upgrd.1 = load <4 x float>, <4 x float>* %P3 ; <<4 x float>> [#uses=1] %tmp11 = bitcast <4 x float> %tmp.upgrd.1 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp12 = and <4 x i32> %tmp11, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1] %tmp13 = bitcast <4 x i32> %tmp12 to <4 x float> ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/PowerPC/vec_conv.ll b/test/CodeGen/PowerPC/vec_conv.ll index a39ae910035..6e19f5a010d 100644 --- a/test/CodeGen/PowerPC/vec_conv.ll +++ b/test/CodeGen/PowerPC/vec_conv.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptosi <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -23,7 +23,7 @@ entry: define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptoui <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -35,7 +35,7 @@ entry: define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = sitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 @@ -47,7 +47,7 @@ entry: define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = uitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 diff --git a/test/CodeGen/PowerPC/vec_fneg.ll b/test/CodeGen/PowerPC/vec_fneg.ll index e01e65979f6..d6f6def64ea 100644 --- a/test/CodeGen/PowerPC/vec_fneg.ll +++ b/test/CodeGen/PowerPC/vec_fneg.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubfp define void @t(<4 x float>* %A) { - %tmp2 = load <4 x float>* %A + %tmp2 = load <4 x float>, <4 x float>* %A %tmp3 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp2 store <4 x float> %tmp3, <4 x float>* %A ret void diff --git a/test/CodeGen/PowerPC/vec_misaligned.ll b/test/CodeGen/PowerPC/vec_misaligned.ll index 2a2f0480210..ac639d71991 100644 --- a/test/CodeGen/PowerPC/vec_misaligned.ll +++ b/test/CodeGen/PowerPC/vec_misaligned.ll @@ -19,18 +19,18 @@ entry: store i32 %x, i32* %x_addr %ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] call void @llvm.va_start( i8* %ap1 ) - %tmp = load i8** %ap, align 4 ; <i8*> [#uses=1] + %tmp = load i8*, i8** %ap, align 4 ; <i8*> [#uses=1] store i8* %tmp, i8** %ap.0, align 4 - %tmp2 = load i8** %ap.0, align 4 ; <i8*> [#uses=1] + %tmp2 = load i8*, i8** %ap.0, align 4 ; <i8*> [#uses=1] %tmp3 = getelementptr i8, i8* %tmp2, i64 16 ; <i8*> [#uses=1] store i8* %tmp3, i8** %ap, align 4 - %tmp4 = load i8** %ap.0, align 4 ; <i8*> [#uses=1] + %tmp4 = load i8*, i8** %ap.0, align 4 ; <i8*> [#uses=1] %tmp45 = bitcast i8* %tmp4 to %struct.S2203* ; <%struct.S2203*> [#uses=1] %tmp6 = getelementptr %struct.S2203, %struct.S2203* @s, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1] %tmp7 = getelementptr %struct.S2203, %struct.S2203* %tmp45, i32 0, i32 0 ; <%struct.u16qi*> [#uses=1] %tmp8 = getelementptr %struct.u16qi, %struct.u16qi* %tmp6, i32 0, i32 0 ; <<16 x i8>*> [#uses=1] %tmp9 = getelementptr %struct.u16qi, %struct.u16qi* %tmp7, i32 0, i32 0 ; <<16 x i8>*> [#uses=1] - %tmp10 = load <16 x i8>* %tmp9, align 4 ; <<16 x i8>> [#uses=1] + %tmp10 = load <16 x i8>, <16 x i8>* %tmp9, align 4 ; <<16 x i8>> [#uses=1] ; CHECK: lvsl ; CHECK: vperm ; CHECK-LE: lvsr diff --git a/test/CodeGen/PowerPC/vec_mul.ll b/test/CodeGen/PowerPC/vec_mul.ll index 86596d4b0a8..e815725f9c9 100644 --- a/test/CodeGen/PowerPC/vec_mul.ll +++ b/test/CodeGen/PowerPC/vec_mul.ll @@ -5,8 +5,8 @@ ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-LE-VSX define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { - %tmp = load <4 x i32>* %X ; <<4 x i32>> [#uses=1] - %tmp2 = load <4 x i32>* %Y ; <<4 x i32>> [#uses=1] + %tmp = load <4 x i32>, <4 x i32>* %X ; <<4 x i32>> [#uses=1] + %tmp2 = load <4 x i32>, <4 x i32>* %Y ; <<4 x i32>> [#uses=1] %tmp3 = mul <4 x i32> %tmp, %tmp2 ; <<4 x i32>> [#uses=1] ret <4 x i32> %tmp3 } @@ -24,8 +24,8 @@ define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) { ; CHECK-LE-VSX-NOT: mullw define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) { - %tmp = load <8 x i16>* %X ; <<8 x i16>> [#uses=1] - %tmp2 = load <8 x i16>* %Y ; <<8 x i16>> [#uses=1] + %tmp = load <8 x i16>, <8 x i16>* %X ; <<8 x i16>> [#uses=1] + %tmp2 = load <8 x i16>, <8 x i16>* %Y ; <<8 x i16>> [#uses=1] %tmp3 = mul <8 x i16> %tmp, %tmp2 ; <<8 x i16>> [#uses=1] ret <8 x i16> %tmp3 } @@ -43,8 +43,8 @@ define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) { ; CHECK-LE-VSX-NOT: mullw define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) { - %tmp = load <16 x i8>* %X ; <<16 x i8>> [#uses=1] - %tmp2 = load <16 x i8>* %Y ; <<16 x i8>> [#uses=1] + %tmp = load <16 x i8>, <16 x i8>* %X ; <<16 x i8>> [#uses=1] + %tmp2 = load <16 x i8>, <16 x i8>* %Y ; <<16 x i8>> [#uses=1] %tmp3 = mul <16 x i8> %tmp, %tmp2 ; <<16 x i8>> [#uses=1] ret <16 x i8> %tmp3 } @@ -68,8 +68,8 @@ define <16 x i8> @test_v16i8(<16 x i8>* %X, <16 x i8>* %Y) { ; CHECK-LE-VSX-NOT: mullw define <4 x float> @test_float(<4 x float>* %X, <4 x float>* %Y) { - %tmp = load <4 x float>* %X - %tmp2 = load <4 x float>* %Y + %tmp = load <4 x float>, <4 x float>* %X + %tmp2 = load <4 x float>, <4 x float>* %Y %tmp3 = fmul <4 x float> %tmp, %tmp2 ret <4 x float> %tmp3 } diff --git a/test/CodeGen/PowerPC/vec_perf_shuffle.ll b/test/CodeGen/PowerPC/vec_perf_shuffle.ll index 2c3594d224f..f8b37fae7c2 100644 --- a/test/CodeGen/PowerPC/vec_perf_shuffle.ll +++ b/test/CodeGen/PowerPC/vec_perf_shuffle.ll @@ -1,36 +1,36 @@ ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vperm define <4 x float> @test_uu72(<4 x float>* %P1, <4 x float>* %P2) { - %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] - %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1] + %V1 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %V2 = load <4 x float>, <4 x float>* %P2 ; <<4 x float>> [#uses=1] %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 undef, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1] ret <4 x float> %V3 } define <4 x float> @test_30u5(<4 x float>* %P1, <4 x float>* %P2) { - %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] - %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1] + %V1 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %V2 = load <4 x float>, <4 x float>* %P2 ; <<4 x float>> [#uses=1] %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 0, i32 undef, i32 5 > ; <<4 x float>> [#uses=1] ret <4 x float> %V3 } define <4 x float> @test_3u73(<4 x float>* %P1, <4 x float>* %P2) { - %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] - %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1] + %V1 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %V2 = load <4 x float>, <4 x float>* %P2 ; <<4 x float>> [#uses=1] %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 undef, i32 7, i32 3 > ; <<4 x float>> [#uses=1] ret <4 x float> %V3 } define <4 x float> @test_3774(<4 x float>* %P1, <4 x float>* %P2) { - %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] - %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1] + %V1 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %V2 = load <4 x float>, <4 x float>* %P2 ; <<4 x float>> [#uses=1] %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 7, i32 7, i32 4 > ; <<4 x float>> [#uses=1] ret <4 x float> %V3 } define <4 x float> @test_4450(<4 x float>* %P1, <4 x float>* %P2) { - %V1 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1] - %V2 = load <4 x float>* %P2 ; <<4 x float>> [#uses=1] + %V1 = load <4 x float>, <4 x float>* %P1 ; <<4 x float>> [#uses=1] + %V2 = load <4 x float>, <4 x float>* %P2 ; <<4 x float>> [#uses=1] %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 4, i32 4, i32 5, i32 0 > ; <<4 x float>> [#uses=1] ret <4 x float> %V3 } diff --git a/test/CodeGen/PowerPC/vec_shuffle.ll b/test/CodeGen/PowerPC/vec_shuffle.ll index 82706321c1c..a942dd1c41c 100644 --- a/test/CodeGen/PowerPC/vec_shuffle.ll +++ b/test/CodeGen/PowerPC/vec_shuffle.ll @@ -9,8 +9,8 @@ define void @VSLDOI_xy(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1] - %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=1] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=1] + %tmp2 = load <8 x i16>, <8 x i16>* %B ; <<8 x i16>> [#uses=1] %tmp.upgrd.1 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=11] %tmp2.upgrd.2 = bitcast <8 x i16> %tmp2 to <16 x i8> ; <<16 x i8>> [#uses=5] %tmp.upgrd.3 = extractelement <16 x i8> %tmp.upgrd.1, i32 5 ; <i8> [#uses=1] @@ -51,8 +51,8 @@ entry: } define void @VSLDOI_xx(<8 x i16>* %A, <8 x i16>* %B) { - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1] - %tmp2 = load <8 x i16>* %A ; <<8 x i16>> [#uses=1] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=1] + %tmp2 = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=1] %tmp.upgrd.5 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=11] %tmp2.upgrd.6 = bitcast <8 x i16> %tmp2 to <16 x i8> ; <<16 x i8>> [#uses=5] %tmp.upgrd.7 = extractelement <16 x i8> %tmp.upgrd.5, i32 5 ; <i8> [#uses=1] @@ -94,9 +94,9 @@ define void @VSLDOI_xx(<8 x i16>* %A, <8 x i16>* %B) { define void @VPERM_promote(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=1] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=1] %tmp.upgrd.9 = bitcast <8 x i16> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=1] + %tmp2 = load <8 x i16>, <8 x i16>* %B ; <<8 x i16>> [#uses=1] %tmp2.upgrd.10 = bitcast <8 x i16> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp3 = call <4 x i32> @llvm.ppc.altivec.vperm( <4 x i32> %tmp.upgrd.9, <4 x i32> %tmp2.upgrd.10, <16 x i8> < i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14, i8 14 > ) ; <<4 x i32>> [#uses=1] %tmp3.upgrd.11 = bitcast <4 x i32> %tmp3 to <8 x i16> ; <<8 x i16>> [#uses=1] @@ -108,8 +108,8 @@ declare <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32>, <4 x i32>, <16 x i8>) define void @tb_l(<16 x i8>* %A, <16 x i8>* %B) { entry: - %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=8] - %tmp2 = load <16 x i8>* %B ; <<16 x i8>> [#uses=8] + %tmp = load <16 x i8>, <16 x i8>* %A ; <<16 x i8>> [#uses=8] + %tmp2 = load <16 x i8>, <16 x i8>* %B ; <<16 x i8>> [#uses=8] %tmp.upgrd.12 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1] %tmp3 = extractelement <16 x i8> %tmp2, i32 8 ; <i8> [#uses=1] %tmp4 = extractelement <16 x i8> %tmp, i32 9 ; <i8> [#uses=1] @@ -148,8 +148,8 @@ entry: define void @th_l(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=4] - %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=4] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=4] + %tmp2 = load <8 x i16>, <8 x i16>* %B ; <<8 x i16>> [#uses=4] %tmp.upgrd.13 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1] %tmp3 = extractelement <8 x i16> %tmp2, i32 4 ; <i16> [#uses=1] %tmp4 = extractelement <8 x i16> %tmp, i32 5 ; <i16> [#uses=1] @@ -172,8 +172,8 @@ entry: define void @tw_l(<4 x i32>* %A, <4 x i32>* %B) { entry: - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2] - %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=2] + %tmp2 = load <4 x i32>, <4 x i32>* %B ; <<4 x i32>> [#uses=2] %tmp.upgrd.14 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1] %tmp3 = extractelement <4 x i32> %tmp2, i32 2 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp, i32 3 ; <i32> [#uses=1] @@ -188,8 +188,8 @@ entry: define void @tb_h(<16 x i8>* %A, <16 x i8>* %B) { entry: - %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=8] - %tmp2 = load <16 x i8>* %B ; <<16 x i8>> [#uses=8] + %tmp = load <16 x i8>, <16 x i8>* %A ; <<16 x i8>> [#uses=8] + %tmp2 = load <16 x i8>, <16 x i8>* %B ; <<16 x i8>> [#uses=8] %tmp.upgrd.15 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1] %tmp3 = extractelement <16 x i8> %tmp2, i32 0 ; <i8> [#uses=1] %tmp4 = extractelement <16 x i8> %tmp, i32 1 ; <i8> [#uses=1] @@ -228,8 +228,8 @@ entry: define void @th_h(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=4] - %tmp2 = load <8 x i16>* %B ; <<8 x i16>> [#uses=4] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=4] + %tmp2 = load <8 x i16>, <8 x i16>* %B ; <<8 x i16>> [#uses=4] %tmp.upgrd.16 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1] %tmp3 = extractelement <8 x i16> %tmp2, i32 0 ; <i16> [#uses=1] %tmp4 = extractelement <8 x i16> %tmp, i32 1 ; <i16> [#uses=1] @@ -252,8 +252,8 @@ entry: define void @tw_h(<4 x i32>* %A, <4 x i32>* %B) { entry: - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2] - %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=2] + %tmp2 = load <4 x i32>, <4 x i32>* %B ; <<4 x i32>> [#uses=2] %tmp.upgrd.17 = extractelement <4 x i32> %tmp2, i32 0 ; <i32> [#uses=1] %tmp3 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp2, i32 1 ; <i32> [#uses=1] @@ -267,8 +267,8 @@ entry: } define void @tw_h_flop(<4 x i32>* %A, <4 x i32>* %B) { - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2] - %tmp2 = load <4 x i32>* %B ; <<4 x i32>> [#uses=2] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=2] + %tmp2 = load <4 x i32>, <4 x i32>* %B ; <<4 x i32>> [#uses=2] %tmp.upgrd.18 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1] %tmp3 = extractelement <4 x i32> %tmp2, i32 0 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1] @@ -283,7 +283,7 @@ define void @tw_h_flop(<4 x i32>* %A, <4 x i32>* %B) { define void @VMRG_UNARY_tb_l(<16 x i8>* %A, <16 x i8>* %B) { entry: - %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=16] + %tmp = load <16 x i8>, <16 x i8>* %A ; <<16 x i8>> [#uses=16] %tmp.upgrd.19 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1] %tmp3 = extractelement <16 x i8> %tmp, i32 8 ; <i8> [#uses=1] %tmp4 = extractelement <16 x i8> %tmp, i32 9 ; <i8> [#uses=1] @@ -322,7 +322,7 @@ entry: define void @VMRG_UNARY_th_l(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=8] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=8] %tmp.upgrd.20 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1] %tmp3 = extractelement <8 x i16> %tmp, i32 4 ; <i16> [#uses=1] %tmp4 = extractelement <8 x i16> %tmp, i32 5 ; <i16> [#uses=1] @@ -345,7 +345,7 @@ entry: define void @VMRG_UNARY_tw_l(<4 x i32>* %A, <4 x i32>* %B) { entry: - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=4] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=4] %tmp.upgrd.21 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1] %tmp3 = extractelement <4 x i32> %tmp, i32 2 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp, i32 3 ; <i32> [#uses=1] @@ -360,7 +360,7 @@ entry: define void @VMRG_UNARY_tb_h(<16 x i8>* %A, <16 x i8>* %B) { entry: - %tmp = load <16 x i8>* %A ; <<16 x i8>> [#uses=16] + %tmp = load <16 x i8>, <16 x i8>* %A ; <<16 x i8>> [#uses=16] %tmp.upgrd.22 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1] %tmp3 = extractelement <16 x i8> %tmp, i32 0 ; <i8> [#uses=1] %tmp4 = extractelement <16 x i8> %tmp, i32 1 ; <i8> [#uses=1] @@ -399,7 +399,7 @@ entry: define void @VMRG_UNARY_th_h(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=8] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=8] %tmp.upgrd.23 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1] %tmp3 = extractelement <8 x i16> %tmp, i32 0 ; <i16> [#uses=1] %tmp4 = extractelement <8 x i16> %tmp, i32 1 ; <i16> [#uses=1] @@ -422,7 +422,7 @@ entry: define void @VMRG_UNARY_tw_h(<4 x i32>* %A, <4 x i32>* %B) { entry: - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=4] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=4] %tmp.upgrd.24 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1] %tmp3 = extractelement <4 x i32> %tmp, i32 0 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp, i32 1 ; <i32> [#uses=1] @@ -437,7 +437,7 @@ entry: define void @VPCKUHUM_unary(<8 x i16>* %A, <8 x i16>* %B) { entry: - %tmp = load <8 x i16>* %A ; <<8 x i16>> [#uses=2] + %tmp = load <8 x i16>, <8 x i16>* %A ; <<8 x i16>> [#uses=2] %tmp.upgrd.25 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=8] %tmp3 = bitcast <8 x i16> %tmp to <16 x i8> ; <<16 x i8>> [#uses=8] %tmp.upgrd.26 = extractelement <16 x i8> %tmp.upgrd.25, i32 1 ; <i8> [#uses=1] @@ -479,7 +479,7 @@ entry: define void @VPCKUWUM_unary(<4 x i32>* %A, <4 x i32>* %B) { entry: - %tmp = load <4 x i32>* %A ; <<4 x i32>> [#uses=2] + %tmp = load <4 x i32>, <4 x i32>* %A ; <<4 x i32>> [#uses=2] %tmp.upgrd.28 = bitcast <4 x i32> %tmp to <8 x i16> ; <<8 x i16>> [#uses=4] %tmp3 = bitcast <4 x i32> %tmp to <8 x i16> ; <<8 x i16>> [#uses=4] %tmp.upgrd.29 = extractelement <8 x i16> %tmp.upgrd.28, i32 1 ; <i16> [#uses=1] diff --git a/test/CodeGen/PowerPC/vec_shuffle_le.ll b/test/CodeGen/PowerPC/vec_shuffle_le.ll index c7fc1c60c5e..46d451ff157 100644 --- a/test/CodeGen/PowerPC/vec_shuffle_le.ll +++ b/test/CodeGen/PowerPC/vec_shuffle_le.ll @@ -3,8 +3,8 @@ define void @VPKUHUM_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VPKUHUM_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -16,7 +16,7 @@ entry: define void @VPKUHUM_xx(<16 x i8>* %A) { entry: ; CHECK: VPKUHUM_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> ; CHECK: vpkuhum store <16 x i8> %tmp2, <16 x i8>* %A @@ -26,8 +26,8 @@ entry: define void @VPKUWUM_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VPKUWUM_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -39,7 +39,7 @@ entry: define void @VPKUWUM_xx(<16 x i8>* %A) { entry: ; CHECK: VPKUWUM_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13> ; CHECK: vpkuwum store <16 x i8> %tmp2, <16 x i8>* %A @@ -49,8 +49,8 @@ entry: define void @VMRGLB_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGLB_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -62,7 +62,7 @@ entry: define void @VMRGLB_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGLB_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7> ; CHECK: vmrglb store <16 x i8> %tmp2, <16 x i8>* %A @@ -72,8 +72,8 @@ entry: define void @VMRGHB_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGHB_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -85,7 +85,7 @@ entry: define void @VMRGHB_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGHB_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 8, i32 9, i32 9, i32 10, i32 10, i32 11, i32 11, i32 12, i32 12, i32 13, i32 13, i32 14, i32 14, i32 15, i32 15> ; CHECK: vmrghb store <16 x i8> %tmp2, <16 x i8>* %A @@ -95,8 +95,8 @@ entry: define void @VMRGLH_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGLH_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 4, i32 5, i32 20, i32 21, i32 6, i32 7, i32 22, i32 23> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -108,7 +108,7 @@ entry: define void @VMRGLH_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGLH_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 4, i32 5, i32 4, i32 5, i32 6, i32 7, i32 6, i32 7> ; CHECK: vmrglh store <16 x i8> %tmp2, <16 x i8>* %A @@ -118,8 +118,8 @@ entry: define void @VMRGHH_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGHH_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 9, i32 24, i32 25, i32 10, i32 11, i32 26, i32 27, i32 12, i32 13, i32 28, i32 29, i32 14, i32 15, i32 30, i32 31> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -131,7 +131,7 @@ entry: define void @VMRGHH_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGHH_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 9, i32 8, i32 9, i32 10, i32 11, i32 10, i32 11, i32 12, i32 13, i32 12, i32 13, i32 14, i32 15, i32 14, i32 15> ; CHECK: vmrghh store <16 x i8> %tmp2, <16 x i8>* %A @@ -141,8 +141,8 @@ entry: define void @VMRGLW_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGLW_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -154,7 +154,7 @@ entry: define void @VMRGLW_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGLW_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7> ; CHECK: vmrglw store <16 x i8> %tmp2, <16 x i8>* %A @@ -164,8 +164,8 @@ entry: define void @VMRGHW_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VMRGHW_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -177,7 +177,7 @@ entry: define void @VMRGHW_xx(<16 x i8>* %A) { entry: ; CHECK: VMRGHW_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15> ; CHECK: vmrghw store <16 x i8> %tmp2, <16 x i8>* %A @@ -187,8 +187,8 @@ entry: define void @VSLDOI_xy(<16 x i8>* %A, <16 x i8>* %B) { entry: ; CHECK: VSLDOI_xy: - %tmp = load <16 x i8>* %A - %tmp2 = load <16 x i8>* %B + %tmp = load <16 x i8>, <16 x i8>* %A + %tmp2 = load <16 x i8>, <16 x i8>* %B %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27> ; CHECK: lvx [[REG1:[0-9]+]] ; CHECK: lvx [[REG2:[0-9]+]] @@ -200,7 +200,7 @@ entry: define void @VSLDOI_xx(<16 x i8>* %A) { entry: ; CHECK: VSLDOI_xx: - %tmp = load <16 x i8>* %A + %tmp = load <16 x i8>, <16 x i8>* %A %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> ; CHECK: vsldoi store <16 x i8> %tmp2, <16 x i8>* %A diff --git a/test/CodeGen/PowerPC/vec_splat.ll b/test/CodeGen/PowerPC/vec_splat.ll index 61237284d36..aeed94c91f4 100644 --- a/test/CodeGen/PowerPC/vec_splat.ll +++ b/test/CodeGen/PowerPC/vec_splat.ll @@ -14,7 +14,7 @@ define void @splat(%f4* %P, %f4* %Q, float %X) nounwind { %tmp2 = insertelement %f4 %tmp, float %X, i32 1 ; <%f4> [#uses=1] %tmp4 = insertelement %f4 %tmp2, float %X, i32 2 ; <%f4> [#uses=1] %tmp6 = insertelement %f4 %tmp4, float %X, i32 3 ; <%f4> [#uses=1] - %q = load %f4* %Q ; <%f4> [#uses=1] + %q = load %f4, %f4* %Q ; <%f4> [#uses=1] %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1] store %f4 %R, %f4* %P ret void @@ -25,21 +25,21 @@ define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) nounwind { %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1] %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1] %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1] - %q = load %i4* %Q ; <%i4> [#uses=1] + %q = load %i4, %i4* %Q ; <%i4> [#uses=1] %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1] store %i4 %R, %i4* %P ret void } define void @splat_imm_i32(%i4* %P, %i4* %Q, i32 %X) nounwind { - %q = load %i4* %Q ; <%i4> [#uses=1] + %q = load %i4, %i4* %Q ; <%i4> [#uses=1] %R = add %i4 %q, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <%i4> [#uses=1] store %i4 %R, %i4* %P ret void } define void @splat_imm_i16(%i4* %P, %i4* %Q, i32 %X) nounwind { - %q = load %i4* %Q ; <%i4> [#uses=1] + %q = load %i4, %i4* %Q ; <%i4> [#uses=1] %R = add %i4 %q, < i32 65537, i32 65537, i32 65537, i32 65537 > ; <%i4> [#uses=1] store %i4 %R, %i4* %P ret void @@ -60,7 +60,7 @@ define void @splat_h(i16 %tmp, <16 x i8>* %dst) nounwind { } define void @spltish(<16 x i8>* %A, <16 x i8>* %B) nounwind { - %tmp = load <16 x i8>* %B ; <<16 x i8>> [#uses=1] + %tmp = load <16 x i8>, <16 x i8>* %B ; <<16 x i8>> [#uses=1] %tmp.s = bitcast <16 x i8> %tmp to <16 x i8> ; <<16 x i8>> [#uses=1] %tmp4 = sub <16 x i8> %tmp.s, bitcast (<8 x i16> < i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15 > to <16 x i8>) ; <<16 x i8>> [#uses=1] diff --git a/test/CodeGen/PowerPC/vec_splat_constant.ll b/test/CodeGen/PowerPC/vec_splat_constant.ll index b227794421f..53676fcbba4 100644 --- a/test/CodeGen/PowerPC/vec_splat_constant.ll +++ b/test/CodeGen/PowerPC/vec_splat_constant.ll @@ -12,8 +12,8 @@ entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store <16 x i8> %x, <16 x i8>* %x_addr store <16 x i8> <i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14, i8 0, i8 0, i8 0, i8 14>, <16 x i8>* %temp, align 16 - %0 = load <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1] - %1 = load <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1] + %0 = load <16 x i8>, <16 x i8>* %x_addr, align 16 ; <<16 x i8>> [#uses=1] + %1 = load <16 x i8>, <16 x i8>* %temp, align 16 ; <<16 x i8>> [#uses=1] %tmp = add <16 x i8> %0, %1 ; <<16 x i8>> [#uses=1] store <16 x i8> %tmp, <16 x i8>* @baz, align 16 br label %return diff --git a/test/CodeGen/PowerPC/vec_zero.ll b/test/CodeGen/PowerPC/vec_zero.ll index f862b2cb4c4..aec61fbd6bd 100644 --- a/test/CodeGen/PowerPC/vec_zero.ll +++ b/test/CodeGen/PowerPC/vec_zero.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vxor define void @foo(<4 x float>* %P) { - %T = load <4 x float>* %P ; <<4 x float>> [#uses=1] + %T = load <4 x float>, <4 x float>* %P ; <<4 x float>> [#uses=1] %S = fadd <4 x float> zeroinitializer, %T ; <<4 x float>> [#uses=1] store <4 x float> %S, <4 x float>* %P ret void diff --git a/test/CodeGen/PowerPC/vector-identity-shuffle.ll b/test/CodeGen/PowerPC/vector-identity-shuffle.ll index dfa2e35435a..35979f68a88 100644 --- a/test/CodeGen/PowerPC/vector-identity-shuffle.ll +++ b/test/CodeGen/PowerPC/vector-identity-shuffle.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vperm define void @test(<4 x float>* %tmp2.i) { - %tmp2.i.upgrd.1 = load <4 x float>* %tmp2.i ; <<4 x float>> [#uses=4] + %tmp2.i.upgrd.1 = load <4 x float>, <4 x float>* %tmp2.i ; <<4 x float>> [#uses=4] %xFloat0.48 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 0 ; <float> [#uses=1] %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, i32 0 ; <<4 x float>> [#uses=1] %xFloat1.50 = extractelement <4 x float> %tmp2.i.upgrd.1, i32 1 ; <float> [#uses=1] diff --git a/test/CodeGen/PowerPC/vector.ll b/test/CodeGen/PowerPC/vector.ll index 859a85a1410..723ca54c02b 100644 --- a/test/CodeGen/PowerPC/vector.ll +++ b/test/CodeGen/PowerPC/vector.ll @@ -12,56 +12,56 @@ ;;; TEST HANDLING OF VARIOUS VECTOR SIZES define void @test_f1(%f1* %P, %f1* %Q, %f1* %S) { - %p = load %f1* %P ; <%f1> [#uses=1] - %q = load %f1* %Q ; <%f1> [#uses=1] + %p = load %f1, %f1* %P ; <%f1> [#uses=1] + %q = load %f1, %f1* %Q ; <%f1> [#uses=1] %R = fadd %f1 %p, %q ; <%f1> [#uses=1] store %f1 %R, %f1* %S ret void } define void @test_f2(%f2* %P, %f2* %Q, %f2* %S) { - %p = load %f2* %P ; <%f2> [#uses=1] - %q = load %f2* %Q ; <%f2> [#uses=1] + %p = load %f2, %f2* %P ; <%f2> [#uses=1] + %q = load %f2, %f2* %Q ; <%f2> [#uses=1] %R = fadd %f2 %p, %q ; <%f2> [#uses=1] store %f2 %R, %f2* %S ret void } define void @test_f4(%f4* %P, %f4* %Q, %f4* %S) { - %p = load %f4* %P ; <%f4> [#uses=1] - %q = load %f4* %Q ; <%f4> [#uses=1] + %p = load %f4, %f4* %P ; <%f4> [#uses=1] + %q = load %f4, %f4* %Q ; <%f4> [#uses=1] %R = fadd %f4 %p, %q ; <%f4> [#uses=1] store %f4 %R, %f4* %S ret void } define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) { - %p = load %f8* %P ; <%f8> [#uses=1] - %q = load %f8* %Q ; <%f8> [#uses=1] + %p = load %f8, %f8* %P ; <%f8> [#uses=1] + %q = load %f8, %f8* %Q ; <%f8> [#uses=1] %R = fadd %f8 %p, %q ; <%f8> [#uses=1] store %f8 %R, %f8* %S ret void } define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) { - %p = load %f8* %P ; <%f8> [#uses=1] - %q = load %f8* %Q ; <%f8> [#uses=1] + %p = load %f8, %f8* %P ; <%f8> [#uses=1] + %q = load %f8, %f8* %Q ; <%f8> [#uses=1] %R = fmul %f8 %p, %q ; <%f8> [#uses=1] store %f8 %R, %f8* %S ret void } define void @test_div(%f8* %P, %f8* %Q, %f8* %S) { - %p = load %f8* %P ; <%f8> [#uses=1] - %q = load %f8* %Q ; <%f8> [#uses=1] + %p = load %f8, %f8* %P ; <%f8> [#uses=1] + %q = load %f8, %f8* %Q ; <%f8> [#uses=1] %R = fdiv %f8 %p, %q ; <%f8> [#uses=1] store %f8 %R, %f8* %S ret void } define void @test_rem(%f8* %P, %f8* %Q, %f8* %S) { - %p = load %f8* %P ; <%f8> [#uses=1] - %q = load %f8* %Q ; <%f8> [#uses=1] + %p = load %f8, %f8* %P ; <%f8> [#uses=1] + %q = load %f8, %f8* %Q ; <%f8> [#uses=1] %R = frem %f8 %p, %q ; <%f8> [#uses=1] store %f8 %R, %f8* %S ret void @@ -70,7 +70,7 @@ define void @test_rem(%f8* %P, %f8* %Q, %f8* %S) { ;;; TEST VECTOR CONSTRUCTS define void @test_cst(%f4* %P, %f4* %S) { - %p = load %f4* %P ; <%f4> [#uses=1] + %p = load %f4, %f4* %P ; <%f4> [#uses=1] %R = fadd %f4 %p, < float 0x3FB99999A0000000, float 1.000000e+00, float 2.000000e+00, float 4.500000e+00 > ; <%f4> [#uses=1] store %f4 %R, %f4* %S @@ -78,14 +78,14 @@ define void @test_cst(%f4* %P, %f4* %S) { } define void @test_zero(%f4* %P, %f4* %S) { - %p = load %f4* %P ; <%f4> [#uses=1] + %p = load %f4, %f4* %P ; <%f4> [#uses=1] %R = fadd %f4 %p, zeroinitializer ; <%f4> [#uses=1] store %f4 %R, %f4* %S ret void } define void @test_undef(%f4* %P, %f4* %S) { - %p = load %f4* %P ; <%f4> [#uses=1] + %p = load %f4, %f4* %P ; <%f4> [#uses=1] %R = fadd %f4 %p, undef ; <%f4> [#uses=1] store %f4 %R, %f4* %S ret void @@ -111,19 +111,19 @@ define void @test_scalar_to_vector(float %F, %f4* %S) { } define float @test_extract_elt(%f8* %P) { - %p = load %f8* %P ; <%f8> [#uses=1] + %p = load %f8, %f8* %P ; <%f8> [#uses=1] %R = extractelement %f8 %p, i32 3 ; <float> [#uses=1] ret float %R } define double @test_extract_elt2(%d8* %P) { - %p = load %d8* %P ; <%d8> [#uses=1] + %p = load %d8, %d8* %P ; <%d8> [#uses=1] %R = extractelement %d8 %p, i32 3 ; <double> [#uses=1] ret double %R } define void @test_cast_1(%f4* %b, %i4* %a) { - %tmp = load %f4* %b ; <%f4> [#uses=1] + %tmp = load %f4, %f4* %b ; <%f4> [#uses=1] %tmp2 = fadd %f4 %tmp, < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 > ; <%f4> [#uses=1] %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1] @@ -133,7 +133,7 @@ define void @test_cast_1(%f4* %b, %i4* %a) { } define void @test_cast_2(%f8* %a, <8 x i32>* %b) { - %T = load %f8* %a ; <%f8> [#uses=1] + %T = load %f8, %f8* %a ; <%f8> [#uses=1] %T2 = bitcast %f8 %T to <8 x i32> store <8 x i32> %T2, <8 x i32>* %b ret void @@ -147,7 +147,7 @@ define void @splat(%f4* %P, %f4* %Q, float %X) { %tmp2 = insertelement %f4 %tmp, float %X, i32 1 %tmp4 = insertelement %f4 %tmp2, float %X, i32 2 %tmp6 = insertelement %f4 %tmp4, float %X, i32 3 - %q = load %f4* %Q ; <%f4> [#uses=1] + %q = load %f4, %f4* %Q ; <%f4> [#uses=1] %R = fadd %f4 %q, %tmp6 ; <%f4> [#uses=1] store %f4 %R, %f4* %P ret void @@ -158,7 +158,7 @@ define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) { %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 - %q = load %i4* %Q ; <%i4> [#uses=1] + %q = load %i4, %i4* %Q ; <%i4> [#uses=1] %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1] store %i4 %R, %i4* %P ret void diff --git a/test/CodeGen/PowerPC/vsx-div.ll b/test/CodeGen/PowerPC/vsx-div.ll index 8a9578e5ed8..0e8388543a2 100644 --- a/test/CodeGen/PowerPC/vsx-div.ll +++ b/test/CodeGen/PowerPC/vsx-div.ll @@ -7,7 +7,7 @@ define void @test1() { entry: - %0 = load <4 x float>* @vf, align 16 + %0 = load <4 x float>, <4 x float>* @vf, align 16 %1 = tail call <4 x float> @llvm.ppc.vsx.xvdivsp(<4 x float> %0, <4 x float> %0) store <4 x float> %1, <4 x float>* @vf_res, align 16 ret void @@ -17,7 +17,7 @@ entry: define void @test2() { entry: - %0 = load <2 x double>* @vd, align 16 + %0 = load <2 x double>, <2 x double>* @vd, align 16 %1 = tail call <2 x double> @llvm.ppc.vsx.xvdivdp(<2 x double> %0, <2 x double> %0) store <2 x double> %1, <2 x double>* @vd_res, align 16 ret void diff --git a/test/CodeGen/PowerPC/vsx-infl-copy1.ll b/test/CodeGen/PowerPC/vsx-infl-copy1.ll index 424e67e5e56..531e3ad2d87 100644 --- a/test/CodeGen/PowerPC/vsx-infl-copy1.ll +++ b/test/CodeGen/PowerPC/vsx-infl-copy1.ll @@ -26,69 +26,69 @@ vector.body: ; preds = %vector.body, %entry %vec.phi28 = phi <4 x i32> [ zeroinitializer, %entry ], [ %51, %vector.body ] %vec.phi29 = phi <4 x i32> [ zeroinitializer, %entry ], [ %52, %vector.body ] %vec.phi30 = phi <4 x i32> [ zeroinitializer, %entry ], [ %53, %vector.body ] - %wide.load32 = load <4 x i32>* null, align 4 + %wide.load32 = load <4 x i32>, <4 x i32>* null, align 4 %.sum82 = add i64 %index, 24 %0 = getelementptr [1024 x i32], [1024 x i32]* @ub, i64 0, i64 %.sum82 %1 = bitcast i32* %0 to <4 x i32>* - %wide.load36 = load <4 x i32>* %1, align 4 - %wide.load37 = load <4 x i32>* undef, align 4 + %wide.load36 = load <4 x i32>, <4 x i32>* %1, align 4 + %wide.load37 = load <4 x i32>, <4 x i32>* undef, align 4 %.sum84 = add i64 %index, 32 %2 = getelementptr [1024 x i32], [1024 x i32]* @ub, i64 0, i64 %.sum84 %3 = bitcast i32* %2 to <4 x i32>* - %wide.load38 = load <4 x i32>* %3, align 4 + %wide.load38 = load <4 x i32>, <4 x i32>* %3, align 4 %.sum85 = add i64 %index, 36 %4 = getelementptr [1024 x i32], [1024 x i32]* @ub, i64 0, i64 %.sum85 %5 = bitcast i32* %4 to <4 x i32>* - %wide.load39 = load <4 x i32>* %5, align 4 + %wide.load39 = load <4 x i32>, <4 x i32>* %5, align 4 %6 = getelementptr [1024 x i32], [1024 x i32]* @ub, i64 0, i64 undef %7 = bitcast i32* %6 to <4 x i32>* - %wide.load40 = load <4 x i32>* %7, align 4 + %wide.load40 = load <4 x i32>, <4 x i32>* %7, align 4 %.sum87 = add i64 %index, 44 %8 = getelementptr [1024 x i32], [1024 x i32]* @ub, i64 0, i64 %.sum87 %9 = bitcast i32* %8 to <4 x i32>* - %wide.load41 = load <4 x i32>* %9, align 4 + %wide.load41 = load <4 x i32>, <4 x i32>* %9, align 4 %10 = getelementptr inbounds [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %index %11 = bitcast i32* %10 to <4 x i32>* - %wide.load42 = load <4 x i32>* %11, align 4 + %wide.load42 = load <4 x i32>, <4 x i32>* %11, align 4 %.sum8889 = or i64 %index, 4 %12 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum8889 %13 = bitcast i32* %12 to <4 x i32>* - %wide.load43 = load <4 x i32>* %13, align 4 + %wide.load43 = load <4 x i32>, <4 x i32>* %13, align 4 %.sum9091 = or i64 %index, 8 %14 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum9091 %15 = bitcast i32* %14 to <4 x i32>* - %wide.load44 = load <4 x i32>* %15, align 4 + %wide.load44 = load <4 x i32>, <4 x i32>* %15, align 4 %.sum94 = add i64 %index, 16 %16 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum94 %17 = bitcast i32* %16 to <4 x i32>* - %wide.load46 = load <4 x i32>* %17, align 4 + %wide.load46 = load <4 x i32>, <4 x i32>* %17, align 4 %.sum95 = add i64 %index, 20 %18 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum95 %19 = bitcast i32* %18 to <4 x i32>* - %wide.load47 = load <4 x i32>* %19, align 4 + %wide.load47 = load <4 x i32>, <4 x i32>* %19, align 4 %20 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 undef %21 = bitcast i32* %20 to <4 x i32>* - %wide.load48 = load <4 x i32>* %21, align 4 + %wide.load48 = load <4 x i32>, <4 x i32>* %21, align 4 %.sum97 = add i64 %index, 28 %22 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum97 %23 = bitcast i32* %22 to <4 x i32>* - %wide.load49 = load <4 x i32>* %23, align 4 + %wide.load49 = load <4 x i32>, <4 x i32>* %23, align 4 %.sum98 = add i64 %index, 32 %24 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum98 %25 = bitcast i32* %24 to <4 x i32>* - %wide.load50 = load <4 x i32>* %25, align 4 + %wide.load50 = load <4 x i32>, <4 x i32>* %25, align 4 %.sum99 = add i64 %index, 36 %26 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum99 %27 = bitcast i32* %26 to <4 x i32>* - %wide.load51 = load <4 x i32>* %27, align 4 + %wide.load51 = load <4 x i32>, <4 x i32>* %27, align 4 %.sum100 = add i64 %index, 40 %28 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum100 %29 = bitcast i32* %28 to <4 x i32>* - %wide.load52 = load <4 x i32>* %29, align 4 + %wide.load52 = load <4 x i32>, <4 x i32>* %29, align 4 %.sum101 = add i64 %index, 44 %30 = getelementptr [1024 x i32], [1024 x i32]* @uc, i64 0, i64 %.sum101 %31 = bitcast i32* %30 to <4 x i32>* - %wide.load53 = load <4 x i32>* %31, align 4 + %wide.load53 = load <4 x i32>, <4 x i32>* %31, align 4 %32 = add <4 x i32> zeroinitializer, %vec.phi %33 = add <4 x i32> zeroinitializer, %vec.phi20 %34 = add <4 x i32> %wide.load32, %vec.phi21 diff --git a/test/CodeGen/PowerPC/vsx-infl-copy2.ll b/test/CodeGen/PowerPC/vsx-infl-copy2.ll index 3b86e340976..32d6f1e68bd 100644 --- a/test/CodeGen/PowerPC/vsx-infl-copy2.ll +++ b/test/CodeGen/PowerPC/vsx-infl-copy2.ll @@ -29,39 +29,39 @@ vector.body: ; preds = %vector.body, %loop_ %vec.phi70 = phi <4 x i32> [ %41, %vector.body ], [ zeroinitializer, %loop_start.preheader ] %vec.phi71 = phi <4 x i32> [ %42, %vector.body ], [ zeroinitializer, %loop_start.preheader ] %.sum = add i64 0, 4 - %wide.load72 = load <4 x i32>* null, align 4 + %wide.load72 = load <4 x i32>, <4 x i32>* null, align 4 %.sum109 = add i64 0, 8 %0 = getelementptr i32, i32* %first, i64 %.sum109 %1 = bitcast i32* %0 to <4 x i32>* - %wide.load73 = load <4 x i32>* %1, align 4 + %wide.load73 = load <4 x i32>, <4 x i32>* %1, align 4 %.sum110 = add i64 0, 12 %2 = getelementptr i32, i32* %first, i64 %.sum110 %3 = bitcast i32* %2 to <4 x i32>* - %wide.load74 = load <4 x i32>* %3, align 4 + %wide.load74 = load <4 x i32>, <4 x i32>* %3, align 4 %.sum112 = add i64 0, 20 %4 = getelementptr i32, i32* %first, i64 %.sum112 %5 = bitcast i32* %4 to <4 x i32>* - %wide.load76 = load <4 x i32>* %5, align 4 + %wide.load76 = load <4 x i32>, <4 x i32>* %5, align 4 %.sum114 = add i64 0, 28 %6 = getelementptr i32, i32* %first, i64 %.sum114 %7 = bitcast i32* %6 to <4 x i32>* - %wide.load78 = load <4 x i32>* %7, align 4 + %wide.load78 = load <4 x i32>, <4 x i32>* %7, align 4 %.sum115 = add i64 0, 32 %8 = getelementptr i32, i32* %first, i64 %.sum115 %9 = bitcast i32* %8 to <4 x i32>* - %wide.load79 = load <4 x i32>* %9, align 4 + %wide.load79 = load <4 x i32>, <4 x i32>* %9, align 4 %.sum116 = add i64 0, 36 %10 = getelementptr i32, i32* %first, i64 %.sum116 %11 = bitcast i32* %10 to <4 x i32>* - %wide.load80 = load <4 x i32>* %11, align 4 + %wide.load80 = load <4 x i32>, <4 x i32>* %11, align 4 %.sum117 = add i64 0, 40 %12 = getelementptr i32, i32* %first, i64 %.sum117 %13 = bitcast i32* %12 to <4 x i32>* - %wide.load81 = load <4 x i32>* %13, align 4 + %wide.load81 = load <4 x i32>, <4 x i32>* %13, align 4 %.sum118 = add i64 0, 44 %14 = getelementptr i32, i32* %first, i64 %.sum118 %15 = bitcast i32* %14 to <4 x i32>* - %wide.load82 = load <4 x i32>* %15, align 4 + %wide.load82 = load <4 x i32>, <4 x i32>* %15, align 4 %16 = mul <4 x i32> %wide.load72, <i32 269850533, i32 269850533, i32 269850533, i32 269850533> %17 = mul <4 x i32> %wide.load73, <i32 269850533, i32 269850533, i32 269850533, i32 269850533> %18 = mul <4 x i32> %wide.load74, <i32 269850533, i32 269850533, i32 269850533, i32 269850533> diff --git a/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll b/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll index c65a0770384..e6ddf647616 100644 --- a/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll +++ b/test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll @@ -51,24 +51,24 @@ entry: %__b.addr.i = alloca <4 x i32>*, align 8 store i32 0, i32* %__a.addr.i, align 4 store <4 x i32>* @vsi, <4 x i32>** %__b.addr.i, align 8 - %0 = load i32* %__a.addr.i, align 4 - %1 = load <4 x i32>** %__b.addr.i, align 8 + %0 = load i32, i32* %__a.addr.i, align 4 + %1 = load <4 x i32>*, <4 x i32>** %__b.addr.i, align 8 %2 = bitcast <4 x i32>* %1 to i8* %3 = getelementptr i8, i8* %2, i32 %0 %4 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %3) store <4 x i32> %4, <4 x i32>* @res_vsi, align 16 store i32 0, i32* %__a.addr.i31, align 4 store <4 x i32>* @vui, <4 x i32>** %__b.addr.i32, align 8 - %5 = load i32* %__a.addr.i31, align 4 - %6 = load <4 x i32>** %__b.addr.i32, align 8 + %5 = load i32, i32* %__a.addr.i31, align 4 + %6 = load <4 x i32>*, <4 x i32>** %__b.addr.i32, align 8 %7 = bitcast <4 x i32>* %6 to i8* %8 = getelementptr i8, i8* %7, i32 %5 %9 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %8) store <4 x i32> %9, <4 x i32>* @res_vui, align 16 store i32 0, i32* %__a.addr.i29, align 4 store <4 x float>* @vf, <4 x float>** %__b.addr.i30, align 8 - %10 = load i32* %__a.addr.i29, align 4 - %11 = load <4 x float>** %__b.addr.i30, align 8 + %10 = load i32, i32* %__a.addr.i29, align 4 + %11 = load <4 x float>*, <4 x float>** %__b.addr.i30, align 8 %12 = bitcast <4 x float>* %11 to i8* %13 = getelementptr i8, i8* %12, i32 %10 %14 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %13) @@ -76,8 +76,8 @@ entry: store <4 x float> %15, <4 x float>* @res_vf, align 16 store i32 0, i32* %__a.addr.i27, align 4 store <2 x i64>* @vsll, <2 x i64>** %__b.addr.i28, align 8 - %16 = load i32* %__a.addr.i27, align 4 - %17 = load <2 x i64>** %__b.addr.i28, align 8 + %16 = load i32, i32* %__a.addr.i27, align 4 + %17 = load <2 x i64>*, <2 x i64>** %__b.addr.i28, align 8 %18 = bitcast <2 x i64>* %17 to i8* %19 = getelementptr i8, i8* %18, i32 %16 %20 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %19) @@ -85,8 +85,8 @@ entry: store <2 x i64> %21, <2 x i64>* @res_vsll, align 16 store i32 0, i32* %__a.addr.i25, align 4 store <2 x i64>* @vull, <2 x i64>** %__b.addr.i26, align 8 - %22 = load i32* %__a.addr.i25, align 4 - %23 = load <2 x i64>** %__b.addr.i26, align 8 + %22 = load i32, i32* %__a.addr.i25, align 4 + %23 = load <2 x i64>*, <2 x i64>** %__b.addr.i26, align 8 %24 = bitcast <2 x i64>* %23 to i8* %25 = getelementptr i8, i8* %24, i32 %22 %26 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %25) @@ -94,72 +94,72 @@ entry: store <2 x i64> %27, <2 x i64>* @res_vull, align 16 store i32 0, i32* %__a.addr.i23, align 4 store <2 x double>* @vd, <2 x double>** %__b.addr.i24, align 8 - %28 = load i32* %__a.addr.i23, align 4 - %29 = load <2 x double>** %__b.addr.i24, align 8 + %28 = load i32, i32* %__a.addr.i23, align 4 + %29 = load <2 x double>*, <2 x double>** %__b.addr.i24, align 8 %30 = bitcast <2 x double>* %29 to i8* %31 = getelementptr i8, i8* %30, i32 %28 %32 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %31) store <2 x double> %32, <2 x double>* @res_vd, align 16 - %33 = load <4 x i32>* @vsi, align 16 + %33 = load <4 x i32>, <4 x i32>* @vsi, align 16 store <4 x i32> %33, <4 x i32>* %__a.addr.i20, align 16 store i32 0, i32* %__b.addr.i21, align 4 store <4 x i32>* @res_vsi, <4 x i32>** %__c.addr.i22, align 8 - %34 = load <4 x i32>* %__a.addr.i20, align 16 - %35 = load i32* %__b.addr.i21, align 4 - %36 = load <4 x i32>** %__c.addr.i22, align 8 + %34 = load <4 x i32>, <4 x i32>* %__a.addr.i20, align 16 + %35 = load i32, i32* %__b.addr.i21, align 4 + %36 = load <4 x i32>*, <4 x i32>** %__c.addr.i22, align 8 %37 = bitcast <4 x i32>* %36 to i8* %38 = getelementptr i8, i8* %37, i32 %35 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %34, i8* %38) - %39 = load <4 x i32>* @vui, align 16 + %39 = load <4 x i32>, <4 x i32>* @vui, align 16 store <4 x i32> %39, <4 x i32>* %__a.addr.i17, align 16 store i32 0, i32* %__b.addr.i18, align 4 store <4 x i32>* @res_vui, <4 x i32>** %__c.addr.i19, align 8 - %40 = load <4 x i32>* %__a.addr.i17, align 16 - %41 = load i32* %__b.addr.i18, align 4 - %42 = load <4 x i32>** %__c.addr.i19, align 8 + %40 = load <4 x i32>, <4 x i32>* %__a.addr.i17, align 16 + %41 = load i32, i32* %__b.addr.i18, align 4 + %42 = load <4 x i32>*, <4 x i32>** %__c.addr.i19, align 8 %43 = bitcast <4 x i32>* %42 to i8* %44 = getelementptr i8, i8* %43, i32 %41 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %40, i8* %44) - %45 = load <4 x float>* @vf, align 16 + %45 = load <4 x float>, <4 x float>* @vf, align 16 store <4 x float> %45, <4 x float>* %__a.addr.i14, align 16 store i32 0, i32* %__b.addr.i15, align 4 store <4 x float>* @res_vf, <4 x float>** %__c.addr.i16, align 8 - %46 = load <4 x float>* %__a.addr.i14, align 16 + %46 = load <4 x float>, <4 x float>* %__a.addr.i14, align 16 %47 = bitcast <4 x float> %46 to <4 x i32> - %48 = load i32* %__b.addr.i15, align 4 - %49 = load <4 x float>** %__c.addr.i16, align 8 + %48 = load i32, i32* %__b.addr.i15, align 4 + %49 = load <4 x float>*, <4 x float>** %__c.addr.i16, align 8 %50 = bitcast <4 x float>* %49 to i8* %51 = getelementptr i8, i8* %50, i32 %48 call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %47, i8* %51) #1 - %52 = load <2 x i64>* @vsll, align 16 + %52 = load <2 x i64>, <2 x i64>* @vsll, align 16 store <2 x i64> %52, <2 x i64>* %__a.addr.i11, align 16 store i32 0, i32* %__b.addr.i12, align 4 store <2 x i64>* @res_vsll, <2 x i64>** %__c.addr.i13, align 8 - %53 = load <2 x i64>* %__a.addr.i11, align 16 + %53 = load <2 x i64>, <2 x i64>* %__a.addr.i11, align 16 %54 = bitcast <2 x i64> %53 to <2 x double> - %55 = load i32* %__b.addr.i12, align 4 - %56 = load <2 x i64>** %__c.addr.i13, align 8 + %55 = load i32, i32* %__b.addr.i12, align 4 + %56 = load <2 x i64>*, <2 x i64>** %__c.addr.i13, align 8 %57 = bitcast <2 x i64>* %56 to i8* %58 = getelementptr i8, i8* %57, i32 %55 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %54, i8* %58) - %59 = load <2 x i64>* @vull, align 16 + %59 = load <2 x i64>, <2 x i64>* @vull, align 16 store <2 x i64> %59, <2 x i64>* %__a.addr.i8, align 16 store i32 0, i32* %__b.addr.i9, align 4 store <2 x i64>* @res_vull, <2 x i64>** %__c.addr.i10, align 8 - %60 = load <2 x i64>* %__a.addr.i8, align 16 + %60 = load <2 x i64>, <2 x i64>* %__a.addr.i8, align 16 %61 = bitcast <2 x i64> %60 to <2 x double> - %62 = load i32* %__b.addr.i9, align 4 - %63 = load <2 x i64>** %__c.addr.i10, align 8 + %62 = load i32, i32* %__b.addr.i9, align 4 + %63 = load <2 x i64>*, <2 x i64>** %__c.addr.i10, align 8 %64 = bitcast <2 x i64>* %63 to i8* %65 = getelementptr i8, i8* %64, i32 %62 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %61, i8* %65) - %66 = load <2 x double>* @vd, align 16 + %66 = load <2 x double>, <2 x double>* @vd, align 16 store <2 x double> %66, <2 x double>* %__a.addr.i6, align 16 store i32 0, i32* %__b.addr.i7, align 4 store <2 x double>* @res_vd, <2 x double>** %__c.addr.i, align 8 - %67 = load <2 x double>* %__a.addr.i6, align 16 - %68 = load i32* %__b.addr.i7, align 4 - %69 = load <2 x double>** %__c.addr.i, align 8 + %67 = load <2 x double>, <2 x double>* %__a.addr.i6, align 16 + %68 = load i32, i32* %__b.addr.i7, align 4 + %69 = load <2 x double>*, <2 x double>** %__c.addr.i, align 8 %70 = bitcast <2 x double>* %69 to i8* %71 = getelementptr i8, i8* %70, i32 %68 call void @llvm.ppc.vsx.stxvd2x(<2 x double> %67, i8* %71) diff --git a/test/CodeGen/PowerPC/vsx-ldst.ll b/test/CodeGen/PowerPC/vsx-ldst.ll index 688187d1fcb..4ed91bca420 100644 --- a/test/CodeGen/PowerPC/vsx-ldst.ll +++ b/test/CodeGen/PowerPC/vsx-ldst.ll @@ -30,12 +30,12 @@ ; Function Attrs: nounwind define void @test1() { entry: - %0 = load <4 x i32>* @vsi, align 16 - %1 = load <4 x i32>* @vui, align 16 - %2 = load <4 x i32>* bitcast (<4 x float>* @vf to <4 x i32>*), align 16 - %3 = load <2 x double>* bitcast (<2 x i64>* @vsll to <2 x double>*), align 16 - %4 = load <2 x double>* bitcast (<2 x i64>* @vull to <2 x double>*), align 16 - %5 = load <2 x double>* @vd, align 16 + %0 = load <4 x i32>, <4 x i32>* @vsi, align 16 + %1 = load <4 x i32>, <4 x i32>* @vui, align 16 + %2 = load <4 x i32>, <4 x i32>* bitcast (<4 x float>* @vf to <4 x i32>*), align 16 + %3 = load <2 x double>, <2 x double>* bitcast (<2 x i64>* @vsll to <2 x double>*), align 16 + %4 = load <2 x double>, <2 x double>* bitcast (<2 x i64>* @vull to <2 x double>*), align 16 + %5 = load <2 x double>, <2 x double>* @vd, align 16 store <4 x i32> %0, <4 x i32>* @res_vsi, align 16 store <4 x i32> %1, <4 x i32>* @res_vui, align 16 store <4 x i32> %2, <4 x i32>* bitcast (<4 x float>* @res_vf to <4 x i32>*), align 16 diff --git a/test/CodeGen/PowerPC/vsx-minmax.ll b/test/CodeGen/PowerPC/vsx-minmax.ll index 47f50abbc2a..ad72cacae2a 100644 --- a/test/CodeGen/PowerPC/vsx-minmax.ll +++ b/test/CodeGen/PowerPC/vsx-minmax.ll @@ -18,35 +18,35 @@ target triple = "powerpc64-unknown-linux-gnu" define void @test1() #0 { ; CHECK-LABEL: @test1 entry: - %0 = load volatile <4 x float>* @vf, align 16 - %1 = load volatile <4 x float>* @vf, align 16 + %0 = load volatile <4 x float>, <4 x float>* @vf, align 16 + %1 = load volatile <4 x float>, <4 x float>* @vf, align 16 %2 = tail call <4 x float> @llvm.ppc.vsx.xvmaxsp(<4 x float> %0, <4 x float> %1) ; CHECK: xvmaxsp store <4 x float> %2, <4 x float>* @vf1, align 16 - %3 = load <2 x double>* @vd, align 16 + %3 = load <2 x double>, <2 x double>* @vd, align 16 %4 = tail call <2 x double> @llvm.ppc.vsx.xvmaxdp(<2 x double> %3, <2 x double> %3) ; CHECK: xvmaxdp store <2 x double> %4, <2 x double>* @vd1, align 16 - %5 = load volatile <4 x float>* @vf, align 16 - %6 = load volatile <4 x float>* @vf, align 16 + %5 = load volatile <4 x float>, <4 x float>* @vf, align 16 + %6 = load volatile <4 x float>, <4 x float>* @vf, align 16 %7 = tail call <4 x float> @llvm.ppc.vsx.xvmaxsp(<4 x float> %5, <4 x float> %6) ; CHECK: xvmaxsp store <4 x float> %7, <4 x float>* @vf2, align 16 - %8 = load volatile <4 x float>* @vf, align 16 - %9 = load volatile <4 x float>* @vf, align 16 + %8 = load volatile <4 x float>, <4 x float>* @vf, align 16 + %9 = load volatile <4 x float>, <4 x float>* @vf, align 16 %10 = tail call <4 x float> @llvm.ppc.vsx.xvminsp(<4 x float> %8, <4 x float> %9) ; CHECK: xvminsp store <4 x float> %10, <4 x float>* @vf3, align 16 - %11 = load <2 x double>* @vd, align 16 + %11 = load <2 x double>, <2 x double>* @vd, align 16 %12 = tail call <2 x double> @llvm.ppc.vsx.xvmindp(<2 x double> %11, <2 x double> %11) ; CHECK: xvmindp store <2 x double> %12, <2 x double>* @vd2, align 16 - %13 = load volatile <4 x float>* @vf, align 16 - %14 = load volatile <4 x float>* @vf, align 16 + %13 = load volatile <4 x float>, <4 x float>* @vf, align 16 + %14 = load volatile <4 x float>, <4 x float>* @vf, align 16 %15 = tail call <4 x float> @llvm.ppc.vsx.xvminsp(<4 x float> %13, <4 x float> %14) ; CHECK: xvminsp store <4 x float> %15, <4 x float>* @vf4, align 16 - %16 = load double* @d, align 8 + %16 = load double, double* @d, align 8 %17 = tail call double @llvm.ppc.vsx.xsmaxdp(double %16, double %16) ; CHECK: xsmaxdp store double %17, double* @d1, align 8 diff --git a/test/CodeGen/PowerPC/vsx-p8.ll b/test/CodeGen/PowerPC/vsx-p8.ll index d5a19059c60..878714baab7 100644 --- a/test/CodeGen/PowerPC/vsx-p8.ll +++ b/test/CodeGen/PowerPC/vsx-p8.ll @@ -8,7 +8,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; Unaligned loads/stores on P8 and later should use VSX where possible. define <2 x double> @test28u(<2 x double>* %a) { - %v = load <2 x double>* %a, align 8 + %v = load <2 x double>, <2 x double>* %a, align 8 ret <2 x double> %v ; CHECK-LABEL: @test28u @@ -26,7 +26,7 @@ define void @test29u(<2 x double>* %a, <2 x double> %b) { } define <4 x float> @test32u(<4 x float>* %a) { - %v = load <4 x float>* %a, align 8 + %v = load <4 x float>, <4 x float>* %a, align 8 ret <4 x float> %v ; CHECK-REG-LABEL: @test32u diff --git a/test/CodeGen/PowerPC/vsx.ll b/test/CodeGen/PowerPC/vsx.ll index f91ffdb960b..25cf3d4750a 100644 --- a/test/CodeGen/PowerPC/vsx.ll +++ b/test/CodeGen/PowerPC/vsx.ll @@ -501,7 +501,7 @@ define <2 x i64> @test27(<2 x i64> %a, <2 x i64> %b) { } define <2 x double> @test28(<2 x double>* %a) { - %v = load <2 x double>* %a, align 16 + %v = load <2 x double>, <2 x double>* %a, align 16 ret <2 x double> %v ; CHECK-LABEL: @test28 @@ -519,7 +519,7 @@ define void @test29(<2 x double>* %a, <2 x double> %b) { } define <2 x double> @test28u(<2 x double>* %a) { - %v = load <2 x double>* %a, align 8 + %v = load <2 x double>, <2 x double>* %a, align 8 ret <2 x double> %v ; CHECK-LABEL: @test28u @@ -537,7 +537,7 @@ define void @test29u(<2 x double>* %a, <2 x double> %b) { } define <2 x i64> @test30(<2 x i64>* %a) { - %v = load <2 x i64>* %a, align 16 + %v = load <2 x i64>, <2 x i64>* %a, align 16 ret <2 x i64> %v ; CHECK-REG-LABEL: @test30 @@ -562,7 +562,7 @@ define void @test31(<2 x i64>* %a, <2 x i64> %b) { } define <4 x float> @test32(<4 x float>* %a) { - %v = load <4 x float>* %a, align 16 + %v = load <4 x float>, <4 x float>* %a, align 16 ret <4 x float> %v ; CHECK-REG-LABEL: @test32 @@ -590,7 +590,7 @@ define void @test33(<4 x float>* %a, <4 x float> %b) { } define <4 x float> @test32u(<4 x float>* %a) { - %v = load <4 x float>* %a, align 8 + %v = load <4 x float>, <4 x float>* %a, align 8 ret <4 x float> %v ; CHECK-LABEL: @test32u @@ -616,7 +616,7 @@ define void @test33u(<4 x float>* %a, <4 x float> %b) { } define <4 x i32> @test34(<4 x i32>* %a) { - %v = load <4 x i32>* %a, align 16 + %v = load <4 x i32>, <4 x i32>* %a, align 16 ret <4 x i32> %v ; CHECK-REG-LABEL: @test34 @@ -718,7 +718,7 @@ define <2 x i64> @test47(<2 x float> %a) { } define <2 x double> @test50(double* %a) { - %v = load double* %a, align 8 + %v = load double, double* %a, align 8 %w = insertelement <2 x double> undef, double %v, i32 0 %x = insertelement <2 x double> %w, double %v, i32 1 ret <2 x double> %x diff --git a/test/CodeGen/PowerPC/vsx_insert_extract_le.ll b/test/CodeGen/PowerPC/vsx_insert_extract_le.ll index 0a9df377911..e00cc4bf9fc 100644 --- a/test/CodeGen/PowerPC/vsx_insert_extract_le.ll +++ b/test/CodeGen/PowerPC/vsx_insert_extract_le.ll @@ -1,8 +1,8 @@ ; RUN: llc -mcpu=pwr8 -mattr=+vsx -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s define <2 x double> @testi0(<2 x double>* %p1, double* %p2) { - %v = load <2 x double>* %p1 - %s = load double* %p2 + %v = load <2 x double>, <2 x double>* %p1 + %s = load double, double* %p2 %r = insertelement <2 x double> %v, double %s, i32 0 ret <2 x double> %r @@ -15,8 +15,8 @@ define <2 x double> @testi0(<2 x double>* %p1, double* %p2) { } define <2 x double> @testi1(<2 x double>* %p1, double* %p2) { - %v = load <2 x double>* %p1 - %s = load double* %p2 + %v = load <2 x double>, <2 x double>* %p1 + %s = load double, double* %p2 %r = insertelement <2 x double> %v, double %s, i32 1 ret <2 x double> %r @@ -29,7 +29,7 @@ define <2 x double> @testi1(<2 x double>* %p1, double* %p2) { } define double @teste0(<2 x double>* %p1) { - %v = load <2 x double>* %p1 + %v = load <2 x double>, <2 x double>* %p1 %r = extractelement <2 x double> %v, i32 0 ret double %r @@ -42,7 +42,7 @@ define double @teste0(<2 x double>* %p1) { } define double @teste1(<2 x double>* %p1) { - %v = load <2 x double>* %p1 + %v = load <2 x double>, <2 x double>* %p1 %r = extractelement <2 x double> %v, i32 1 ret double %r diff --git a/test/CodeGen/PowerPC/vsx_shuffle_le.ll b/test/CodeGen/PowerPC/vsx_shuffle_le.ll index 588cfdad785..6bfde935f1d 100644 --- a/test/CodeGen/PowerPC/vsx_shuffle_le.ll +++ b/test/CodeGen/PowerPC/vsx_shuffle_le.ll @@ -1,8 +1,8 @@ ; RUN: llc -mcpu=pwr8 -mattr=+vsx -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s define <2 x double> @test00(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 0> ret <2 x double> %v3 @@ -13,8 +13,8 @@ define <2 x double> @test00(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test01(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 1> ret <2 x double> %v3 @@ -24,8 +24,8 @@ define <2 x double> @test01(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test02(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 2> ret <2 x double> %v3 @@ -38,8 +38,8 @@ define <2 x double> @test02(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test03(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 0, i32 3> ret <2 x double> %v3 @@ -52,8 +52,8 @@ define <2 x double> @test03(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test10(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 0> ret <2 x double> %v3 @@ -64,8 +64,8 @@ define <2 x double> @test10(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test11(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 1> ret <2 x double> %v3 @@ -76,8 +76,8 @@ define <2 x double> @test11(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test12(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 2> ret <2 x double> %v3 @@ -90,8 +90,8 @@ define <2 x double> @test12(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test13(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 1, i32 3> ret <2 x double> %v3 @@ -104,8 +104,8 @@ define <2 x double> @test13(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test20(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 0> ret <2 x double> %v3 @@ -118,8 +118,8 @@ define <2 x double> @test20(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test21(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 1> ret <2 x double> %v3 @@ -132,8 +132,8 @@ define <2 x double> @test21(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test22(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 2> ret <2 x double> %v3 @@ -144,8 +144,8 @@ define <2 x double> @test22(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test23(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 2, i32 3> ret <2 x double> %v3 @@ -155,8 +155,8 @@ define <2 x double> @test23(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test30(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 0> ret <2 x double> %v3 @@ -169,8 +169,8 @@ define <2 x double> @test30(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test31(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 1> ret <2 x double> %v3 @@ -183,8 +183,8 @@ define <2 x double> @test31(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test32(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 2> ret <2 x double> %v3 @@ -195,8 +195,8 @@ define <2 x double> @test32(<2 x double>* %p1, <2 x double>* %p2) { } define <2 x double> @test33(<2 x double>* %p1, <2 x double>* %p2) { - %v1 = load <2 x double>* %p1 - %v2 = load <2 x double>* %p2 + %v1 = load <2 x double>, <2 x double>* %p1 + %v2 = load <2 x double>, <2 x double>* %p2 %v3 = shufflevector <2 x double> %v1, <2 x double> %v2, <2 x i32> < i32 3, i32 3> ret <2 x double> %v3 diff --git a/test/CodeGen/PowerPC/weak_def_can_be_hidden.ll b/test/CodeGen/PowerPC/weak_def_can_be_hidden.ll index e038b3f2fb2..0b87613bb4d 100644 --- a/test/CodeGen/PowerPC/weak_def_can_be_hidden.ll +++ b/test/CodeGen/PowerPC/weak_def_can_be_hidden.ll @@ -11,7 +11,7 @@ ; CHECK-D89: .weak_definition _v1 define i32 @f1() { - %x = load i32 * @v1 + %x = load i32 , i32 * @v1 ret i32 %x } @@ -45,6 +45,6 @@ define i32* @f3() { ; CHECK-D89: .weak_definition _v4 define i32 @f4() { - %x = load i32 * @v4 + %x = load i32 , i32 * @v4 ret i32 %x } diff --git a/test/CodeGen/PowerPC/zero-not-run.ll b/test/CodeGen/PowerPC/zero-not-run.ll index 9df0d6e004e..b3b7634f41a 100644 --- a/test/CodeGen/PowerPC/zero-not-run.ll +++ b/test/CodeGen/PowerPC/zero-not-run.ll @@ -8,7 +8,7 @@ entry: br i1 undef, label %for.body, label %for.end731 for.body: ; preds = %entry - %0 = load i32* undef, align 4 + %0 = load i32, i32* undef, align 4 %or31 = or i32 %0, 319143828 store i32 %or31, i32* undef, align 4 %cmp32 = icmp eq i32 319143828, %or31 diff --git a/test/CodeGen/PowerPC/zext-free.ll b/test/CodeGen/PowerPC/zext-free.ll index 09651cf52be..ffbbb544501 100644 --- a/test/CodeGen/PowerPC/zext-free.ll +++ b/test/CodeGen/PowerPC/zext-free.ll @@ -5,16 +5,16 @@ target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: noreturn nounwind define signext i32 @_Z1fRPc(i8** nocapture dereferenceable(8) %p) #0 { entry: - %.pre = load i8** %p, align 8 + %.pre = load i8*, i8** %p, align 8 br label %loop loop: ; preds = %loop.backedge, %entry %0 = phi i8* [ %.pre, %entry ], [ %.be, %loop.backedge ] - %1 = load i8* %0, align 1 + %1 = load i8, i8* %0, align 1 %tobool = icmp eq i8 %1, 0 %incdec.ptr = getelementptr inbounds i8, i8* %0, i64 1 store i8* %incdec.ptr, i8** %p, align 8 - %2 = load i8* %incdec.ptr, align 1 + %2 = load i8, i8* %incdec.ptr, align 1 %tobool2 = icmp ne i8 %2, 0 %or.cond = and i1 %tobool, %tobool2 br i1 %or.cond, label %if.then3, label %loop.backedge |