Byebye llvm-upgrade!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48762 91177308-0d34-0410-b5e6-96231b3b80d8

43 files changed, 582 insertions, 637 deletions

diff --git a/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
index 4603bdbbf09..93a91234b70 100644
--- a/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
+++ b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll
@@ -1,6 +1,7 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-void %main() {
-	%tr4 = shl ulong 1, ubyte 0		; <ulong> [#uses=0]
-	ret void
+define void @main() {
+        %tr4 = shl i64 1, 0             ; <i64> [#uses=0]
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
index 8f54c78e7a9..1a1aca4b5d1 100644
--- a/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
+++ b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
@@ -1,7 +1,9 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-void %main() {
-	%shamt = add ubyte 0, 1		; <ubyte> [#uses=1]
-	%tr2 = shr long 1, ubyte %shamt		; <long> [#uses=0]
-	ret void
+define void @main() {
+        %shamt = add i8 0, 1            ; <i8> [#uses=1]
+        %shift.upgrd.1 = zext i8 %shamt to i64          ; <i64> [#uses=1]
+        %tr2 = ashr i64 1, %shift.upgrd.1               ; <i64> [#uses=0]
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
index 87f6005a364..3e490b1dc7a 100644
--- a/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
+++ b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll
@@ -1,3 +1,4 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep .comm.*X,0
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep .comm.*X,0
+
+@X = linkonce global {  } zeroinitializer               ; <{  }*> [#uses=0]
 
-%X = linkonce global {} {}
diff --git a/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
index 5dc4b28655a..f84caaf1d49 100644
--- a/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
+++ b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
@@ -1,8 +1,8 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 
+; RUN: llvm-as < %s | llc -march=ppc32 
 
-int %main() {
-        %setle = setle long 1, 0
-        %select = select bool true, bool %setle, bool true
-        ret int 0
+define i32 @main() {
+        %setle = icmp sle i64 1, 0              ; <i1> [#uses=1]
+        %select = select i1 true, i1 %setle, i1 true            ; <i1> [#uses=0]
+        ret i32 0
 }
 
diff --git a/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
index a4121c522fa..7b3e9b4f092 100644
--- a/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
+++ b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll
@@ -1,3 +1,5 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-long %test() { ret long undef }
+define i64 @test() {
+        ret i64 undef
+}
diff --git a/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
index ef0137f4cd6..8e8fee2888f 100644
--- a/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
+++ b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll
@@ -1,12 +1,13 @@
 ; this should not crash the ppc backend
 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-uint %test( int %j.0.0.i) {
-  %tmp.85.i = and int %j.0.0.i, 7
-  %tmp.161278.i = cast int %tmp.85.i to uint
-  %tmp.5.i77.i = shr uint %tmp.161278.i, ubyte 3
-  ret uint %tmp.5.i77.i
+
+define i32 @test(i32 %j.0.0.i) {
+        %tmp.85.i = and i32 %j.0.0.i, 7         ; <i32> [#uses=1]
+        %tmp.161278.i = bitcast i32 %tmp.85.i to i32            ; <i32> [#uses=1]
+        %tmp.5.i77.i = lshr i32 %tmp.161278.i, 3                ; <i32> [#uses=1]
+        ret i32 %tmp.5.i77.i
 }
 
 
diff --git a/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
index 4f78ce6b491..428dd0c3e3f 100644
--- a/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
+++ b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll
@@ -1,10 +1,11 @@
 ; This function should have exactly one call to fixdfdi, no more!
 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \
+; RUN: llvm-as < %s | llc -march=ppc32 -mattr=-64bit | \
 ; RUN:    grep {bl .*fixdfdi} | count 1
 
-double %test2(double %tmp.7705) {
-        %mem_tmp.2.0.in = cast double %tmp.7705 to long                ; <long> [#uses=1]
-        %mem_tmp.2.0 = cast long %mem_tmp.2.0.in to double
-	ret double %mem_tmp.2.0
+define double @test2(double %tmp.7705) {
+        %mem_tmp.2.0.in = fptosi double %tmp.7705 to i64                ; <i64> [#uses=1]
+        %mem_tmp.2.0 = sitofp i64 %mem_tmp.2.0.in to double             ; <double> [#uses=1]
+        ret double %mem_tmp.2.0
 }
+
diff --git a/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
index edbdc4a09d0..54f24c61266 100644
--- a/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
+++ b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll
@@ -1,9 +1,11 @@
 ; This was erroneously being turned into an rlwinm instruction.
 ; The sign bit does matter in this case.
 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep srawi
-int %test(int %X) {
-	%Y = and int %X, -2
-	%Z = shr int %Y, ubyte 11
-	ret int %Z
+; RUN: llvm-as < %s | llc -march=ppc32 | grep srawi
+
+define i32 @test(i32 %X) {
+        %Y = and i32 %X, -2             ; <i32> [#uses=1]
+        %Z = ashr i32 %Y, 11            ; <i32> [#uses=1]
+        ret i32 %Z
 }
+
diff --git a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
index 4264e9e82fe..d56cffcf4ab 100644
--- a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
+++ b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
@@ -1,17 +1,18 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc
-target endian = big
-target pointersize = 32
+; RUN: llvm-as < %s | llc
+
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.2.0"
-implementation   ; Functions:
 
-void %bar(int %G, int %E, int %F, int %A, int %B, int %C, int %D, sbyte* %fmt, ...) {
-	%ap = alloca sbyte*		; <sbyte**> [#uses=2]
-	call void %llvm.va_start( sbyte** %ap )
-	%tmp.1 = load sbyte** %ap		; <sbyte*> [#uses=1]
-	%tmp.0 = call double %foo( sbyte* %tmp.1 )		; <double> [#uses=0]
-	ret void
+define void @bar(i32 %G, i32 %E, i32 %F, i32 %A, i32 %B, i32 %C, i32 %D, i8* %fmt, ...) {
+        %ap = alloca i8*                ; <i8**> [#uses=2]
+        %va.upgrd.1 = bitcast i8** %ap to i8*           ; <i8*> [#uses=1]
+        call void @llvm.va_start( i8* %va.upgrd.1 )
+        %tmp.1 = load i8** %ap          ; <i8*> [#uses=1]
+        %tmp.0 = call double @foo( i8* %tmp.1 )         ; <double> [#uses=0]
+        ret void
 }
 
-declare void %llvm.va_start(sbyte**)
+declare void @llvm.va_start(i8*)
+
+declare double @foo(i8*)
 
-declare double %foo(sbyte*)
diff --git a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
index c90ef0aa30d..e2f06f5e69a 100644
--- a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
+++ b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll
@@ -1,12 +1,10 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc | not grep {, f1}
+; RUN: llvm-as < %s | llc | not grep {, f1}
 
-target endian = big
-target pointersize = 32
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.2.0"
 
 ; Dead argument should reserve an FP register.
-double %bar(double %DEAD, double %X, double %Y) {
-        %tmp.2 = add double %X, %Y
+define double @bar(double %DEAD, double %X, double %Y) {
+        %tmp.2 = add double %X, %Y              ; <double> [#uses=1]
         ret double %tmp.2
 }
-
diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
index 77004593283..86ad7186177 100644
--- a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
+++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
@@ -1,17 +1,19 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc
+; RUN: llvm-as < %s | llc
 
-void %iterative_hash_host_wide_int() {
-	%zero = alloca int		        ; <int*> [#uses=2]
-	%b = alloca uint		        ; <uint*> [#uses=1]
-	store int 0, int* %zero
-	%tmp = load int* %zero		        ; <int> [#uses=1]
-	%tmp5 = cast int %tmp to uint		; <uint> [#uses=1]
-	%tmp6.u = add uint %tmp5, 32		; <uint> [#uses=1]
-	%tmp6 = cast uint %tmp6.u to int	; <int> [#uses=1]
-	%tmp7 = load long* null		        ; <long> [#uses=1]
-	%tmp6 = cast int %tmp6 to ubyte		; <ubyte> [#uses=1]
-	%tmp8 = shr long %tmp7, ubyte %tmp6	; <long> [#uses=1]
-	%tmp8 = cast long %tmp8 to uint		; <uint> [#uses=1]
-	store uint %tmp8, uint* %b
-	unreachable
+define void @iterative_hash_host_wide_int() {
+        %zero = alloca i32              ; <i32*> [#uses=2]
+        %b = alloca i32         ; <i32*> [#uses=1]
+        store i32 0, i32* %zero
+        %tmp = load i32* %zero          ; <i32> [#uses=1]
+        %tmp5 = bitcast i32 %tmp to i32         ; <i32> [#uses=1]
+        %tmp6.u = add i32 %tmp5, 32             ; <i32> [#uses=1]
+        %tmp6 = bitcast i32 %tmp6.u to i32              ; <i32> [#uses=1]
+        %tmp7 = load i64* null          ; <i64> [#uses=1]
+        %tmp6.upgrd.1 = trunc i32 %tmp6 to i8           ; <i8> [#uses=1]
+        %shift.upgrd.2 = zext i8 %tmp6.upgrd.1 to i64           ; <i64> [#uses=1]
+        %tmp8 = ashr i64 %tmp7, %shift.upgrd.2          ; <i64> [#uses=1]
+        %tmp8.upgrd.3 = trunc i64 %tmp8 to i32          ; <i32> [#uses=1]
+        store i32 %tmp8.upgrd.3, i32* %b
+        unreachable
 }
+
diff --git a/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
index dcf599b1a3b..8500260fafc 100644
--- a/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
+++ b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll
@@ -1,7 +1,9 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-double %CalcSpeed(float %tmp127) {
-	%tmp145 = cast float %tmp127 to double		; <double> [#uses=1]
-	%tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 )		; <double> [#uses=0]
-	ret double %tmp150
+
+define double @CalcSpeed(float %tmp127) {
+        %tmp145 = fpext float %tmp127 to double         ; <double> [#uses=1]
+        %tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 )             ; <double> [#uses=1]
+        ret double %tmp150
 }
+
diff --git a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
index b4facea1b16..a536fa162c0 100644
--- a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
+++ b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
@@ -1,10 +1,11 @@
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
 ; RUN:   grep {vspltish v.*, 10}
 
-void %test(<8 x short>* %P) {
-	%tmp = load <8 x short>* %P		; <<8 x short>> [#uses=1]
-	%tmp1 = add <8 x short> %tmp, < short 10, short 10, short 10, short 10, short 10, short 10, short 10, short 10 >		; <<8 x short>> [#uses=1]
-	store <8 x short> %tmp1, <8 x short>* %P
-	ret void
+define void @test(<8 x i16>* %P) {
+        %tmp = load <8 x i16>* %P               ; <<8 x i16>> [#uses=1]
+        %tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 >          ; <<8 x i16>> [#uses=1]
+        store <8 x i16> %tmp1, <8 x i16>* %P
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
index 59f7ed4662b..b79cce2ead0 100644
--- a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
+++ b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll
@@ -1,72 +1,58 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5
+; END.
 
-void %test(sbyte* %stack) {
+define void @test(i8* %stack) {
 entry:
-	%tmp9 = seteq int 0, 0		; <bool> [#uses=1]
-	%tmp30 = seteq uint 0, 0		; <bool> [#uses=1]
-	br bool %tmp30, label %cond_next54, label %cond_true31
-
+	%tmp9 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	%tmp30 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp30, label %cond_next54, label %cond_true31
 cond_true860:		; preds = %bb855
-	%tmp879 = tail call <4 x float> %llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer )		; <<4 x float>> [#uses=1]
-	%tmp880 = cast <4 x float> %tmp879 to <4 x int>		; <<4 x int>> [#uses=2]
-	%tmp883 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 1, uint 1, uint 1, uint 1 >		; <<4 x int>> [#uses=1]
-	%tmp883 = cast <4 x int> %tmp883 to <4 x float>		; <<4 x float>> [#uses=1]
-	%tmp885 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 2, uint 2, uint 2, uint 2 >		; <<4 x int>> [#uses=1]
-	%tmp885 = cast <4 x int> %tmp885 to <4 x float>		; <<4 x float>> [#uses=1]
+	%tmp879 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer )		; <<4 x float>> [#uses=1]
+	%tmp880 = bitcast <4 x float> %tmp879 to <4 x i32>		; <<4 x i32>> [#uses=2]
+	%tmp883 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x i32>> [#uses=1]
+	%tmp883.upgrd.1 = bitcast <4 x i32> %tmp883 to <4 x float>		; <<4 x float>> [#uses=1]
+	%tmp885 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x i32>> [#uses=1]
+	%tmp885.upgrd.2 = bitcast <4 x i32> %tmp885 to <4 x float>		; <<4 x float>> [#uses=1]
 	br label %cond_next905
-
 cond_true31:		; preds = %entry
 	ret void
-
 cond_next54:		; preds = %entry
-	br bool %tmp9, label %cond_false385, label %bb279
-
+	br i1 %tmp9, label %cond_false385, label %bb279
 bb279:		; preds = %cond_next54
 	ret void
-
 cond_false385:		; preds = %cond_next54
-	%tmp388 = seteq uint 0, 0		; <bool> [#uses=1]
-	br bool %tmp388, label %cond_next463, label %cond_true389
-
+	%tmp388 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp388, label %cond_next463, label %cond_true389
 cond_true389:		; preds = %cond_false385
 	ret void
-
 cond_next463:		; preds = %cond_false385
-	%tmp1208107 = setgt sbyte* null, %stack		; <bool> [#uses=1]
-	br bool %tmp1208107, label %cond_true1209.preheader, label %bb1212
-
+	%tmp1208107 = icmp ugt i8* null, %stack		; <i1> [#uses=1]
+	br i1 %tmp1208107, label %cond_true1209.preheader, label %bb1212
 cond_true498:		; preds = %cond_true1209.preheader
 	ret void
-
 cond_true519:		; preds = %cond_true1209.preheader
-	%bothcond = or bool false, false		; <bool> [#uses=1]
-	br bool %bothcond, label %bb855, label %bb980
-
+	%bothcond = or i1 false, false		; <i1> [#uses=1]
+	br i1 %bothcond, label %bb855, label %bb980
 cond_false548:		; preds = %cond_true1209.preheader
 	ret void
-
 bb855:		; preds = %cond_true519
-	%tmp859 = seteq int 0, 0		; <bool> [#uses=1]
-	br bool %tmp859, label %cond_true860, label %cond_next905
-
+	%tmp859 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp859, label %cond_true860, label %cond_next905
 cond_next905:		; preds = %bb855, %cond_true860
-	%vfpw2.4 = phi <4 x float> [ %tmp885, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
-	%vfpw1.4 = phi <4 x float> [ %tmp883, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
-	%tmp930 = cast <4 x float> zeroinitializer to <4 x int>		; <<4 x int>> [#uses=0]
+	%vfpw2.4 = phi <4 x float> [ %tmp885.upgrd.2, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
+	%vfpw1.4 = phi <4 x float> [ %tmp883.upgrd.1, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
+	%tmp930 = bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>> [#uses=0]
 	ret void
-
 bb980:		; preds = %cond_true519
 	ret void
-
 cond_true1209.preheader:		; preds = %cond_next463
-	%tmp496 = and uint 0, 12288		; <uint> [#uses=1]
-	switch uint %tmp496, label %cond_false548 [
-		 uint 0, label %cond_true498
-		 uint 4096, label %cond_true519
+	%tmp496 = and i32 0, 12288		; <i32> [#uses=1]
+	switch i32 %tmp496, label %cond_false548 [
+		 i32 0, label %cond_true498
+		 i32 4096, label %cond_true519
 	]
-
 bb1212:		; preds = %cond_next463
 	ret void
 }
 
-declare <4 x float> %llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)
+declare <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)
diff --git a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
index 6c34cd7861a..e1033c3f808 100644
--- a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
+++ b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll
@@ -1,60 +1,55 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
+; END.
 
-	%struct.attr_desc = type { sbyte*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, uint }
-	%struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, int, int }
-	%struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, int, int, int, int, int }
+	%struct.attr_desc = type { i8*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, i32 }
+	%struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, i32, i32 }
+	%struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
 	%struct.insn_ent = type { %struct.insn_ent*, %struct.insn_def* }
-	%struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u }
-	%struct.u = type { [1 x long] }
+	%struct.rtx_def = type { i16, i8, i8, %struct.u }
+	%struct.u = type { [1 x i64] }
 
-implementation   ; Functions:
-
-void %find_attr() {
+define void @find_attr() {
 entry:
-	%tmp26 = seteq %struct.attr_desc* null, null		; <bool> [#uses=1]
-	br bool %tmp26, label %bb30, label %cond_true27
-
+	%tmp26 = icmp eq %struct.attr_desc* null, null		; <i1> [#uses=1]
+	br i1 %tmp26, label %bb30, label %cond_true27
 cond_true27:		; preds = %entry
 	ret void
-
 bb30:		; preds = %entry
-	%tmp67 = seteq %struct.attr_desc* null, null		; <bool> [#uses=1]
-	br bool %tmp67, label %cond_next92, label %cond_true68
-
+	%tmp67 = icmp eq %struct.attr_desc* null, null		; <i1> [#uses=1]
+	br i1 %tmp67, label %cond_next92, label %cond_true68
 cond_true68:		; preds = %bb30
 	ret void
-
 cond_next92:		; preds = %bb30
-	%tmp173 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=2]
-	%tmp174 = load uint* %tmp173		; <uint> [#uses=1]
-	%tmp177 = and uint %tmp174, 4294967287		; <uint> [#uses=1]
-	store uint %tmp177, uint* %tmp173
-	%tmp180 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=1]
-	%tmp181 = load uint* %tmp180		; <uint> [#uses=1]
-	%tmp185 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=2]
-	%tmp186 = load uint* %tmp185		; <uint> [#uses=1]
-	%tmp183187 = shl uint %tmp181, ubyte 1		; <uint> [#uses=1]
-	%tmp188 = and uint %tmp183187, 16		; <uint> [#uses=1]
-	%tmp190 = and uint %tmp186, 4294967279		; <uint> [#uses=1]
-	%tmp191 = or uint %tmp190, %tmp188		; <uint> [#uses=1]
-	store uint %tmp191, uint* %tmp185
-	%tmp193 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=1]
-	%tmp194 = load uint* %tmp193		; <uint> [#uses=1]
-	%tmp198 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=2]
-	%tmp199 = load uint* %tmp198		; <uint> [#uses=1]
-	%tmp196200 = shl uint %tmp194, ubyte 2		; <uint> [#uses=1]
-	%tmp201 = and uint %tmp196200, 64		; <uint> [#uses=1]
-	%tmp203 = and uint %tmp199, 4294967231		; <uint> [#uses=1]
-	%tmp204 = or uint %tmp203, %tmp201		; <uint> [#uses=1]
-	store uint %tmp204, uint* %tmp198
-	%tmp206 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=1]
-	%tmp207 = load uint* %tmp206		; <uint> [#uses=1]
-	%tmp211 = getelementptr %struct.attr_desc* null, int 0, uint 4		; <uint*> [#uses=2]
-	%tmp212 = load uint* %tmp211		; <uint> [#uses=1]
-	%tmp209213 = shl uint %tmp207, ubyte 1		; <uint> [#uses=1]
-	%tmp214 = and uint %tmp209213, 128		; <uint> [#uses=1]
-	%tmp216 = and uint %tmp212, 4294967167		; <uint> [#uses=1]
-	%tmp217 = or uint %tmp216, %tmp214		; <uint> [#uses=1]
-	store uint %tmp217, uint* %tmp211
+	%tmp173 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=2]
+	%tmp174 = load i32* %tmp173		; <i32> [#uses=1]
+	%tmp177 = and i32 %tmp174, -9		; <i32> [#uses=1]
+	store i32 %tmp177, i32* %tmp173
+	%tmp180 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=1]
+	%tmp181 = load i32* %tmp180		; <i32> [#uses=1]
+	%tmp185 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=2]
+	%tmp186 = load i32* %tmp185		; <i32> [#uses=1]
+	%tmp183187 = shl i32 %tmp181, 1		; <i32> [#uses=1]
+	%tmp188 = and i32 %tmp183187, 16		; <i32> [#uses=1]
+	%tmp190 = and i32 %tmp186, -17		; <i32> [#uses=1]
+	%tmp191 = or i32 %tmp190, %tmp188		; <i32> [#uses=1]
+	store i32 %tmp191, i32* %tmp185
+	%tmp193 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=1]
+	%tmp194 = load i32* %tmp193		; <i32> [#uses=1]
+	%tmp198 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=2]
+	%tmp199 = load i32* %tmp198		; <i32> [#uses=1]
+	%tmp196200 = shl i32 %tmp194, 2		; <i32> [#uses=1]
+	%tmp201 = and i32 %tmp196200, 64		; <i32> [#uses=1]
+	%tmp203 = and i32 %tmp199, -65		; <i32> [#uses=1]
+	%tmp204 = or i32 %tmp203, %tmp201		; <i32> [#uses=1]
+	store i32 %tmp204, i32* %tmp198
+	%tmp206 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=1]
+	%tmp207 = load i32* %tmp206		; <i32> [#uses=1]
+	%tmp211 = getelementptr %struct.attr_desc* null, i32 0, i32 4		; <i32*> [#uses=2]
+	%tmp212 = load i32* %tmp211		; <i32> [#uses=1]
+	%tmp209213 = shl i32 %tmp207, 1		; <i32> [#uses=1]
+	%tmp214 = and i32 %tmp209213, 128		; <i32> [#uses=1]
+	%tmp216 = and i32 %tmp212, -129		; <i32> [#uses=1]
+	%tmp217 = or i32 %tmp216, %tmp214		; <i32> [#uses=1]
+	store i32 %tmp217, i32* %tmp211
 	ret void
 }
diff --git a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll
index 8423bf25527..33807ca012b 100644
--- a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll
+++ b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll
@@ -1,16 +1,17 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc64-apple-darwin | grep extsw | count 2
+; RUN: llvm-as < %s | llc -mtriple=powerpc64-apple-darwin | grep extsw | count 2
 
-%lens = external global ubyte*
-%vals = external global int*
+@lens = external global i8*             ; <i8**> [#uses=1]
+@vals = external global i32*            ; <i32**> [#uses=1]
 
-int %test(int %i) {
-	%tmp = load ubyte** %lens
-	%tmp1 = getelementptr ubyte* %tmp, int %i
-	%tmp = load ubyte* %tmp1
-	%tmp2 = cast ubyte %tmp to int
-	%tmp3 = load int** %vals
-	%tmp5 = sub int 1, %tmp2
-	%tmp6 = getelementptr int* %tmp3, int %tmp5
-	%tmp7 = load int* %tmp6
-	ret int %tmp7
+define i32 @test(i32 %i) {
+        %tmp = load i8** @lens          ; <i8*> [#uses=1]
+        %tmp1 = getelementptr i8* %tmp, i32 %i          ; <i8*> [#uses=1]
+        %tmp.upgrd.1 = load i8* %tmp1           ; <i8> [#uses=1]
+        %tmp2 = zext i8 %tmp.upgrd.1 to i32             ; <i32> [#uses=1]
+        %tmp3 = load i32** @vals                ; <i32*> [#uses=1]
+        %tmp5 = sub i32 1, %tmp2                ; <i32> [#uses=1]
+        %tmp6 = getelementptr i32* %tmp3, i32 %tmp5             ; <i32*> [#uses=1]
+        %tmp7 = load i32* %tmp6         ; <i32> [#uses=1]
+        ret i32 %tmp7
 }
+
diff --git a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
index d71ba5a3822..c25cf215bc3 100644
--- a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
+++ b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll
@@ -1,10 +1,11 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
+; RUN: llvm-as < %s | llc -march=ppc32
 
-void %img2buf(int %symbol_size_in_bytes, ushort* %ui16) {
-	%tmp93 = load ushort* null		; <ushort> [#uses=1]
-	%tmp99 = call ushort %llvm.bswap.i16( ushort %tmp93 )		; <ushort> [#uses=1]
-	store ushort %tmp99, ushort* %ui16
-	ret void
+define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) {
+        %tmp93 = load i16* null         ; <i16> [#uses=1]
+        %tmp99 = call i16 @llvm.bswap.i16( i16 %tmp93 )         ; <i16> [#uses=1]
+        store i16 %tmp99, i16* %ui16
+        ret void
 }
 
-declare ushort %llvm.bswap.i16(ushort)
+declare i16 @llvm.bswap.i16(i16)
+
diff --git a/test/CodeGen/PowerPC/2006-08-11-RetVector.ll b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
index cf0cd2c8be3..1043e45efb1 100644
--- a/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
+++ b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll
@@ -1,8 +1,8 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vsldoi
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vor
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep vsldoi
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep vor
 
-<4 x float> %func(<4 x float> %fp0, <4 x float> %fp1) {
-        %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x uint> < uint 0, uint 1, uint 2, uint 7 >                ; <<4 x float>> [#uses=1]
+define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) {
+        %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >     ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp76
 }
 
diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll
index 287a79d29a9..aff4edeba54 100644
--- a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll
+++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll
@@ -1,38 +1,30 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc
+; RUN: llvm-as < %s | llc
 
-	%struct..0anon = type { int }
-	%struct.rtx_def = type { ushort, ubyte, ubyte, [1 x %struct..0anon] }
+	%struct..0anon = type { i32 }
+	%struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
 
-implementation   ; Functions:
-
-fastcc void %immed_double_const(int %i0, int %i1) {
+define fastcc void @immed_double_const(i32 %i0, i32 %i1) {
 entry:
-	%tmp1 = load uint* null		; <uint> [#uses=1]
-	switch uint %tmp1, label %bb103 [
-		 uint 1, label %bb
-		 uint 3, label %bb
+	%tmp1 = load i32* null		; <i32> [#uses=1]
+	switch i32 %tmp1, label %bb103 [
+		 i32 1, label %bb
+		 i32 3, label %bb
 	]
-
 bb:		; preds = %entry, %entry
-	%tmp14 = setgt int 0, 31		; <bool> [#uses=1]
-	br bool %tmp14, label %cond_next77, label %cond_next17
-
+	%tmp14 = icmp sgt i32 0, 31		; <i1> [#uses=1]
+	br i1 %tmp14, label %cond_next77, label %cond_next17
 cond_next17:		; preds = %bb
 	ret void
-
 cond_next77:		; preds = %bb
-	%tmp79.not = setne int %i1, 0		; <bool> [#uses=1]
-	%tmp84 = setlt int %i0, 0		; <bool> [#uses=2]
-	%bothcond1 = or bool %tmp79.not, %tmp84		; <bool> [#uses=1]
-	br bool %bothcond1, label %bb88, label %bb99
-
+	%tmp79.not = icmp ne i32 %i1, 0		; <i1> [#uses=1]
+	%tmp84 = icmp slt i32 %i0, 0		; <i1> [#uses=2]
+	%bothcond1 = or i1 %tmp79.not, %tmp84		; <i1> [#uses=1]
+	br i1 %bothcond1, label %bb88, label %bb99
 bb88:		; preds = %cond_next77
-	%bothcond2 = and bool false, %tmp84		; <bool> [#uses=0]
+	%bothcond2 = and i1 false, %tmp84		; <i1> [#uses=0]
 	ret void
-
 bb99:		; preds = %cond_next77
 	ret void
-
 bb103:		; preds = %entry
 	ret void
 }
diff --git a/test/CodeGen/PowerPC/2006-09-28-shift_64.ll b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll
index 58d1f265f67..5210dd1cb1a 100644
--- a/test/CodeGen/PowerPC/2006-09-28-shift_64.ll
+++ b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll
@@ -1,27 +1,25 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64
-target endian = big
-target pointersize = 64
-target triple = "powerpc64-apple-darwin8"
+; RUN: llvm-as < %s | llc -march=ppc64
 
-implementation   ; Functions:
+target datalayout = "E-p:64:64"
+target triple = "powerpc64-apple-darwin8"
 
-void %glArrayElement_CompExec() {
+define void @glArrayElement_CompExec() {
 entry:
-	%tmp3 = and ulong 0, 18446744073701163007		; <ulong> [#uses=1]
-	br label %cond_true24
-
-cond_false:		; preds = %cond_true24
-	ret void
-
-cond_true24:		; preds = %cond_true24, %entry
-	%indvar.ph = phi uint [ 0, %entry ], [ %indvar.next, %cond_true24 ]		; <uint> [#uses=1]
-	%indvar = add uint 0, %indvar.ph		; <uint> [#uses=2]
-	%code.0 = cast uint %indvar to ubyte		; <ubyte> [#uses=1]
-	%tmp5 = add ubyte %code.0, 16		; <ubyte> [#uses=1]
-	%tmp7 = shr ulong %tmp3, ubyte %tmp5		; <ulong> [#uses=1]
-	%tmp7 = cast ulong %tmp7 to int		; <int> [#uses=1]
-	%tmp8 = and int %tmp7, 1		; <int> [#uses=1]
-	%tmp8 = seteq int %tmp8, 0		; <bool> [#uses=1]
-	%indvar.next = add uint %indvar, 1		; <uint> [#uses=1]
-	br bool %tmp8, label %cond_false, label %cond_true24
+        %tmp3 = and i64 0, -8388609             ; <i64> [#uses=1]
+        br label %cond_true24
+cond_false:             ; preds = %cond_true24
+        ret void
+cond_true24:            ; preds = %cond_true24, %entry
+        %indvar.ph = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true24 ]              ; <i32> [#uses=1]
+        %indvar = add i32 0, %indvar.ph         ; <i32> [#uses=2]
+        %code.0 = trunc i32 %indvar to i8               ; <i8> [#uses=1]
+        %tmp5 = add i8 %code.0, 16              ; <i8> [#uses=1]
+        %shift.upgrd.1 = zext i8 %tmp5 to i64           ; <i64> [#uses=1]
+        %tmp7 = lshr i64 %tmp3, %shift.upgrd.1          ; <i64> [#uses=1]
+        %tmp7.upgrd.2 = trunc i64 %tmp7 to i32          ; <i32> [#uses=1]
+        %tmp8 = and i32 %tmp7.upgrd.2, 1                ; <i32> [#uses=1]
+        %tmp8.upgrd.3 = icmp eq i32 %tmp8, 0            ; <i1> [#uses=1]
+        %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=1]
+        br i1 %tmp8.upgrd.3, label %cond_false, label %cond_true24
 }
+
diff --git a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
index 992e52aa81f..a58cd162b4e 100644
--- a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
+++ b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll
@@ -1,26 +1,24 @@
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -combiner-alias-analysis | grep f5
 
-target endian = big
-target pointersize = 32
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.2.0"
-	%struct.Point = type { double, double, double }
+        %struct.Point = type { double, double, double }
 
-implementation   ; Functions:
-
-void %offset(%struct.Point* %pt, double %x, double %y, double %z) {
+define void @offset(%struct.Point* %pt, double %x, double %y, double %z) {
 entry:
-	%tmp = getelementptr %struct.Point* %pt, int 0, uint 0		; <double*> [#uses=2]
-	%tmp = load double* %tmp		; <double> [#uses=1]
-	%tmp2 = add double %tmp, %x		; <double> [#uses=1]
-	store double %tmp2, double* %tmp
-	%tmp6 = getelementptr %struct.Point* %pt, int 0, uint 1		; <double*> [#uses=2]
-	%tmp7 = load double* %tmp6		; <double> [#uses=1]
-	%tmp9 = add double %tmp7, %y		; <double> [#uses=1]
-	store double %tmp9, double* %tmp6
-	%tmp13 = getelementptr %struct.Point* %pt, int 0, uint 2		; <double*> [#uses=2]
-	%tmp14 = load double* %tmp13		; <double> [#uses=1]
-	%tmp16 = add double %tmp14, %z		; <double> [#uses=1]
-	store double %tmp16, double* %tmp13
-	ret void
+        %tmp = getelementptr %struct.Point* %pt, i32 0, i32 0           ; <double*> [#uses=2]
+        %tmp.upgrd.1 = load double* %tmp                ; <double> [#uses=1]
+        %tmp2 = add double %tmp.upgrd.1, %x             ; <double> [#uses=1]
+        store double %tmp2, double* %tmp
+        %tmp6 = getelementptr %struct.Point* %pt, i32 0, i32 1          ; <double*> [#uses=2]
+        %tmp7 = load double* %tmp6              ; <double> [#uses=1]
+        %tmp9 = add double %tmp7, %y            ; <double> [#uses=1]
+        store double %tmp9, double* %tmp6
+        %tmp13 = getelementptr %struct.Point* %pt, i32 0, i32 2         ; <double*> [#uses=2]
+        %tmp14 = load double* %tmp13            ; <double> [#uses=1]
+        %tmp16 = add double %tmp14, %z          ; <double> [#uses=1]
+        store double %tmp16, double* %tmp13
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
index 95b5312e4c2..6621cec7f43 100644
--- a/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
+++ b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll
@@ -1,18 +1,16 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep IMPLICIT_DEF
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep IMPLICIT_DEF
 
-void %foo(long %X) {
+define void @foo(i64 %X) {
 entry:
-        %tmp1 = and long %X, 3          ; <long> [#uses=1]
-        %tmp = setgt long %tmp1, 2              ; <bool> [#uses=1]
-        br bool %tmp, label %UnifiedReturnBlock, label %cond_true
-
+        %tmp1 = and i64 %X, 3           ; <i64> [#uses=1]
+        %tmp = icmp sgt i64 %tmp1, 2            ; <i1> [#uses=1]
+        br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
 cond_true:              ; preds = %entry
-        %tmp = tail call int (...)* %bar( )             ; <int> [#uses=0]
+        %tmp.upgrd.1 = tail call i32 (...)* @bar( )             ; <i32> [#uses=0]
         ret void
-
 UnifiedReturnBlock:             ; preds = %entry
         ret void
 }
 
-declare int %bar(...)
+declare i32 @bar(...)
 
diff --git a/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
index 397ada76c63..313568c1e4b 100644
--- a/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
+++ b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
@@ -1,24 +1,20 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep xor 
+; RUN: llvm-as < %s | llc -march=ppc32 | grep xor 
 
-target endian = big
-target pointersize = 32
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.7.0"
 
-implementation   ; Functions:
-
-void %foo(int %X) {
+define void @foo(i32 %X) {
 entry:
-	%tmp1 = and int %X, 3		; <int> [#uses=1]
-	%tmp2 = xor int %tmp1, 1
-	%tmp = seteq int %tmp2, 0		; <bool> [#uses=1]
-	br bool %tmp, label %UnifiedReturnBlock, label %cond_true
-
-cond_true:		; preds = %entry
-	tail call int (...)* %bar( )		; <int> [#uses=0]
-	ret void
-
-UnifiedReturnBlock:		; preds = %entry
-	ret void
+        %tmp1 = and i32 %X, 3           ; <i32> [#uses=1]
+        %tmp2 = xor i32 %tmp1, 1                ; <i32> [#uses=1]
+        %tmp = icmp eq i32 %tmp2, 0             ; <i1> [#uses=1]
+        br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
+cond_true:              ; preds = %entry
+        tail call i32 (...)* @bar( )            ; <i32>:0 [#uses=0]
+        ret void
+UnifiedReturnBlock:             ; preds = %entry
+        ret void
 }
 
-declare int %bar(...)
+declare i32 @bar(...)
+
diff --git a/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
index c981c269dc3..6dc1ff037eb 100644
--- a/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
+++ b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll
@@ -1,6 +1,7 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64
+; RUN: llvm-as < %s | llc -march=ppc64
 
-int * %foo(uint %n) {
-	%A = alloca int, uint %n
-	ret int* %A
+define i32* @foo(i32 %n) {
+        %A = alloca i32, i32 %n         ; <i32*> [#uses=1]
+        ret i32* %A
 }
+
diff --git a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
index a5476eb3b50..80ef479fb07 100644
--- a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
+++ b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
@@ -1,14 +1,13 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi
+; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwimi
 
-void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) {
-        %X = shl short %div.0.i.i.i.i, ubyte 1          ; <short> [#uses=1]
-        %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1              ; <int> [#uses=2]
-        %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i             ; <bool> [#uses=2]
-
-        %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short              ; <short> [#uses=1]
-        %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X          ; <short> [#uses=1]
-        %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1               ; <short> [#uses=1]
-        store short %div.0.be.i.i.i.i, short* %P
+define void @test(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, i16* %P) {
+        %X = shl i16 %div.0.i.i.i.i, 1          ; <i16> [#uses=1]
+        %tmp28.i.i.i.i = shl i32 %L_num.0.i.i.i.i, 1            ; <i32> [#uses=1]
+        %tmp31.i.i.i.i = icmp slt i32 %tmp28.i.i.i.i, %tmp1.i.i206.i.i          ; <i1> [#uses=1]
+        %tmp31.i.i.i.i.upgrd.1 = zext i1 %tmp31.i.i.i.i to i16          ; <i16> [#uses=1]
+        %tmp371.i.i.i.i1 = or i16 %tmp31.i.i.i.i.upgrd.1, %X            ; <i16> [#uses=1]
+        %div.0.be.i.i.i.i = xor i16 %tmp371.i.i.i.i1, 1         ; <i16> [#uses=1]
+        store i16 %div.0.be.i.i.i.i, i16* %P
         ret void
 }
 
diff --git a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
index 0411eb59306..7680c215c21 100644
--- a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
+++ b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
@@ -1,10 +1,10 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5
 
-void %glgRunProcessor15() {
-	%tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x uint> < uint 0, uint 1, uint 2, uint 7 >		; <<4 x float>> [#uses=1]
-	%tmp3030030304.i = cast <4 x float> %tmp26355.i to <8 x short>		; <<8 x short>> [#uses=1]
-	%tmp30305.i = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp3030030304.i, <8 x uint> < uint 1, uint 3, uint 5, uint 7, uint 9, uint 11, uint 13, uint 15 >		; <<8 x short>> [#uses=1]
-	%tmp30305.i = cast <8 x short> %tmp30305.i to <4 x int>		; <<4 x int>> [#uses=1]
-	store <4 x int> %tmp30305.i, <4 x int>* null
-	ret void
+define void @glgRunProcessor15() {
+        %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >; <<4 x float>> [#uses=1]
+        %tmp3030030304.i = bitcast <4 x float> %tmp26355.i to <8 x i16>         ; <<8 x i16>> [#uses=1]
+        %tmp30305.i = shufflevector <8 x i16> zeroinitializer, <8 x i16> %tmp3030030304.i, <8 x i32> < i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15 >               ; <<8 x i16>> [#uses=1]
+        %tmp30305.i.upgrd.1 = bitcast <8 x i16> %tmp30305.i to <4 x i32>                ; <<4 x i32>> [#uses=1]
+        store <4 x i32> %tmp30305.i.upgrd.1, <4 x i32>* null
+        ret void
 }
diff --git a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
index f6103e5b6aa..be3b86308f1 100644
--- a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
+++ b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll
@@ -1,26 +1,24 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
-; RUN: llvm-upgrade < %s | llvm-as | llc 
+; RUN: llvm-as < %s | llc -march=ppc64
+; RUN: llvm-as < %s | llc -march=ppc32
+; RUN: llvm-as < %s | llc 
 
-void %bitap() {
+define void @bitap() {
 entry:
-	%RMask.i = alloca [256 x uint], align 16		; <[256 x uint]*> [#uses=1]
-	%buffer = alloca [147456 x sbyte], align 16		; <[147456 x sbyte]*> [#uses=0]
-	br bool false, label %bb19, label %bb.preheader
-
-bb.preheader:		; preds = %entry
-	ret void
-
-bb19:		; preds = %entry
-	br bool false, label %bb12.i, label %cond_next39
-
-bb12.i:		; preds = %bb12.i, %bb19
-	%i.0.i = phi uint [ %tmp11.i, %bb12.i ], [ 0, %bb19 ]		; <uint> [#uses=2]
-	%tmp9.i = getelementptr [256 x uint]* %RMask.i, int 0, uint %i.0.i		; <uint*> [#uses=1]
-	store uint 0, uint* %tmp9.i
-	%tmp11.i = add uint %i.0.i, 1		; <uint> [#uses=1]
-	br label %bb12.i
-
-cond_next39:		; preds = %bb19
-	ret void
+        %RMask.i = alloca [256 x i32], align 16         ; <[256 x i32]*> [#uses=1]
+        %buffer = alloca [147456 x i8], align 16                ; <[147456 x i8]*> [#uses=0]
+        br i1 false, label %bb19, label %bb.preheader
+bb.preheader:           ; preds = %entry
+        ret void
+bb19:           ; preds = %entry
+        br i1 false, label %bb12.i, label %cond_next39
+bb12.i:         ; preds = %bb12.i, %bb19
+        %i.0.i = phi i32 [ %tmp11.i, %bb12.i ], [ 0, %bb19 ]            ; <i32> [#uses=2]
+        %gep.upgrd.1 = zext i32 %i.0.i to i64           ; <i64> [#uses=1]
+        %tmp9.i = getelementptr [256 x i32]* %RMask.i, i32 0, i64 %gep.upgrd.1          ; <i32*> [#uses=1]
+        store i32 0, i32* %tmp9.i
+        %tmp11.i = add i32 %i.0.i, 1            ; <i32> [#uses=1]
+        br label %bb12.i
+cond_next39:            ; preds = %bb19
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
index 6fa410e6fa5..058166ff93d 100644
--- a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
+++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll
@@ -1,27 +1,22 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32
-; RUN: llvm-upgrade < %s | llvm-as | llc
+; RUN: llvm-as < %s | llc -march=ppc64
+; RUN: llvm-as < %s | llc -march=ppc32
+; RUN: llvm-as < %s | llc
 
-%qsz.b = external global bool		; <bool*> [#uses=1]
+@qsz.b = external global i1             ; <i1*> [#uses=1]
 
-implementation   ; Functions:
-
-fastcc void %qst() {
+define fastcc void @qst() {
 entry:
-	br bool true, label %cond_next71, label %cond_true
-
-cond_true:		; preds = %entry
-	ret void
-
-cond_next71:		; preds = %entry
-	%tmp73.b = load bool* %qsz.b		; <bool> [#uses=1]
-	%ii.4.ph = select bool %tmp73.b, ulong 4, ulong 0		; <ulong> [#uses=1]
-	br label %bb139
-
-bb82:		; preds = %bb139
-	ret void
-
-bb139:		; preds = %bb139, %cond_next71
-	%exitcond89 = seteq ulong 0, %ii.4.ph		; <bool> [#uses=1]
-	br bool %exitcond89, label %bb82, label %bb139
+        br i1 true, label %cond_next71, label %cond_true
+cond_true:              ; preds = %entry
+        ret void
+cond_next71:            ; preds = %entry
+        %tmp73.b = load i1* @qsz.b              ; <i1> [#uses=1]
+        %ii.4.ph = select i1 %tmp73.b, i64 4, i64 0             ; <i64> [#uses=1]
+        br label %bb139
+bb82:           ; preds = %bb139
+        ret void
+bb139:          ; preds = %bb139, %cond_next71
+        %exitcond89 = icmp eq i64 0, %ii.4.ph           ; <i1> [#uses=1]
+        br i1 %exitcond89, label %bb82, label %bb139
 }
+
diff --git a/test/CodeGen/PowerPC/Frames-large.ll b/test/CodeGen/PowerPC/Frames-large.ll
index 1f58fe087d3..0a15d2233e7 100644
--- a/test/CodeGen/PowerPC/Frames-large.ll
+++ b/test/CodeGen/PowerPC/Frames-large.ll
@@ -1,79 +1,77 @@
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   not grep {stw r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | grep {lis r0, -1}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {ori r0, r0, 32704}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {stwux r1, r1, r0}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {lwz r1, 0(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   not grep {lwz r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {stw r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {lis r0, -1}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {ori r0, r0, 32704}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {stwux r1, r1, r0}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {lwz r1, 0(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {lwz r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   not grep {std r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {lis r0, -1}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {ori r0, r0, 32656}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {stdux r1, r1, r0}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   grep {ld r1, 0(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 | \
 ; RUN:   not grep {ld r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {std r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {lis r0, -1}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {ori r0, r0, 32656}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {stdux r1, r1, r0}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {ld r1, 0(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim | \
 ; RUN:   grep {ld r31, 40(r1)}
 
-
-implementation
-
-int* %f1() {
-	%tmp = alloca int, uint 8191
-	ret int* %tmp
+define i32* @f1() {
+        %tmp = alloca i32, i32 8191             ; <i32*> [#uses=1]
+        ret i32* %tmp
 }
+
diff --git a/test/CodeGen/PowerPC/Frames-leaf.ll b/test/CodeGen/PowerPC/Frames-leaf.ll
index 9de1bde92b8..11b64703ebd 100644
--- a/test/CodeGen/PowerPC/Frames-leaf.ll
+++ b/test/CodeGen/PowerPC/Frames-leaf.ll
@@ -1,40 +1,37 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   not grep {stw r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   not grep {stwu r1, -.*(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   not grep {addi r1, r1, }
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   not grep {lwz r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc32 -disable-fp-elim | \
 ; RUN:   not grep {stw r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc32 -disable-fp-elim | \
 ; RUN:   not grep {stwu r1, -.*(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc32 -disable-fp-elim | \
 ; RUN:   not grep {addi r1, r1, }
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc32 -disable-fp-elim | \
 ; RUN:   not grep {lwz r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \
+; RUN: llvm-as < %s | llc -march=ppc64 | \
 ; RUN:   not grep {std r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \
+; RUN: llvm-as < %s | llc -march=ppc64 | \
 ; RUN:   not grep {stdu r1, -.*(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \
+; RUN: llvm-as < %s | llc -march=ppc64 | \
 ; RUN:   not grep {addi r1, r1, }
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \
+; RUN: llvm-as < %s | llc -march=ppc64 | \
 ; RUN:   not grep {ld r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc64 -disable-fp-elim | \
 ; RUN:   not grep {stw r31, 40(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc64 -disable-fp-elim | \
 ; RUN:   not grep {stdu r1, -.*(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc64 -disable-fp-elim | \
 ; RUN:   not grep {addi r1, r1, }
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 -disable-fp-elim | \
+; RUN: llvm-as < %s | llc -march=ppc64 -disable-fp-elim | \
 ; RUN:   not grep {ld r31, 40(r1)}
 
-
-implementation
-
-int* %f1() {
-	%tmp = alloca int, uint 2
-	ret int* %tmp
+define i32* @f1() {
+        %tmp = alloca i32, i32 2                ; <i32*> [#uses=1]
+        ret i32* %tmp
 }
diff --git a/test/CodeGen/PowerPC/Frames-small.ll b/test/CodeGen/PowerPC/Frames-small.ll
index 549083ae9bb..4ea3afba883 100644
--- a/test/CodeGen/PowerPC/Frames-small.ll
+++ b/test/CodeGen/PowerPC/Frames-small.ll
@@ -1,24 +1,24 @@
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 -f
 ; RUN  not grep {stw r31, 20(r1)} %t1
 ; RUN: grep {stwu r1, -16448(r1)} %t1
 ; RUN: grep {addi r1, r1, 16448} %t1
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN: not grep {lwz r31, 20(r1)}
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
 ; RUN:   -o %t2 -f
 ; RUN: grep {stw r31, 20(r1)} %t2
 ; RUN: grep {stwu r1, -16448(r1)} %t2
 ; RUN: grep {addi r1, r1, 16448} %t2
 ; RUN: grep {lwz r31, 20(r1)} %t2
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 -f
 ; RUN: not grep {std r31, 40(r1)} %t3
 ; RUN: grep {stdu r1, -16496(r1)} %t3
 ; RUN: grep {addi r1, r1, 16496} %t3
 ; RUN: not grep {ld r31, 40(r1)} %t3
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
 ; RUN:   -o %t4 -f
 ; RUN: grep {std r31, 40(r1)} %t4
@@ -26,9 +26,8 @@
 ; RUN: grep {addi r1, r1, 16496} %t4
 ; RUN: grep {ld r31, 40(r1)} %t4
 
-implementation
-
-int* %f1() {
-	%tmp = alloca int, uint 4095
-	ret int* %tmp
+define i32* @f1() {
+        %tmp = alloca i32, i32 4095             ; <i32*> [#uses=1]
+        ret i32* %tmp
 }
+
diff --git a/test/CodeGen/PowerPC/addc.ll b/test/CodeGen/PowerPC/addc.ll
index 7bbd1eb039a..406053bee27 100644
--- a/test/CodeGen/PowerPC/addc.ll
+++ b/test/CodeGen/PowerPC/addc.ll
@@ -1,27 +1,26 @@
 ; All of these should be codegen'd without loading immediates
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
 ; RUN: grep addc %t | count 1
 ; RUN: grep adde %t | count 1
 ; RUN: grep addze %t | count 1
 ; RUN: grep addme %t | count 1
 ; RUN: grep addic %t | count 2
 
-implementation   ; Functions:
-
-long %add_ll(long %a, long %b) {
+define i64 @add_ll(i64 %a, i64 %b) {
 entry:
-	%tmp.2 = add long %b, %a		; <long> [#uses=1]
-	ret long %tmp.2
+        %tmp.2 = add i64 %b, %a         ; <i64> [#uses=1]
+        ret i64 %tmp.2
 }
 
-long %add_l_5(long %a) {
+define i64 @add_l_5(i64 %a) {
 entry:
-	%tmp.1 = add long %a, 5		; <long> [#uses=1]
-	ret long %tmp.1
+        %tmp.1 = add i64 %a, 5          ; <i64> [#uses=1]
+        ret i64 %tmp.1
 }
 
-long %add_l_m5(long %a) {
+define i64 @add_l_m5(i64 %a) {
 entry:
-	%tmp.1 = add long %a, -5		; <long> [#uses=1]
-	ret long %tmp.1
+        %tmp.1 = add i64 %a, -5         ; <i64> [#uses=1]
+        ret i64 %tmp.1
 }
+
diff --git a/test/CodeGen/PowerPC/addi-reassoc.ll b/test/CodeGen/PowerPC/addi-reassoc.ll
index 753f628c11d..bee8660a8a9 100644
--- a/test/CodeGen/PowerPC/addi-reassoc.ll
+++ b/test/CodeGen/PowerPC/addi-reassoc.ll
@@ -1,20 +1,19 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep addi
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep addi
 
-        %struct.X = type { [5 x sbyte] }
-implementation   ; Functions:
+        %struct.X = type { [5 x i8] }
 
-int %test1([4 x int]* %P, int %i) {
-        %tmp.2 = add int %i, 2          ; <int> [#uses=1]
-        %tmp.4 = getelementptr [4 x int]* %P, int %tmp.2, int 1
-        %tmp.5 = load int* %tmp.4
-        ret int %tmp.5
+define i32 @test1([4 x i32]* %P, i32 %i) {
+        %tmp.2 = add i32 %i, 2          ; <i32> [#uses=1]
+        %tmp.4 = getelementptr [4 x i32]* %P, i32 %tmp.2, i32 1         ; <i32*> [#uses=1]
+        %tmp.5 = load i32* %tmp.4               ; <i32> [#uses=1]
+        ret i32 %tmp.5
 }
 
-int %test2(%struct.X* %P, int %i) {
-        %tmp.2 = add int %i, 2
-        %tmp.5 = getelementptr %struct.X* %P, int %tmp.2, uint 0, int 1
-        %tmp.6 = load sbyte* %tmp.5
-        %tmp.7 = cast sbyte %tmp.6 to int
-        ret int %tmp.7
+define i32 @test2(%struct.X* %P, i32 %i) {
+        %tmp.2 = add i32 %i, 2          ; <i32> [#uses=1]
+        %tmp.5 = getelementptr %struct.X* %P, i32 %tmp.2, i32 0, i32 1          ; <i8*> [#uses=1]
+        %tmp.6 = load i8* %tmp.5                ; <i8> [#uses=1]
+        %tmp.7 = sext i8 %tmp.6 to i32          ; <i32> [#uses=1]
+        ret i32 %tmp.7
 }
 
diff --git a/test/CodeGen/PowerPC/align.ll b/test/CodeGen/PowerPC/align.ll
index 9a448f95a41..7ffbe367670 100644
--- a/test/CodeGen/PowerPC/align.ll
+++ b/test/CodeGen/PowerPC/align.ll
@@ -1,12 +1,11 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep align.4 | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep align.2 | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep align.3 | count 1
 
-
-%A = global <4 x uint> < uint 10, uint 20, uint 30, uint 40 >
-%B = global float 1.000000e+02
-%C = global double 2.000000e+03
+@A = global <4 x i32> < i32 10, i32 20, i32 30, i32 40 >                ; <<4 x i32>*> [#uses=0]
+@B = global float 1.000000e+02          ; <float*> [#uses=0]
+@C = global double 2.000000e+03         ; <double*> [#uses=0]
 
diff --git a/test/CodeGen/PowerPC/and-branch.ll b/test/CodeGen/PowerPC/and-branch.ll
index 4b0e7fa86e6..f0bb5ea4015 100644
--- a/test/CodeGen/PowerPC/and-branch.ll
+++ b/test/CodeGen/PowerPC/and-branch.ll
@@ -1,18 +1,17 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mfcr
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep mfcr
 
-void %foo(int %X, int %Y, int %Z) {
+define void @foo(i32 %X, i32 %Y, i32 %Z) {
 entry:
-	%tmp = seteq int %X, 0		; <bool> [#uses=1]
-	%tmp3 = setlt int %Y, 5		; <bool> [#uses=1]
-	%tmp4 = and bool %tmp3, %tmp		; <bool> [#uses=1]
-	br bool %tmp4, label %cond_true, label %UnifiedReturnBlock
-
-cond_true:		; preds = %entry
-	%tmp5 = tail call int (...)* %bar( )		; <int> [#uses=0]
-	ret void
-
-UnifiedReturnBlock:		; preds = %entry
-	ret void
+        %tmp = icmp eq i32 %X, 0                ; <i1> [#uses=1]
+        %tmp3 = icmp slt i32 %Y, 5              ; <i1> [#uses=1]
+        %tmp4 = and i1 %tmp3, %tmp              ; <i1> [#uses=1]
+        br i1 %tmp4, label %cond_true, label %UnifiedReturnBlock
+cond_true:              ; preds = %entry
+        %tmp5 = tail call i32 (...)* @bar( )            ; <i32> [#uses=0]
+        ret void
+UnifiedReturnBlock:             ; preds = %entry
+        ret void
 }
 
-declare int %bar(...)
+declare i32 @bar(...)
+
diff --git a/test/CodeGen/PowerPC/and-imm.ll b/test/CodeGen/PowerPC/and-imm.ll
index b1d9fcbba16..9c806494be3 100644
--- a/test/CodeGen/PowerPC/and-imm.ll
+++ b/test/CodeGen/PowerPC/and-imm.ll
@@ -1,12 +1,14 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep {ori\\|lis}
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep {ori\\|lis}
 
-int %test(int %X) {
-	%Y = and int %X, 32769   ; andi. r3, r3, 32769
-	ret int %Y
+; andi. r3, r3, 32769	
+define i32 @test(i32 %X) {
+        %Y = and i32 %X, 32769          ; <i32> [#uses=1]
+        ret i32 %Y
 }
 
-int %test2(int %X) {
-	%Y = and int %X, -2147418112 ; andis. r3, r3, 32769
-	ret int %Y
+; andis. r3, r3, 32769
+define i32 @test2(i32 %X) {
+        %Y = and i32 %X, -2147418112            ; <i32> [#uses=1]
+        ret i32 %Y
 }
 
diff --git a/test/CodeGen/PowerPC/and_add.ll b/test/CodeGen/PowerPC/and_add.ll
index 1f6428a4300..f103e7c0df0 100644
--- a/test/CodeGen/PowerPC/and_add.ll
+++ b/test/CodeGen/PowerPC/and_add.ll
@@ -1,12 +1,15 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
 ; RUN: grep slwi %t
 ; RUN: not grep addi %t
 ; RUN: not grep rlwinm %t
 
-int %test(int %A) {
-  %B = mul int %A, 8  ;; shift
-  %C = add int %B, 7  ;; dead, no demanded bits.
-  %D = and int %C, -8 ;; dead once add is gone.
-  ret int %D
+define i32 @test(i32 %A) {
+        ;; shift
+        %B = mul i32 %A, 8              ; <i32> [#uses=1]
+        ;; dead, no demanded bits.
+        %C = add i32 %B, 7              ; <i32> [#uses=1]
+        ;; dead once add is gone.
+        %D = and i32 %C, -8             ; <i32> [#uses=1]
+        ret i32 %D
 }
 
diff --git a/test/CodeGen/PowerPC/and_sra.ll b/test/CodeGen/PowerPC/and_sra.ll
index abfa9f113ad..c780605c975 100644
--- a/test/CodeGen/PowerPC/and_sra.ll
+++ b/test/CodeGen/PowerPC/and_sra.ll
@@ -1,26 +1,27 @@
 ; Neither of these functions should contain algebraic right shifts
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi 
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep srawi 
 
-int %test1(uint %mode.0.i.0) {
-        %tmp.79 = cast uint %mode.0.i.0 to int        ; <sbyte> [#uses=1]
-        %tmp.80 = shr int %tmp.79, ubyte 15           ; <int> [#uses=1]
-        %tmp.81 = and int %tmp.80, 24             ; <int> [#uses=1]
-        ret int %tmp.81
+define i32 @test1(i32 %mode.0.i.0) {
+        %tmp.79 = bitcast i32 %mode.0.i.0 to i32                ; <i32> [#uses=1]
+        %tmp.80 = ashr i32 %tmp.79, 15          ; <i32> [#uses=1]
+        %tmp.81 = and i32 %tmp.80, 24           ; <i32> [#uses=1]
+        ret i32 %tmp.81
 }
 
-int %test2(uint %mode.0.i.0) {
-        %tmp.79 = cast uint %mode.0.i.0 to int        ; <sbyte> [#uses=1]
-        %tmp.80 = shr int %tmp.79, ubyte 15           ; <int> [#uses=1]
-        %tmp.81 = shr uint %mode.0.i.0, ubyte 16
-        %tmp.82 = cast uint %tmp.81 to int
-        %tmp.83 = and int %tmp.80, %tmp.82             ; <int> [#uses=1]
-        ret int %tmp.83
+define i32 @test2(i32 %mode.0.i.0) {
+        %tmp.79 = bitcast i32 %mode.0.i.0 to i32                ; <i32> [#uses=1]
+        %tmp.80 = ashr i32 %tmp.79, 15          ; <i32> [#uses=1]
+        %tmp.81 = lshr i32 %mode.0.i.0, 16              ; <i32> [#uses=1]
+        %tmp.82 = bitcast i32 %tmp.81 to i32            ; <i32> [#uses=1]
+        %tmp.83 = and i32 %tmp.80, %tmp.82              ; <i32> [#uses=1]
+        ret i32 %tmp.83
 }
 
-uint %test3(int %specbits.6.1) {
-        %tmp.2540 = shr int %specbits.6.1, ubyte 11             ; <int> [#uses=1]
-        %tmp.2541 = cast int %tmp.2540 to uint          ; <uint> [#uses=1]
-        %tmp.2542 = shl uint %tmp.2541, ubyte 13                ; <uint> [#uses=1]
-        %tmp.2543 = and uint %tmp.2542, 8192            ; <uint> [#uses=1]
-        ret uint %tmp.2543
+define i32 @test3(i32 %specbits.6.1) {
+        %tmp.2540 = ashr i32 %specbits.6.1, 11          ; <i32> [#uses=1]
+        %tmp.2541 = bitcast i32 %tmp.2540 to i32                ; <i32> [#uses=1]
+        %tmp.2542 = shl i32 %tmp.2541, 13               ; <i32> [#uses=1]
+        %tmp.2543 = and i32 %tmp.2542, 8192             ; <i32> [#uses=1]
+        ret i32 %tmp.2543
 }
+
diff --git a/test/CodeGen/PowerPC/branch-opt.ll b/test/CodeGen/PowerPC/branch-opt.ll
index dfa80c65f9c..4aa55a39e5d 100644
--- a/test/CodeGen/PowerPC/branch-opt.ll
+++ b/test/CodeGen/PowerPC/branch-opt.ll
@@ -1,93 +1,71 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {b LBB.*} | count 4
 
-target endian = big
-target pointersize = 32
+target datalayout = "E-p:32:32"
 target triple = "powerpc-apple-darwin8.7.0"
 
-implementation   ; Functions:
-
-void %foo(int %W, int %X, int %Y, int %Z) {
+define void @foo(i32 %W, i32 %X, i32 %Y, i32 %Z) {
 entry:
-	%X = cast int %X to uint		; <uint> [#uses=1]
-	%Y = cast int %Y to uint		; <uint> [#uses=1]
-	%Z = cast int %Z to uint		; <uint> [#uses=1]
-	%W = cast int %W to uint		; <uint> [#uses=1]
-	%tmp1 = and int %W, 1		; <int> [#uses=1]
-	%tmp1 = seteq int %tmp1, 0		; <bool> [#uses=1]
-	br bool %tmp1, label %cond_false, label %bb5
-
+	%tmp1 = and i32 %W, 1		; <i32> [#uses=1]
+	%tmp1.upgrd.1 = icmp eq i32 %tmp1, 0		; <i1> [#uses=1]
+	br i1 %tmp1.upgrd.1, label %cond_false, label %bb5
 bb:		; preds = %bb5, %bb
-	%indvar77 = phi uint [ %indvar.next78, %bb ], [ 0, %bb5 ]		; <uint> [#uses=1]
-	%tmp2 = tail call int (...)* %bar( )		; <int> [#uses=0]
-	%indvar.next78 = add uint %indvar77, 1		; <uint> [#uses=2]
-	%exitcond79 = seteq uint %indvar.next78, %X		; <bool> [#uses=1]
-	br bool %exitcond79, label %cond_next48, label %bb
-
+	%indvar77 = phi i32 [ %indvar.next78, %bb ], [ 0, %bb5 ]		; <i32> [#uses=1]
+	%tmp2 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%indvar.next78 = add i32 %indvar77, 1		; <i32> [#uses=2]
+	%exitcond79 = icmp eq i32 %indvar.next78, %X		; <i1> [#uses=1]
+	br i1 %exitcond79, label %cond_next48, label %bb
 bb5:		; preds = %entry
-	%tmp = seteq int %X, 0		; <bool> [#uses=1]
-	br bool %tmp, label %cond_next48, label %bb
-
+	%tmp = icmp eq i32 %X, 0		; <i1> [#uses=1]
+	br i1 %tmp, label %cond_next48, label %bb
 cond_false:		; preds = %entry
-	%tmp10 = and int %W, 2		; <int> [#uses=1]
-	%tmp10 = seteq int %tmp10, 0		; <bool> [#uses=1]
-	br bool %tmp10, label %cond_false20, label %bb16
-
+	%tmp10 = and i32 %W, 2		; <i32> [#uses=1]
+	%tmp10.upgrd.2 = icmp eq i32 %tmp10, 0		; <i1> [#uses=1]
+	br i1 %tmp10.upgrd.2, label %cond_false20, label %bb16
 bb12:		; preds = %bb16, %bb12
-	%indvar72 = phi uint [ %indvar.next73, %bb12 ], [ 0, %bb16 ]		; <uint> [#uses=1]
-	%tmp13 = tail call int (...)* %bar( )		; <int> [#uses=0]
-	%indvar.next73 = add uint %indvar72, 1		; <uint> [#uses=2]
-	%exitcond74 = seteq uint %indvar.next73, %Y		; <bool> [#uses=1]
-	br bool %exitcond74, label %cond_next48, label %bb12
-
+	%indvar72 = phi i32 [ %indvar.next73, %bb12 ], [ 0, %bb16 ]		; <i32> [#uses=1]
+	%tmp13 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%indvar.next73 = add i32 %indvar72, 1		; <i32> [#uses=2]
+	%exitcond74 = icmp eq i32 %indvar.next73, %Y		; <i1> [#uses=1]
+	br i1 %exitcond74, label %cond_next48, label %bb12
 bb16:		; preds = %cond_false
-	%tmp18 = seteq int %Y, 0		; <bool> [#uses=1]
-	br bool %tmp18, label %cond_next48, label %bb12
-
+	%tmp18 = icmp eq i32 %Y, 0		; <i1> [#uses=1]
+	br i1 %tmp18, label %cond_next48, label %bb12
 cond_false20:		; preds = %cond_false
-	%tmp23 = and int %W, 4		; <int> [#uses=1]
-	%tmp23 = seteq int %tmp23, 0		; <bool> [#uses=1]
-	br bool %tmp23, label %cond_false33, label %bb29
-
+	%tmp23 = and i32 %W, 4		; <i32> [#uses=1]
+	%tmp23.upgrd.3 = icmp eq i32 %tmp23, 0		; <i1> [#uses=1]
+	br i1 %tmp23.upgrd.3, label %cond_false33, label %bb29
 bb25:		; preds = %bb29, %bb25
-	%indvar67 = phi uint [ %indvar.next68, %bb25 ], [ 0, %bb29 ]		; <uint> [#uses=1]
-	%tmp26 = tail call int (...)* %bar( )		; <int> [#uses=0]
-	%indvar.next68 = add uint %indvar67, 1		; <uint> [#uses=2]
-	%exitcond69 = seteq uint %indvar.next68, %Z		; <bool> [#uses=1]
-	br bool %exitcond69, label %cond_next48, label %bb25
-
+	%indvar67 = phi i32 [ %indvar.next68, %bb25 ], [ 0, %bb29 ]		; <i32> [#uses=1]
+	%tmp26 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%indvar.next68 = add i32 %indvar67, 1		; <i32> [#uses=2]
+	%exitcond69 = icmp eq i32 %indvar.next68, %Z		; <i1> [#uses=1]
+	br i1 %exitcond69, label %cond_next48, label %bb25
 bb29:		; preds = %cond_false20
-	%tmp31 = seteq int %Z, 0		; <bool> [#uses=1]
-	br bool %tmp31, label %cond_next48, label %bb25
-
+	%tmp31 = icmp eq i32 %Z, 0		; <i1> [#uses=1]
+	br i1 %tmp31, label %cond_next48, label %bb25
 cond_false33:		; preds = %cond_false20
-	%tmp36 = and int %W, 8		; <int> [#uses=1]
-	%tmp36 = seteq int %tmp36, 0		; <bool> [#uses=1]
-	br bool %tmp36, label %cond_next48, label %bb42
-
+	%tmp36 = and i32 %W, 8		; <i32> [#uses=1]
+	%tmp36.upgrd.4 = icmp eq i32 %tmp36, 0		; <i1> [#uses=1]
+	br i1 %tmp36.upgrd.4, label %cond_next48, label %bb42
 bb38:		; preds = %bb42
-	%tmp39 = tail call int (...)* %bar( )		; <int> [#uses=0]
-	%indvar.next = add uint %indvar, 1		; <uint> [#uses=1]
+	%tmp39 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
 	br label %bb42
-
-bb42:		; preds = %cond_false33, %bb38
-	%indvar = phi uint [ %indvar.next, %bb38 ], [ 0, %cond_false33 ]		; <uint> [#uses=3]
-	%indvar = cast uint %indvar to int		; <int> [#uses=1]
-	%W_addr.0 = sub int %W, %indvar		; <int> [#uses=1]
-	%exitcond = seteq uint %indvar, %W		; <bool> [#uses=1]
-	br bool %exitcond, label %cond_next48, label %bb38
-
-cond_next48:		; preds = %bb, %bb12, %bb25, %bb42, %cond_false33, %bb29, %bb16, %bb5
-	%W_addr.1 = phi int [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ]		; <int> [#uses=1]
-	%tmp50 = seteq int %W_addr.1, 0		; <bool> [#uses=1]
-	br bool %tmp50, label %UnifiedReturnBlock, label %cond_true51
-
+bb42:		; preds = %bb38, %cond_false33
+	%indvar = phi i32 [ %indvar.next, %bb38 ], [ 0, %cond_false33 ]		; <i32> [#uses=4]
+	%W_addr.0 = sub i32 %W, %indvar		; <i32> [#uses=1]
+	%exitcond = icmp eq i32 %indvar, %W		; <i1> [#uses=1]
+	br i1 %exitcond, label %cond_next48, label %bb38
+cond_next48:		; preds = %bb42, %cond_false33, %bb29, %bb25, %bb16, %bb12, %bb5, %bb
+	%W_addr.1 = phi i32 [ %W, %bb5 ], [ %W, %bb16 ], [ %W, %bb29 ], [ %W, %cond_false33 ], [ %W_addr.0, %bb42 ], [ %W, %bb25 ], [ %W, %bb12 ], [ %W, %bb ]		; <i32> [#uses=1]
+	%tmp50 = icmp eq i32 %W_addr.1, 0		; <i1> [#uses=1]
+	br i1 %tmp50, label %UnifiedReturnBlock, label %cond_true51
 cond_true51:		; preds = %cond_next48
-	%tmp52 = tail call int (...)* %bar( )		; <int> [#uses=0]
+	%tmp52 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
 	ret void
-
 UnifiedReturnBlock:		; preds = %cond_next48
 	ret void
 }
 
-declare int %bar(...)
+declare i32 @bar(...)
diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll
index 272964ac46b..e450eb8c237 100644
--- a/test/CodeGen/PowerPC/bswap-load-store.ll
+++ b/test/CodeGen/PowerPC/bswap-load-store.ll
@@ -1,44 +1,45 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwinm
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwimi
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep rlwinm
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep rlwimi
+; RUN: llvm-as < %s | llc -march=ppc64 | \
 ; RUN:   grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwinm
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 | not grep rlwimi
+; RUN: llvm-as < %s | llc -march=ppc64 | not grep rlwinm
+; RUN: llvm-as < %s | llc -march=ppc64 | not grep rlwimi
 
-void %STWBRX(uint %i, sbyte* %ptr, int %off) {
-	%tmp1 = getelementptr sbyte* %ptr, int %off
-	%tmp1 = cast sbyte* %tmp1 to uint*
-	%tmp13 = tail call uint %llvm.bswap.i32(uint %i)
-	store uint %tmp13, uint* %tmp1
-	ret void
+define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
+        %tmp1 = getelementptr i8* %ptr, i32 %off                ; <i8*> [#uses=1]
+        %tmp1.upgrd.1 = bitcast i8* %tmp1 to i32*               ; <i32*> [#uses=1]
+        %tmp13 = tail call i32 @llvm.bswap.i32( i32 %i )                ; <i32> [#uses=1]
+        store i32 %tmp13, i32* %tmp1.upgrd.1
+        ret void
 }
 
-uint %LWBRX(sbyte* %ptr, int %off) {
-	%tmp1 = getelementptr sbyte* %ptr, int %off
-	%tmp1 = cast sbyte* %tmp1 to uint*		
-	%tmp = load uint* %tmp1		
-	%tmp14 = tail call uint %llvm.bswap.i32( uint %tmp )
-	ret uint %tmp14
+define i32 @LWBRX(i8* %ptr, i32 %off) {
+        %tmp1 = getelementptr i8* %ptr, i32 %off                ; <i8*> [#uses=1]
+        %tmp1.upgrd.2 = bitcast i8* %tmp1 to i32*               ; <i32*> [#uses=1]
+        %tmp = load i32* %tmp1.upgrd.2          ; <i32> [#uses=1]
+        %tmp14 = tail call i32 @llvm.bswap.i32( i32 %tmp )              ; <i32> [#uses=1]
+        ret i32 %tmp14
 }
 
-void %STHBRX(ushort %s, sbyte* %ptr, int %off) {
-	%tmp1 = getelementptr sbyte* %ptr, int %off
-	%tmp1 = cast sbyte* %tmp1 to ushort*
-	%tmp5 = call ushort %llvm.bswap.i16( ushort %s )
-	store ushort %tmp5, ushort* %tmp1
-	ret void
+define void @STHBRX(i16 %s, i8* %ptr, i32 %off) {
+        %tmp1 = getelementptr i8* %ptr, i32 %off                ; <i8*> [#uses=1]
+        %tmp1.upgrd.3 = bitcast i8* %tmp1 to i16*               ; <i16*> [#uses=1]
+        %tmp5 = call i16 @llvm.bswap.i16( i16 %s )              ; <i16> [#uses=1]
+        store i16 %tmp5, i16* %tmp1.upgrd.3
+        ret void
 }
 
-ushort %LHBRX(sbyte* %ptr, int %off) {
-	%tmp1 = getelementptr sbyte* %ptr, int %off
-	%tmp1 = cast sbyte* %tmp1 to ushort*
-	%tmp = load ushort* %tmp1
-	%tmp6 = call ushort %llvm.bswap.i16(ushort %tmp)
-	ret ushort %tmp6
+define i16 @LHBRX(i8* %ptr, i32 %off) {
+        %tmp1 = getelementptr i8* %ptr, i32 %off                ; <i8*> [#uses=1]
+        %tmp1.upgrd.4 = bitcast i8* %tmp1 to i16*               ; <i16*> [#uses=1]
+        %tmp = load i16* %tmp1.upgrd.4          ; <i16> [#uses=1]
+        %tmp6 = call i16 @llvm.bswap.i16( i16 %tmp )            ; <i16> [#uses=1]
+        ret i16 %tmp6
 }
 
-declare uint %llvm.bswap.i32(uint)
+declare i32 @llvm.bswap.i32(i32)
+
+declare i16 @llvm.bswap.i16(i16)
 
-declare ushort %llvm.bswap.i16(ushort)
diff --git a/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
index e06090c1925..66428c77e45 100644
--- a/test/CodeGen/PowerPC/buildvec_canonicalize.ll
+++ b/test/CodeGen/PowerPC/buildvec_canonicalize.ll
@@ -1,27 +1,26 @@
 ; There should be exactly one vxor here.
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
 ; RUN:   grep vxor | count 1
 
 ; There should be exactly one vsplti here.
-; RUN: llvm-upgrade < %s | llvm-as | \
+; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \
 ; RUN:   grep vsplti | count 1
 
-
-void %VXOR(<4 x float>* %P1, <4 x int>* %P2, <4 x float>* %P3) {
-        %tmp = load <4 x float>* %P3
-        %tmp3 = load <4 x float>* %P1
-        %tmp4 = mul <4 x float> %tmp, %tmp3
+define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
+        %tmp = load <4 x float>* %P3            ; <<4 x float>> [#uses=1]
+        %tmp3 = load <4 x float>* %P1           ; <<4 x float>> [#uses=1]
+        %tmp4 = mul <4 x float> %tmp, %tmp3             ; <<4 x float>> [#uses=1]
         store <4 x float> %tmp4, <4 x float>* %P3
         store <4 x float> zeroinitializer, <4 x float>* %P1
-        store <4 x int> zeroinitializer, <4 x int>* %P2
+        store <4 x i32> zeroinitializer, <4 x i32>* %P2
         ret void
 }
 
-void %VSPLTI(<4 x int>* %P2, <8 x short>* %P3) {
-        store <4 x int> cast (<16 x sbyte> < sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1, sbyte -1 > to <4 x int>), <4 x int>* %P2
-        store <8 x short> < short -1, short -1, short -1, short -1, short -1, short -1, short -1, short -1 >, <8 x short>* %P3
+define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) {
+        store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2
+        store <8 x i16> < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >, <8 x i16>* %P3
         ret void
 }
 
diff --git a/test/CodeGen/PowerPC/calls.ll b/test/CodeGen/PowerPC/calls.ll
index 3bd608ab593..034c14147a2 100644
--- a/test/CodeGen/PowerPC/calls.ll
+++ b/test/CodeGen/PowerPC/calls.ll
@@ -1,31 +1,32 @@
 ; Test various forms of calls.
 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {bl } | count 2
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {bctrl} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | \
+; RUN: llvm-as < %s | llc -march=ppc32 | \
 ; RUN:   grep {bla } | count 1
 
-declare void %foo()
+declare void @foo()
 
-void %test_direct() {
-	call void %foo()
-	ret void
+define void @test_direct() {
+        call void @foo( )
+        ret void
 }
 
-void %test_extsym(sbyte *%P) {
-	free sbyte* %P
-	ret void
+define void @test_extsym(i8* %P) {
+        free i8* %P
+        ret void
 }
 
-void %test_indirect(void()* %fp) {
-	call void %fp()
-	ret void
+define void @test_indirect(void ()* %fp) {
+        call void %fp( )
+        ret void
 }
 
-void %test_abs() {
-	%fp = cast int 400 to void()*
-	call void %fp()
-	ret void
+define void @test_abs() {
+        %fp = inttoptr i32 400 to void ()*              ; <void ()*> [#uses=1]
+        call void %fp( )
+        ret void
 }
+
diff --git a/test/CodeGen/PowerPC/cmp-cmp.ll b/test/CodeGen/PowerPC/cmp-cmp.ll
index 6dbe484a0fe..07964d5aa31 100644
--- a/test/CodeGen/PowerPC/cmp-cmp.ll
+++ b/test/CodeGen/PowerPC/cmp-cmp.ll
@@ -1,15 +1,13 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep mfcr
-
-void %test(long %X) {
-        %tmp1 = and long %X, 3          ; <long> [#uses=1]
-        %tmp = setgt long %tmp1, 2              ; <bool> [#uses=1]
-        br bool %tmp, label %UnifiedReturnBlock, label %cond_true
-
-cond_true:              ; preds = %entry
-        tail call void %test(long 0)
+; RUN: llvm-as < %s | llc -march=ppc32 | not grep mfcr
+
+define void @test(i64 %X) {
+        %tmp1 = and i64 %X, 3           ; <i64> [#uses=1]
+        %tmp = icmp sgt i64 %tmp1, 2            ; <i1> [#uses=1]
+        br i1 %tmp, label %UnifiedReturnBlock, label %cond_true
+cond_true:              ; preds = %0
+        tail call void @test( i64 0 )
         ret void
-
-UnifiedReturnBlock:             ; preds = %entry
+UnifiedReturnBlock:             ; preds = %0
         ret void
 }