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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-11-14 23:23:27 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-11-14 23:23:27 +0000 |
| commit | 527388dea5b4220f463a7cef6b1012770d1a80a5 (patch) | |
| tree | 1d5ade42291582086498b03f76397219a0d77a8e /test/CodeGen/PowerPC | |
| parent | 791ebec45bcdcdf07a85de0a3f671cdb7a576bc7 (diff) | |
This patch is in preparation for adding medium code model support to the
PPC64 target. The five tests modified herein test code generation that is
sensitive to the code model selected. So I've added -code-model=small to
the RUN commands for each.
Since small code model is the default, this has no effect for now; but this
prepares us for eventually changing the default to medium code model for PPC64.
Test changes verified with small and medium code model as default on
powerpc64-unknown-linux-gnu. All tests continue to pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167999 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
| -rw-r--r-- | test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/mem_update.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/ppc64-toc.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/vec_extload.ll | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll b/test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll index 9d2e390c1c9..5bff58f2bbf 100644 --- a/test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll +++ b/test/CodeGen/PowerPC/2012-09-16-TOC-entry-check.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -code-model=small < %s | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/test/CodeGen/PowerPC/mem_update.ll b/test/CodeGen/PowerPC/mem_update.ll index 39af11a3d54..fcf53da67fc 100644 --- a/test/CodeGen/PowerPC/mem_update.ll +++ b/test/CodeGen/PowerPC/mem_update.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=ppc32 | \ ; RUN: not grep addi -; RUN: llc < %s -march=ppc64 | \ +; RUN: llc -code-model=small < %s -march=ppc64 | \ ; RUN: not grep addi @Glob = global i64 4 diff --git a/test/CodeGen/PowerPC/ppc64-toc.ll b/test/CodeGen/PowerPC/ppc64-toc.ll index a29bdcb2503..7f30ef883e9 100644 --- a/test/CodeGen/PowerPC/ppc64-toc.ll +++ b/test/CodeGen/PowerPC/ppc64-toc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -code-model=small < %s | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/test/CodeGen/PowerPC/vec_extload.ll b/test/CodeGen/PowerPC/vec_extload.ll index 201c15b9c73..15a3f9f2959 100644 --- a/test/CodeGen/PowerPC/vec_extload.ll +++ b/test/CodeGen/PowerPC/vec_extload.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s +; RUN: llc -mcpu=pwr6 -mattr=+altivec -code-model=small < %s | FileCheck %s ; Check vector extend load expansion with altivec enabled. |