[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2

http://reviews.llvm.org/D18562

A large number of testcases has been modified so they pass after this test.
One testcase is deleted, because I realized even after undoing the original
change that was committed with this testcase, the testcase still passes. So
I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll)
is an arbitrary change to keep it passing. Given the original intention of the
testcase, and the fact that fixing it will require some time to change the testcase,
we concluded that this quick change will be enough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265683 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 3 insertions, 3 deletions

diff --git a/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll b/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
index e3f4001aa1d..06636f24f97 100644
--- a/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
+++ b/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
@@ -3,15 +3,15 @@ target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @acosh_float8() #0 {
+define void @acosh_float8(<4 x i32> %v1, <4 x i32> %v2) #0 {
 entry:
   br i1 undef, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
   %0 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> undef, <4 x float> <float 0x3FE62E4200000000, float 0x3FE62E4200000000, float 0x3FE62E4200000000, float 0x3FE62E4200000000>, <4 x float> undef) #0
   %astype.i.i.74.i = bitcast <4 x float> %0 to <4 x i32>
-  %and.i.i.76.i = and <4 x i32> %astype.i.i.74.i, undef
-  %or.i.i.79.i = or <4 x i32> %and.i.i.76.i, undef
+  %and.i.i.76.i = and <4 x i32> %astype.i.i.74.i, %v1
+  %or.i.i.79.i = or <4 x i32> %and.i.i.76.i, %v2
   %astype5.i.i.80.i = bitcast <4 x i32> %or.i.i.79.i to <4 x float>
   %1 = shufflevector <4 x float> %astype5.i.i.80.i, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
   %2 = shufflevector <8 x float> undef, <8 x float> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>