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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
| tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/PowerPC/vec_conv.ll | |
| parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/vec_conv.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/vec_conv.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/vec_conv.ll b/test/CodeGen/PowerPC/vec_conv.ll index a39ae910035..6e19f5a010d 100644 --- a/test/CodeGen/PowerPC/vec_conv.ll +++ b/test/CodeGen/PowerPC/vec_conv.ll @@ -11,7 +11,7 @@ target triple = "powerpc64-unknown-linux-gnu" define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptosi <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -23,7 +23,7 @@ entry: define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind { entry: - %0 = load <4 x float>* @cte_float, align 16 + %0 = load <4 x float>, <4 x float>* @cte_float, align 16 %mul = fmul <4 x float> %0, %x %1 = fptoui <4 x float> %mul to <4 x i32> store <4 x i32> %1, <4 x i32>* %y, align 16 @@ -35,7 +35,7 @@ entry: define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = sitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 @@ -47,7 +47,7 @@ entry: define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind { entry: - %0 = load <4 x i32>* @cte_int, align 16 + %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16 %mul = mul <4 x i32> %0, %x %1 = uitofp <4 x i32> %mul to <4 x float> store <4 x float> %1, <4 x float>* %y, align 16 |