diff options
author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
---|---|---|
committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/PowerPC/unal-altivec-wint.ll | |
parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/unal-altivec-wint.ll')
-rw-r--r-- | test/CodeGen/PowerPC/unal-altivec-wint.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/PowerPC/unal-altivec-wint.ll b/test/CodeGen/PowerPC/unal-altivec-wint.ll index 7d5dd6080bd..b71a98bc83b 100644 --- a/test/CodeGen/PowerPC/unal-altivec-wint.ll +++ b/test/CodeGen/PowerPC/unal-altivec-wint.ll @@ -10,7 +10,7 @@ entry: %hv = bitcast <4 x i32>* %h1 to i8* %vl = call <4 x i32> @llvm.ppc.altivec.lvx(i8* %hv) - %v0 = load <4 x i32>* %h, align 8 + %v0 = load <4 x i32>, <4 x i32>* %h, align 8 %a = add <4 x i32> %v0, %vl ret <4 x i32> %a @@ -31,7 +31,7 @@ entry: %hv = bitcast <4 x i32>* %h1 to i8* call void @llvm.ppc.altivec.stvx(<4 x i32> %d, i8* %hv) - %v0 = load <4 x i32>* %h, align 8 + %v0 = load <4 x i32>, <4 x i32>* %h, align 8 ret <4 x i32> %v0 |