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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-02-25 16:44:35 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2013-02-25 16:44:35 +0000 |
| commit | fc7695a653323071ec141aee994e4188592ad1f5 (patch) | |
| tree | 930347884b39b43adc5fee11eabc2eeb13891f72 /test/CodeGen/PowerPC/tls.ll | |
| parent | 7e6ffac9ab0af2a54036c978822ad40492246622 (diff) | |
Fix missing relocation for TLS addressing peephole optimization.
Report and fix due to Kai Nacke. Testcase update by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/tls.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/tls.ll | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/test/CodeGen/PowerPC/tls.ll b/test/CodeGen/PowerPC/tls.ll index 9021f03b9d8..151b4b7ddab 100644 --- a/test/CodeGen/PowerPC/tls.ll +++ b/test/CodeGen/PowerPC/tls.ll @@ -1,16 +1,21 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-freebsd10.0" -; RUN: llc -O0 < %s -march=ppc64 | FileCheck %s +; RUN: llc -O0 < %s -march=ppc64 | FileCheck -check-prefix=OPT0 %s +; RUN: llc -O1 < %s -march=ppc64 | FileCheck -check-prefix=OPT1 %s @a = thread_local global i32 0, align 4 -;CHECK: localexec: +;OPT0: localexec: +;OPT1: localexec: define i32 @localexec() nounwind { entry: -;CHECK: addis [[REG1:[0-9]+]], 13, a@tprel@ha -;CHECK-NEXT: li [[REG2:[0-9]+]], 42 -;CHECK-NEXT: addi [[REG1]], [[REG1]], a@tprel@l -;CHECK-NEXT: stw [[REG2]], 0([[REG1]]) +;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha +;OPT0-NEXT: li [[REG2:[0-9]+]], 42 +;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l +;OPT0-NEXT: stw [[REG2]], 0([[REG1]]) +;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha +;OPT1-NEXT: li [[REG2:[0-9]+]], 42 +;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]]) store i32 42, i32* @a, align 4 ret i32 0 } |