diff options
| author | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 14:43:12 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 14:43:12 +0000 |
| commit | 541103a1c606980e91451067f98b00c57c2fbf53 (patch) | |
| tree | 71e608e62fa3752f9079a0befba7c6aaaa6f8640 /test/CodeGen/PowerPC/subreg-postra.ll | |
| parent | 3157d2b8a6029fbce7b4257b355e3f555f00930d (diff) | |
[PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292128 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/subreg-postra.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/subreg-postra.ll | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/subreg-postra.ll b/test/CodeGen/PowerPC/subreg-postra.ll index 877ceccd918..7557e4e9a46 100644 --- a/test/CodeGen/PowerPC/subreg-postra.ll +++ b/test/CodeGen/PowerPC/subreg-postra.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -145,10 +146,15 @@ wait_on_buffer.exit1319: ; preds = %while.body392 br i1 %inp8, label %while.end418, label %while.body392 ; CHECK-LABEL: @jbd2_journal_commit_transaction +; CHECK-NO-ISEL-LABEL: @jbd2_journal_commit_transaction ; CHECK: andi. ; CHECK: crmove ; CHECK: stdcx. ; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, +; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL: ori 30, 3, 0 +; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] + while.end418: ; preds = %wait_on_buffer.exit1319, %do.body378 %err.4.lcssa = phi i32 [ %inp2, %do.body378 ], [ %.err.4, %wait_on_buffer.exit1319 ] |