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| author | Tony Jiang <jtony@ca.ibm.com> | 2017-11-20 14:38:30 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-11-20 14:38:30 +0000 |
| commit | 14f881da7f92f70f029d4aaea34ac83a9981f963 (patch) | |
| tree | 15bbd9d74c77b4ca69bd96da3270c888deab6fb9 /test/CodeGen/PowerPC/select_const.ll | |
| parent | b2ea712e111735c36c7ed3e31912e57fd8cb3637 (diff) | |
[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
The VSX versions have the advantage of a full 64-register target whereas the FP
ones have the advantage of lower latency and higher throughput. So what we’re
after is using the faster instructions in low register pressure situations and
using the larger register file in high register pressure situations.
The heuristic chooses between the following 7 pairs of instructions.
PPC::LXSSPX vs PPC::LFSX
PPC::LXSDX vs PPC::LFDX
PPC::STXSSPX vs PPC::STFSX
PPC::STXSDX vs PPC::STFDX
PPC::LXSIWAX vs PPC::LFIWAX
PPC::LXSIWZX vs PPC::LFIWZX
PPC::STXSIWX vs PPC::STFIWX
Differential Revision: https://reviews.llvm.org/D38486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318651 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/select_const.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/select_const.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/select_const.ll b/test/CodeGen/PowerPC/select_const.ll index 29548123be8..fd864805abd 100644 --- a/test/CodeGen/PowerPC/select_const.ll +++ b/test/CodeGen/PowerPC/select_const.ll @@ -780,7 +780,7 @@ define double @sel_constants_frem_constant(i1 %cond) { ; ALL-NEXT: .LBB38_2: ; ALL-NEXT: addis 3, 2, .LCPI38_1@toc@ha ; ALL-NEXT: addi 3, 3, .LCPI38_1@toc@l -; ALL-NEXT: lxsspx 1, 0, 3 +; ALL-NEXT: lfsx 1, 0, 3 ; ALL-NEXT: blr %sel = select i1 %cond, double -4.0, double 23.3 %bo = frem double %sel, 5.1 |