diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-08-28 02:10:15 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-08-28 02:10:15 +0000 |
| commit | 97d047dec71cb37f31aac102cdc87b3dec0b1c46 (patch) | |
| tree | ff8cb03e42fb2b48aaec96dff4633dbf36bd5b0c /test/CodeGen/PowerPC/ppc64-zext.ll | |
| parent | 164a308b563c8bdc280c0762d79a8e797c3497e7 (diff) | |
Optimize zext on PPC64.
The zeroextend IR instruction is lowered to an 'and' node with an immediate
mask operand, which in turn gets legalised to a sequence of ori's & ands.
This can be done more efficiently using the rldicl instruction.
Patch by Tobias von Koch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162724 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ppc64-zext.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc64-zext.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/ppc64-zext.ll b/test/CodeGen/PowerPC/ppc64-zext.ll new file mode 100644 index 00000000000..eb55445cc6c --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-zext.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux" + +define i64 @fun(i32 %arg32) nounwind { +entry: +; CHECK: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 32 + %o = zext i32 %arg32 to i64 + ret i64 %o +} + |