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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
| tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/PowerPC/ppc64-abi-extend.ll | |
| parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ppc64-abi-extend.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc64-abi-extend.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/ppc64-abi-extend.ll b/test/CodeGen/PowerPC/ppc64-abi-extend.ll index 8baf1c613e7..f8e72e3a108 100644 --- a/test/CodeGen/PowerPC/ppc64-abi-extend.ll +++ b/test/CodeGen/PowerPC/ppc64-abi-extend.ll @@ -15,7 +15,7 @@ declare zeroext i32 @ret_ui() define void @pass_arg_si() nounwind { entry: - %0 = load i32* @si, align 4 + %0 = load i32, i32* @si, align 4 tail call void @arg_si(i32 signext %0) nounwind ret void } @@ -25,7 +25,7 @@ entry: define void @pass_arg_ui() nounwind { entry: - %0 = load i32* @ui, align 4 + %0 = load i32, i32* @ui, align 4 tail call void @arg_ui(i32 zeroext %0) nounwind ret void } @@ -53,7 +53,7 @@ entry: define signext i32 @pass_ret_si() nounwind readonly { entry: - %0 = load i32* @si, align 4 + %0 = load i32, i32* @si, align 4 ret i32 %0 } ; CHECK: @pass_ret_si @@ -62,7 +62,7 @@ entry: define zeroext i32 @pass_ret_ui() nounwind readonly { entry: - %0 = load i32* @ui, align 4 + %0 = load i32, i32* @ui, align 4 ret i32 %0 } ; CHECK: @pass_ret_ui |