diff options
| author | Lang Hames <lhames@gmail.com> | 2012-06-19 22:51:23 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2012-06-19 22:51:23 +0000 |
| commit | d693cafcfb9e67ba7040cb810e4409a166421482 (patch) | |
| tree | 86a20682e48b7aaf402fc95f6497eae48e8fa89a /test/CodeGen/PowerPC/ppc440-fp-basic.ll | |
| parent | fa8becb6f9e8aa2cbe3bab79e1fc4cdf2ffbb8e5 (diff) | |
Add DAG-combines for aggressive FMA formation.
This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or
FSUB + FMUL. The combines are performed when:
(a) Either
AllowExcessFPPrecision option (-enable-excess-fp-precision for llc)
OR
UnsafeFPMath option (-enable-unsafe-fp-math)
are set, and
(b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of
the FADD/FSUB, and
(c) The FMUL only has one user (the FADD/FSUB).
If your target has fast FMA instructions you can make use of these combines by
overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for
types supported by your FMA instruction, and adding patterns to match ISD::FMA
to your FMA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158757 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ppc440-fp-basic.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc440-fp-basic.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/ppc440-fp-basic.ll b/test/CodeGen/PowerPC/ppc440-fp-basic.ll index 1fad2fa3aaf..25ec5f892c5 100644 --- a/test/CodeGen/PowerPC/ppc440-fp-basic.ll +++ b/test/CodeGen/PowerPC/ppc440-fp-basic.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ppc32 -mcpu=440 | FileCheck %s +; RUN: llc < %s -march=ppc32 -mcpu=440 -enable-excess-fp-precision | FileCheck %s %0 = type { double, double } |