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| author | Strahinja Petrovic <strahinja.petrovic@rt-rk.com> | 2016-05-09 12:27:39 +0000 |
|---|---|---|
| committer | Strahinja Petrovic <strahinja.petrovic@rt-rk.com> | 2016-05-09 12:27:39 +0000 |
| commit | a16fdea51a814bbd1942a3902db76063f5fe094a (patch) | |
| tree | f0c09fbf3634ec7ff3dac888276dbe9f0ee221d0 /test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll | |
| parent | e06fb6bce7b48b0ee218499f2f15d62cdc75e8bb (diff) | |
[PowerPC] fix register alignment for long double type
This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll b/test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll new file mode 100644 index 00000000000..f8a6d071cfe --- /dev/null +++ b/test/CodeGen/PowerPC/ppc32-align-long-double-sf.ll @@ -0,0 +1,21 @@ +; RUN: llc -O2 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s + +@x = global ppc_fp128 0xM405EDA5E353F7CEE0000000000000000, align 16 +@.str = private unnamed_addr constant [5 x i8] c"%Lf\0A\00", align 1 + + +define void @foo() #0 { +entry: + %0 = load ppc_fp128, ppc_fp128* @x, align 16 + %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0), ppc_fp128 %0) + ret void +} +; Do not skip register r4 because of register alignment in soft float mode. Instead skipping +; put in r4 part of first argument for printf function (long double). +; CHECK: lwzu 4, x@l({{[0-9]+}}) + +declare i32 @printf(i8* nocapture readonly, ...) #0 + +attributes #0 = { "use-soft-float"="true" } + +
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