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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-11-29 16:11:34 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-11-29 16:11:34 +0000 |
| commit | 1ec5b2fb7534334a7df344f467d9e7e5344725d4 (patch) | |
| tree | fc44413d6916c2fc16c48bff525cd999eadd5a1b /test/CodeGen/PowerPC/power9-moves-and-splats.ll | |
| parent | e58c265916e4d1b6614f1e4070768812e725919c (diff) | |
[PowerPC] Improvements for BUILD_VECTOR Vol. 1
This patch corresponds to review:
https://reviews.llvm.org/D25912
This is the first patch in a series of 4 that improve the lowering and combining
for BUILD_VECTOR nodes on PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288152 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/power9-moves-and-splats.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/power9-moves-and-splats.ll | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/test/CodeGen/PowerPC/power9-moves-and-splats.ll b/test/CodeGen/PowerPC/power9-moves-and-splats.ll index fa4f0320c92..68995de702c 100644 --- a/test/CodeGen/PowerPC/power9-moves-and-splats.ll +++ b/test/CodeGen/PowerPC/power9-moves-and-splats.ll @@ -10,15 +10,9 @@ entry: ; The FIXME below is due to the lowering for BUILD_VECTOR needing a re-vamp ; which will happen in a subsequent patch. ; CHECK-LABEL: test1 -; FIXME: mtvsrdd 34, 4, 3 -; CHECK: mtvsrd {{[0-9]+}}, 3 -; CHECK: mtvsrd {{[0-9]+}}, 4 -; CHECK: xxmrgld +; CHECK: mtvsrdd 34, 4, 3 ; CHECK-BE-LABEL: test1 -; FIXME-BE: mtvsrdd 34, 3, 4 -; CHECK-BE: mtvsrd {{[0-9]+}}, 4 -; CHECK-BE: mtvsrd {{[0-9]+}}, 3 -; CHECK-BE: xxmrghd +; CHECK-BE: mtvsrdd 34, 3, 4 %vecins = insertelement <2 x i64> undef, i64 %a, i32 0 %vecins1 = insertelement <2 x i64> %vecins, i64 %b, i32 1 ret <2 x i64> %vecins1 @@ -162,10 +156,14 @@ define <4 x i32> @test14(<4 x i32> %a, i32* nocapture readonly %b) { entry: ; CHECK-LABEL: test14 ; CHECK: lwz [[LD:[0-9]+]], -; CHECK: mtvsrws 34, [[LD]] +; FIXME: mtvsrws 34, [[LD]] +; CHECK: mtvsrws [[SPLT:[0-9]+]], [[LD]] +; CHECK: xxspltw 34, [[SPLT]], 3 ; CHECK-BE-LABEL: test14 ; CHECK-BE: lwz [[LD:[0-9]+]], -; CHECK-BE: mtvsrws 34, [[LD]] +; FIXME: mtvsrws 34, [[LD]] +; CHECK-BE: mtvsrws [[SPLT:[0-9]+]], [[LD]] +; CHECK-BE: xxspltw 34, [[SPLT]], 0 %0 = load i32, i32* %b, align 4 %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer |