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author | Sean Fertile <sfertile@ca.ibm.com> | 2016-12-09 17:21:42 +0000 |
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committer | Sean Fertile <sfertile@ca.ibm.com> | 2016-12-09 17:21:42 +0000 |
commit | d22c85d0682343cedfdd21694b42e1a49550ff87 (patch) | |
tree | d795afd01ed7eec87c52c1e6b7c1437713bf290b /test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll | |
parent | 2c965834228d66ba0c9a5c293c33b27746f27029 (diff) |
[PPC] Add intrinsics for vector extract word and vector insert word.
Revision: https://reviews.llvm.org/D26547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289227 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll')
-rw-r--r-- | test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll b/test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll index 8b4a76757c3..e3326595d13 100644 --- a/test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll +++ b/test/CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll @@ -990,3 +990,21 @@ entry: %vecins = insertelement <4 x i32> %a, i32 %i, i32 %el ret <4 x i32> %vecins } +define <4 x i32> @intrinsicInsertTest(<4 x i32> %a, <2 x i64> %b) { +entry: +; CHECK-LABEL:intrinsicInsertTest +; CHECK: xxinsertw 34, 35, 3 +; CHECK: blr + %ans = tail call <4 x i32> @llvm.ppc.vsx.xxinsertw(<4 x i32> %a, <2 x i64> %b, i32 3) + ret <4 x i32> %ans +} +declare <4 x i32> @llvm.ppc.vsx.xxinsertw(<4 x i32>, <2 x i64>, i32) +define <2 x i64> @intrinsicExtractTest(<2 x i64> %a) { +entry: +; CHECK-LABEL: intrinsicExtractTest +; CHECK: xxextractuw 0, 34, 5 +; CHECK: blr + %ans = tail call <2 x i64> @llvm.ppc.vsx.xxextractuw(<2 x i64> %a, i32 5) + ret <2 x i64> %ans +} +declare <2 x i64> @llvm.ppc.vsx.xxextractuw(<2 x i64>, i32) |