diff options
| author | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 15:01:07 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 15:01:07 +0000 |
| commit | 748e859f36d26fa084a92b38c558be5367a8be47 (patch) | |
| tree | 06b9962b3211f2742adc821cd31c0d8746d6e299 /test/CodeGen/PowerPC/optcmp.ll | |
| parent | 1f7c0c9364eb80b1d3779360f50b5b45212056e5 (diff) | |
Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292131 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/optcmp.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/optcmp.ll | 32 |
1 files changed, 5 insertions, 27 deletions
diff --git a/test/CodeGen/PowerPC/optcmp.ll b/test/CodeGen/PowerPC/optcmp.ll index a1921452d62..5e8ca5a6a67 100644 --- a/test/CodeGen/PowerPC/optcmp.ll +++ b/test/CodeGen/PowerPC/optcmp.ll @@ -1,5 +1,4 @@ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 | FileCheck %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 -ppc-gen-isel=false | FileCheck --check-prefix=CHECK-NO-ISEL %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -35,14 +34,9 @@ entry: %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond -; CHECK-LABEL: @fool -; CHECK-NO-ISEL-LABEL: @fool +; CHECK: @fool ; CHECK: subf. [[REG:[0-9]+]], 4, 3 ; CHECK: isel 3, 3, 4, 1 -; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] -; CHECK-NO-ISEL: ori 3, 4, 0 -; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] - ; CHECK: std [[REG]], 0(5) } @@ -54,13 +48,9 @@ entry: %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond -; CHECK-LABEL: @foolb -; CHECK-NO-ISEL-LABEL: @foolb +; CHECK: @foolb ; CHECK: subf. [[REG:[0-9]+]], 4, 3 ; CHECK: isel 3, 4, 3, 1 -; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] -; CHECK-NO-ISEL-NEXT: b .LBB -; CHECK-NO-ISEL addi: 3, 4, 0 ; CHECK: std [[REG]], 0(5) } @@ -72,13 +62,9 @@ entry: %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond -; CHECK-LABEL: @foolc -; CHECK-NO-ISEL-LABEL: @foolc +; CHECK: @foolc ; CHECK: subf. [[REG:[0-9]+]], 3, 4 ; CHECK: isel 3, 3, 4, 0 -; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] -; CHECK-NO-ISEL: ori 3, 4, 0 -; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] ; CHECK: std [[REG]], 0(5) } @@ -90,13 +76,9 @@ entry: %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond -; CHECK-LABEL: @foold -; CHECK-NO-ISEL-LABEL: @foold +; CHECK: @foold ; CHECK: subf. [[REG:[0-9]+]], 3, 4 ; CHECK: isel 3, 3, 4, 1 -; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] -; CHECK-NO-ISEL: ori 3, 4, 0 -; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] ; CHECK: std [[REG]], 0(5) } @@ -108,13 +90,9 @@ entry: %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond -; CHECK-LABEL: @foold2 -; CHECK-NO-ISEL-LABEL: @foold2 +; CHECK: @foold2 ; CHECK: subf. [[REG:[0-9]+]], 4, 3 ; CHECK: isel 3, 3, 4, 0 -; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] -; CHECK-NO-ISEL: ori 3, 4, 0 -; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] ; CHECK: std [[REG]], 0(5) } |