[PowerPC] Use helper functions to check sign-/zero-extended value

Helper functions to identify sign- and zero-extending machine instruction is introduced in rL315888.
This patch makes PPCInstrInfo::optimizeCompareInstr use the helper functions. It simplifies the code and also makes possible more optimizations since the helper can do more analysis than the original check code; I observed about 5000 more compare instructions are eliminated while building LLVM.

Also, this patch fixes a bug in helpers on ANDIo instruction handling due to the order of checks. This bug causes a failure in an existing test case for optimizeCompareInstr.

Differential Revision: https://reviews.llvm.org/D38988



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316071 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 21 insertions, 0 deletions

diff --git a/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll b/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
index b2f17e6a33b..43d4add243d 100644
--- a/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
+++ b/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
@@ -78,3 +78,24 @@ if.end:
 }
 
 declare void @exit(i32 signext)
+
+; Since %v1 and %v2 are zero-extended 32-bit values, %1 is also zero-extended.
+; In this case, we want to use ORo instead of OR + CMPLWI.
+
+; CHECK-LABEL: fn5
+define zeroext i32 @fn5(i32* %p1, i32* %p2) {
+; CHECK: ORo
+; CHECK-NOT: CMP
+; CHECK: BCC
+  %v1 = load i32, i32* %p1
+  %v2 = load i32, i32* %p2
+  %1 = or i32 %v1, %v2
+  %2 = icmp eq i32 %1, 0
+  br i1 %2, label %foo, label %bar
+
+foo:
+  ret i32 1
+
+bar:
+  ret i32 0
+}