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| author | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 20:12:26 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 20:12:26 +0000 |
| commit | 758e067345e203fed4bd61819c7c8d4f2ad9930b (patch) | |
| tree | 7426826094845cb184c8eaa4b6414159c39974ad /test/CodeGen/PowerPC/isel.ll | |
| parent | 627c8074e746928e6f318c3246047b221a187241 (diff) | |
[PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292154 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/isel.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/isel.ll | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/test/CodeGen/PowerPC/isel.ll b/test/CodeGen/PowerPC/isel.ll index 1dc55fcc40b..c1cceb96701 100644 --- a/test/CodeGen/PowerPC/isel.ll +++ b/test/CodeGen/PowerPC/isel.ll @@ -2,14 +2,22 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "powerpc64-unknown-linux-gnu" ; RUN: llc -verify-machineinstrs -mcpu=a2 < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s define i64 @test1(i64 %a, i64 %b, i64 %c, i64 %d) { entry: %p = icmp uge i64 %a, %b %x = select i1 %p, i64 %c, i64 %d ret i64 %x -; CHECK: @test1 +; CHECK-LABEL: @test1 +; CHECK-NO-ISEL-LABEL: @test1 ; CHECK: isel +; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL: ori 3, 5, 0 +; CHECK-NO-ISEL-NEXT: blr +; CHECK-NO-ISEL: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 3, 6, 0 +; CHECK-NO-ISEL-NEXT: blr } define i32 @test2(i32 %a, i32 %b, i32 %c, i32 %d) { @@ -17,7 +25,14 @@ entry: %p = icmp uge i32 %a, %b %x = select i1 %p, i32 %c, i32 %d ret i32 %x -; CHECK: @test2 +; CHECK-LABEL: @test2 +; CHECK-NO-ISEL-LABEL: @test2 ; CHECK: isel +; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL: ori 3, 5, 0 +; CHECK-NO-ISEL-NEXT: blr +; CHECK-NO-ISEL: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 3, 6, 0 +; CHECK-NO-ISEL-NEXT: blr } |