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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-12-29 12:22:27 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-12-29 12:22:27 +0000 |
| commit | 649870608ee53da0c86f688e27e87cb5c6b0e090 (patch) | |
| tree | 4e990c1fefa4b4c43d345bae4f5246ad8451bc5a /test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll | |
| parent | 2e7d056b717d7513b18472077996623a9e0d9e8d (diff) | |
[PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversion
Revision 320791 introduced a pass that transforms reg+reg instructions to
reg+imm if they're fed by "load immediate". However, it didn't
handle out-of-range shifts correctly as reported in PR35688.
This patch fixes that and therefore the PR.
Furthermore, there was undefined behaviour in the patch where the RHS of an
initialization expression was 32 bits and constant `1` was shifted left 32
bits. This was fixed by ensuring the RHS is 64 bits just like the LHS.
Differential Revision: https://reviews.llvm.org/D41369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321551 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll')
0 files changed, 0 insertions, 0 deletions