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authorTony Jiang <jtony@ca.ibm.com>2017-01-16 15:01:07 +0000
committerTony Jiang <jtony@ca.ibm.com>2017-01-16 15:01:07 +0000
commit748e859f36d26fa084a92b38c558be5367a8be47 (patch)
tree06b9962b3211f2742adc821cd31c0d8746d6e299 /test/CodeGen/PowerPC/expand-isel-2.mir
parent1f7c0c9364eb80b1d3779360f50b5b45212056e5 (diff)
Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292131 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/expand-isel-2.mir')
-rw-r--r--test/CodeGen/PowerPC/expand-isel-2.mir43
1 files changed, 0 insertions, 43 deletions
diff --git a/test/CodeGen/PowerPC/expand-isel-2.mir b/test/CodeGen/PowerPC/expand-isel-2.mir
deleted file mode 100644
index f6e9add2199..00000000000
--- a/test/CodeGen/PowerPC/expand-isel-2.mir
+++ /dev/null
@@ -1,43 +0,0 @@
-# This file tests the scenario: ISEL RX, ZERO, RY, CR (X != 0 && Y != 0)
-# RUN: llc -ppc-gen-isel=false -run-pass ppc-expand-isel -o - %s | FileCheck %s
-name: testExpandISEL
-alignment: 2
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-tracksRegLiveness: true
-liveins:
- - { reg: '%x0' }
- - { reg: '%x3' }
- - { reg: '%x4' }
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 0
- adjustsStack: false
- hasCalls: false
- maxCallFrameSize: 0
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
-body: |
- bb.0.entry:
- liveins: %x0, %x3, %x4
-
- %r5 = ADDI %r3, 1
- %cr0 = CMPWI %r3, 0
- %r3 = ISEL %zero, %r4, %cr0gt
- ; CHECK: BC %cr0gt, %[[TRUE:bb.[0-9]+]]
- ; CHECK: %[[FALSE:bb.[0-9]+]]
- ; CHECK: %r3 = ORI %r4, 0
- ; CHECK: B %[[SUCCESSOR:bb.[0-9]+]]
- ; CHECK: [[TRUE]]
- ; CHECK: %r3 = ADDI %zero, 0
-
- %x3 = EXTSW_32_64 %r3
-...