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author | Craig Topper <craig.topper@intel.com> | 2017-12-15 07:16:41 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-12-15 07:16:41 +0000 |
commit | d077c9767cdcf039217726503664e5103c358df5 (patch) | |
tree | 79dc39a0645080020cdd2d67f9329c7c594d313d /test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | |
parent | a9252d85152b94144b7d123444f62cb27d64e3bd (diff) |
[X86] Fix a couple bugs in my recent changes to vXi1 insert_subvector lowering.
A couple places didn't use the same SDValue variables to connect everything all the way through.
I don't have a test case for a bug in insert into the lower bits of a non-zero, non-undef vector. Not sure the best way to create that. We don't create the case when lowering concat_vectors which is the main way to get insert_subvectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320790 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir')
0 files changed, 0 insertions, 0 deletions