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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2014-07-20 22:26:40 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2014-07-20 22:26:40 +0000 |
| commit | e4b2165648e81542e654006ab753152ab48d63fa (patch) | |
| tree | cc7d61547631bdf354f2d8d4f4ed5c83f6da99dc /test/CodeGen/PowerPC/complex-return.ll | |
| parent | c543b262e1763bff740d6567da87f4606da2c4e3 (diff) | |
[PowerPC] Fix FrameIndex handling in SelectAddressRegImm
The PPCTargetLowering::SelectAddressRegImm routine needs to handle
FrameIndex nodes in a special manner, by tranlating them into a
TargetFrameIndex node. This was done in most cases, but seems to
have been neglected in one path: when the input tree has an OR of
the FrameIndex with an immediate. This can happen if the FrameIndex
can be proven to be sufficiently aligned that an OR of that immediate
is equivalent to an ADD.
The missing handling of FrameIndex in that case caused the SelectionDAG
instruction selection to miss opportunities to merge the OR back into
the FrameIndex node, leading to superfluous addi/ori instructions in
the final assembler output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213482 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/complex-return.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/complex-return.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/complex-return.ll b/test/CodeGen/PowerPC/complex-return.ll index 5ac7524ff5c..8a6adaee555 100644 --- a/test/CodeGen/PowerPC/complex-return.ll +++ b/test/CodeGen/PowerPC/complex-return.ll @@ -26,8 +26,8 @@ entry: ; CHECK-LABEL: foo: ; CHECK: lfd 3 ; CHECK: lfd 4 -; CHECK: lfd 2 ; CHECK: lfd 1 +; CHECK: lfd 2 define { float, float } @oof() nounwind { entry: |