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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 17:15:09 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 17:15:09 +0000
commita4ec08b6fd62577a5c0e9ddd3c131e223c0672b8 (patch)
tree14dc42e84a489e5ec4e9aefdf9e086ab70c1427d /test/CodeGen/PowerPC/byval-agg-info.ll
parent7005517f42852ddb80ca986a2933f729d4fd0383 (diff)
[CodeGen] Print register names in lowercase in both MIR and debug output
As part of the unification of the debug format and the MIR format, always print registers as lowercase. * Only debug printing is affected. It now follows MIR. Differential Revision: https://reviews.llvm.org/D40417 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319187 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/byval-agg-info.ll')
-rw-r--r--test/CodeGen/PowerPC/byval-agg-info.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/PowerPC/byval-agg-info.ll b/test/CodeGen/PowerPC/byval-agg-info.ll
index df87896e375..04869665797 100644
--- a/test/CodeGen/PowerPC/byval-agg-info.ll
+++ b/test/CodeGen/PowerPC/byval-agg-info.ll
@@ -13,5 +13,5 @@ entry:
; Make sure that the MMO on the store has no offset from the byval
; variable itself (we used to have mem:ST8[%v+64]).
-; CHECK: STD %X5<kill>, 176, %X1; mem:ST8[%v](align=16)
+; CHECK: STD %x5<kill>, 176, %x1; mem:ST8[%v](align=16)