diff options
| author | Lei Huang <lei@ca.ibm.com> | 2017-07-10 16:44:45 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2017-07-10 16:44:45 +0000 |
| commit | b6988767a83875c8d0a64a1c0ff9cdf962d556ab (patch) | |
| tree | 2fea04e610771f032783ccbc08c60076c2937507 /test/CodeGen/PowerPC/build-vector-tests.ll | |
| parent | 0fd6ce773dc03bd9901ad277bf045244a39ffc3a (diff) | |
[PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
For this example:
float test (int *arr) {
return arr[2];
}
We currently generate the following code:
li r4, 8
lxsiwax f0, r3, r4
xscvsxdsp f1, f0
With this patch, we will now generate:
addi r3, r3, 8
lxsiwax f0, 0, r3
xscvsxdsp f1, f0
Originally reported in: https://bugs.llvm.org/show_bug.cgi?id=27204
Differential Revision: https://reviews.llvm.org/D35027
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307553 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/build-vector-tests.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/build-vector-tests.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/PowerPC/build-vector-tests.ll b/test/CodeGen/PowerPC/build-vector-tests.ll index c42f677d17a..60bec4d18f1 100644 --- a/test/CodeGen/PowerPC/build-vector-tests.ll +++ b/test/CodeGen/PowerPC/build-vector-tests.ll @@ -1028,7 +1028,7 @@ entry: ; P9LE: vperm ; P9LE: blr ; P8BE: sldi {{r[0-9]+}}, r4, 2 -; P8BE-DAG: lxvw4x {{v[0-9]+}}, r3, +; P8BE-DAG: lxvw4x {{v[0-9]+}}, 0, r3 ; P8BE-DAG: lxvw4x ; P8BE: vperm ; P8BE: blr @@ -2187,7 +2187,7 @@ entry: ; P9LE: vperm ; P9LE: blr ; P8BE-DAG: sldi {{r[0-9]+}}, r4, 2 -; P8BE-DAG: lxvw4x {{v[0-9]+}}, r3 +; P8BE-DAG: lxvw4x {{v[0-9]+}}, 0, r3 ; P8BE-DAG: lxvw4x ; P8BE: vperm ; P8BE: blr |